feature

-2.9GHz 3dB bandwidth (AV=6dB); low supply current: 40mA; pin-bundled gain adjustment: 6dB, 12dB, 15.5dB; differential or single-ended input to differential output; low noise input stage: 2.1 nV/√Hz RTI, AV=12 dB; low wideband distortion (AV=6dB); 10 MHz: -94 dBc HD2, -87 dBc HD3; 70 MHz: -98 dBc HD2, -87 dBc HD3; 140 MHz: -95 dBc HD2, -87 dBc HD3; 250 MHz: 250 MHz at 9.8 V/ns center conversion, -80 dBc HD2, -73 dBc HD3 IMD3s, -86 dBc; 2ns fast settling and 3ns single-supply operation Overspeed recovery: 3v to 3.6v power-off control; manufactured with high-speed XFCB3-SiGe process.

application

Differential ADC driver; single-ended to differential conversion; RF/IF gain block; SAW filter interface.

General Instructions

The ADL5561 is a high performance differential amplifier optimized for RF and IF applications. Featuring low noise of 2.1nv/√Hz and excellent distortion performance over a wide frequency range, this amplifier is an ideal driver for high-speed 8-bit to 16-bit analog-to-digital converters (ADCs).

The ADL5561 offers three gain levels of 6dB, 12dB, and 15.5dB in a pin-strappable configuration. For single-ended input configuration, the gain is reduced to 5.6db, 11.1db and 14.1db. The use of external series input resistors extends the amplifier's gain flexibility and allows any gain selection from 0dB to 15.5dB.

The quiescent current of the ADL5561 is typically 40 mA, and if disabled, it consumes less than 3 mA, providing excellent input-output isolation.

The device is optimized for wideband, low distortion performance. These features, combined with its adjustable gain capability, make this device an amplifier for general-purpose intermediate frequency and broadband applications where low distortion, noise, and power are critical. The device is optimized for the best combination of slew speed, bandwidth and wideband distortion. These characteristics enable it to drive a wide variety of ADCs, making it ideal for driving mixers, pin diode attenuators, SAW filters, and multi-component discrete devices.

Manufactured on Analog Devices' high-speed SiGe process, the ADL5561 is housed in a compact 3 mm × 3 mm, 16-lead LFCSP package and operates over the -40°C to +85°C temperature range.

Absolute Maximum Ratings

Stresses above the Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device under the conditions described in the operating section of this specification or any other conditions above is not implied. Long-term exposure to absolute maximum rating conditions may affect device reliability.

Pin Configuration and Function Description

Typical performance characteristics

VCC=3.3 V, VCOM=1.65 V, RL=200Ω differential, AV=6 dB, CL=1 pF differential, f=140 MHz, TA=25°C.

Circuit Description

basic structure

The ADL5561 is a low noise, low power, fully differential amplifier/ADC driver that uses a 3.3v supply. It offers three gain options (6dB, 12dB, and 15.5dB), requires no external resistors, and has bandwidths of 2.6GHz (6dB), 2.3GHz (12dB), and 2.1GHz (15.5dB). The differential input impedance is 400Ω at 6dB, 200Ω at 12dB, and 133Ω at 15.5dB. It has a differential output impedance of 10Ω and an output common-mode regulation voltage of 1.25 V to 1.85 V.

The ADL5561 consists of a fully differential amplifier with on-chip feedback and feedforward resistors. Two feedforward resistors on each input make the pin-bundle amplifier set to three different gain configurations, 6dB, 12dB, and 15.5dB.

This amplifier is designed to provide high differential split-loop gain and output common-mode circuitry, allowing the user to vary the common-mode voltage from the VCOM pin. This amplifier is designed to provide exceptional low distortion, low noise and low power consumption at frequencies up to and beyond 300 MHz. Using 3.3v power supply to achieve low distortion and low noise under 40ma.

The ADL5561 is very flexible in terms of I/O coupling. It can be AC coupled or DC coupled with inputs and/or outputs at specified input and output common mode levels. The input to the device can be configured as single-ended or differential with similar distortion performance. Due to the internal connection between the input and output, keep the output common-mode voltage between 1.25 V and 1.85 V for best distortion.

For DC coupled inputs, the input common mode should be between 1V and 2.3V for best distortion. The device features a pp conversion of 2v into 200Ω. If the input is AC coupled, the input and output common-mode voltages are set by VCC/2 without the use of external circuitry. The ADL5561 provides an output common-mode voltage set by VCOM, which allows the ADC to be driven directly without external components such as transformers or AC coupling capacitors, provided that the amplifier's VCOM is within the ADC's VCOM. For DC-coupled requirements, the input VCM must be set by the VCOM pin in all three gain settings.

application information

basic connection

Figure 33 shows the basic connections for operating the ADL5561. VCC should be 3.3 V and each supply pin should be separated from at least one 0.1µF low inductance surface mount ceramic capacitor and placed as close to the device as possible. The VCOM pin (pin 9) should also be decoupled with a 0.1µF capacitor.

The gain of this section is determined by the pin-strappable input configuration. When input A is applied to VIP1 and input B is applied to VIN1, the gain is 6dB (minimum gain; see Equation 1 and Equation 2). When input A is applied to VIP2 and input B is applied to VIN2, the gain is 12 dB (intermediate gain). When input A is applied to VIP1 and VIP2, and input B is applied to VIN1 and VIN2, the gain is 15.5 dB (maximum gain).

Pins 1 through 4, pins 10, and 11 are biased at 1/2 VCC from ground and can be DC-coupled (if within specified input and output common-mode voltage levels) or AC-coupled, as shown in Figure 33.

To enable the ADL5561, the ENBL pin must be pulled high. Pulling the ENBL pin low puts the ADL5561 into sleep mode, reducing ambient current consumption to 3ma.

Input and output interface

The ADL5561 can be configured as a differential input to a differential output driver, as shown in Figure 34. The differential broadband input is provided by an ETC1-1-13 balun transformer, and two 34.8Ω resistors provide 50Ω input matching for three input impedances that vary with the variable gain band. Input and output 0.1µF capacitors isolate the VCC/2 bias from the source and balanced loads. The load must be 200Ω to provide the expected AC performance (see the "Specifications" section and the "Typical Performance Characteristics" section).

The differential gain of the ADL5561 depends on the source impedance and load, as shown in Figure 35.

The differential gain can be determined using the following formula. The RIN values for each gain configuration are shown in Table 5.

Single-ended input to differential output

The ADL5561 can also be configured in a single-ended input to differential output driver, as shown in Figure 36. In this configuration, the gain of the part is reduced because the signal is only applied to one side of the amplifier. Table 6 lists the strappable gain values with the required terminations matched to a 50Ω source using R1 and R2. Note that R1 must be equal to the parallel value of source and R2. Input and output 0.1µF capacitors isolate the VCC/2 bias from the source and balanced load. The performance of this configuration is shown in Figure 11, Figure 14, and Figure 20.

The single-ended gain configuration of the ADL5561 depends on the source impedance and load, as shown in Figure 37.

Single-ended gain can be determined using the following equation. The RIN and RX values for each gain configuration are shown in Table 7.

Gain Adjustment and Interface

The effective gain of the ADL5561 can be reduced using a number of techniques. A matched attenuator network can reduce the effective gain, but this requires adding a separate component that is prohibitive in size and cost. Instead, a simple voltage divider can be implemented using a combination of summing series resistors at the amplifier input and the input impedance of the ADL5561, as shown in Figure 38. The shunt resistor is used to match the impedance of the previous stage.

Figure 38 shows a typical implementation of the divider concept, which effectively reduces gain by adding attenuation at the input. For frequencies less than 100 MHz, the input impedance of the ADL5561 can be modeled as actual 133Ω, 200Ω, or 400Ω resistors (differential) for maximum, mid, and minimum gain, respectively. Assuming that the frequency is low enough to ignore the shunt reactance at the input and high enough to ignore the reactance of a moderately sized AC coupling capacitor, the insertion loss Il due to the shunt divider can be expressed as:

The necessary shunt element RSHUNT to match the source impedance RS can be expressed as:

Table 8 summarizes the insertion loss and combined power gain for multiple parallel resistor values. When using Equation 3 and Equation 4, careful attention to source resistance and input impedance is required. They must be considered before assuming that the ADL5561 and the ac-coupling capacitor's input impedance contribute negligible reactance.

ADC interface

The ADL5561 is a high output linear amplifier optimized for ADC interface. When using the ADL5561, the designer has several options available. Figure 39 shows a simplified wideband interface with the ADL5561 driving the AD9445. The AD9445 is a 14-bit, 125 MSPS ADC with buffered wideband input.

For best performance, the ADL5561 should be driven differently using the input baluns. Figure 39 uses a broadband 1:1 transmission line balun followed by two 34.8Ω resistors in parallel with the three input impedances (varies with the gain selection of the ADL5561) to provide a 50Ω differential input impedance. This provides broadband matching to a 50Ω supply. The ADL5561 is ac-coupled to the AD9445 to avoid common-mode dc loading. The 33Ω series resistors help improve the isolation between the ADL5561 and any switching currents present in the analog-to-digital sample-and-hold input circuit. The AD9445 input presents a 2 kΩ differential load impedance and requires a 2 V pp differential input swing to reach full scale (VREF=1 V).

This circuit provides variable gain, isolation, and source matching for the AD9445. Using this circuit with the ADL5561 at a gain of 6db achieves an SFDR performance of 87dbc at -3db bandwidths of 140mhz and 760mhz, as shown in Figure 40 and Figure 41.

Wideband frequency response is an advantage in wideband applications such as predistortion receiver design and instrumentation applications. However, by designing for a wide analog input frequency range, the SNR performance of the cascade is degraded due to high frequency noise aliasing into the desired Nyquist zone.

Another narrowband approach is shown in Figure 42. By designing a narrow bandpass antialiasing filter between the ADL5561 and the target ADC, the output noise of the ADL5561 outside the expected Nyquist zone can be attenuated, helping to maintain the ADC's usable signal-to-noise ratio. In general, the signal-to-noise ratio is improved by several decibels when including a reasonably sequential antialiasing filter. In this example, a low loss 1:1 input transformer is used to match the ADL5561 balanced input to a 50Ω unbalanced source to minimize insertion loss at the input.

Figure 42 is optimized for analog devices driving some popular unbuffered ADCs such as the AD9246, AD9640, and AD6655. Table 9 includes recommendations for antialiasing filter components for commonly used IF sample center frequencies. Inductor L5 works in parallel with the input capacitance of the on-chip ADC and a portion of the capacitance provided by C4 to form a resonant cavity circuit. The resonant cavity helps ensure that the ADC input looks like a real resistor at the target center frequency. The L5 inductor shorts a dc input on the DC side, which introduces a zero in the transfer function. Additionally, AC coupling capacitors introduce additional zeros in the transfer function. The resulting overall frequency response has a bandpass characteristic that helps suppress noise outside the expected Nyquist zone. Table 9 provides preliminary recommendations for prototyping. Some empirical optimization may be required to help compensate for actual PCB parasitics.

Layout Considerations

High-Q inductive drivers and loads, as well as stray transmission line capacitance combined with package parasitics, can form resonant circuits at high frequencies, resulting in excessive gain peaking or possible oscillations. If RF transmission lines are used to connect inputs or outputs, they should be designed to minimize stray capacitance at the input/output pins.

In many board designs, the signal trace width should be minimal when the driver/receiver is more than one-eighth the wavelength away from the amplifier. This non-transmission line configuration requires that the underlying and adjacent ground and low impedance planes be removed from the signal lines.

Welding Information

Underneath the chip scale packaging, there is an exposed compression paddle. This lever is internally connected to the ground of the chip. Solder the switch to a low impedance ground plane on the PCB to ensure the specified electrical performance and provide heat dissipation. To further reduce thermal impedance, ground planes on all layers under the paddle should be stitched together with vias.

Evaluation Committee

Figure 45 shows a schematic diagram of the ADL5561 evaluation board. The board is powered from a single supply in the 3 V to 3.6 V range. The power supplies are decoupled by 10µF and 0.1µF capacitors. Table 14 details the various configuration options for the evaluation board. Figure 46 and Figure 47 show the components and circuit layout of the evaluation board.

To achieve the minimum gain (6 dB in a 200Ω load), 0Ω resistors must be installed at R3 and R4, leaving R5 and R6 open, thus using Input 1 (VIN1 and VIP1). For an input impedance of 50Ω, R1 and R2 must be 33Ω.

Likewise, driving input 2 (VIN2 and VIP2) achieves an intermediate gain (12 dB in a 200Ω load) by installing 0Ω across R5 and R6 and leaving R3 and R4 open. For an input impedance of 50Ω, R1 and R2 must be 29Ω.

For maximum gain (15.5dB in a 200Ω load), drive both inputs by installing 0Ω resistors at R3, R4, R5, and R6. For an input impedance of 50Ω, R1 and R2 must be 40.2Ω.

Balanced input and output connectors are converted to single-ended with a pair of BALUNs (M/a-COM ETC1-1-13). The balun at input T1 provides 50Ω single-ended to differential conversion. The output balun, T2 and matching components are configured to provide impedance transformation of 200Ω to 50Ω with an insertion loss of approximately 17db.

Dimensions