feature

Double marking equipment

Part number and DSCC

Drawing Numbers

Manufacturing and Testing

MIL-PRF-38534 certified production line

QML-38534, Grades H and K Five Sealed Package Configurations Performance Guaranteed Over -55°C to + 125 °C

High speed: 10 M Bit/s

CMR: Typically greater than 10000 V/µs

1500 V DC withstand test

Voltage

Voltage of 2500 V DC withstand test HCPL-565X

High radiated immunity

6N137 , HCPL-2601, HCPL-2630/-31 functional compatibility reliability data TTL circuit compatibility

application

military and space

High reliability system

transportation, medical and

life critical system

line receiver

Voltage level shift

Isolated Input Line Receiver

Isolated Output Line Driver

Logic Ground Isolation

harsh industry

surroundings

Computer Isolation, Communication and Test Equipment Systems

illustrate

The units are single, dual and quad channel, hermetically sealed optocouplers. Product is capable of operation and storage over the full military temperature range and is purchased by way of standard product or full MIL-PRF-38534 Class H or K tested or from the appropriate DSCC drawing. All equipment is manufactured and tested for MIL-PRF-38534 certified circuits and is included in the DSCC Qualified Manufacturers List - 38534 for Hybrid Microcircuits. Four-channel devices are available in 16-pin dip through hole packaging by special order.

Each channel contains a gaassp radiation test result. The reason for obtaining usage data from a part of the device is for reliability and certain limitations to represent the performance of other components. These similarities make all the materials the same package assembly process as previously described. In addition to packaging changes and limitations, occasional exceptions are due to all parts being the same. The characteristic specifications and performance shown in the figures, operating conditions, electrical maximum ratings, and recommendations listed in this data sheet, are absolutely used for each channel of each device (emitter and detector) because the same electronic mold is packaged and led style. Each part has a microcircuit diagram (SMD) details see table. Standard options. See selection guide for various lead bent and plated chip carriers (housing outline 2). (case profile F), lead-free ceramic surface mount dipping flat packages are E) and 16-pin through hole (case profile P and these parts are available in 8-pin and 16-pin. Package style HCPL-5650 series require up to 2500 VDC Isolation Voltage Applied 1000 V/µs Spec Mode Transient Immunity Provides Guaranteed Common Stock Transistor. Internal Guard Plate Collector Schottky Clamp Detector Output Open Circuit High Speed Photon Detector. This optically couples to the integrated circuit to emit light Diode class E

view. "CC chip carrier) package has separate V and ground. Single channel DIP has an enable pin 7. Lead-free ceramic

Absolute Maximum Ratings

Package power consumption, PD (per channel) 200 mW

Output voltage, VO (per channel) 7V

Output power consumption (per channel) 40 mW

Output current, IO (per channel) 25mA

Supply voltage, VCC (1 min max) 7V

Reverse input voltage, VR (each channel) 5V

Input power consumption (per channel) 35 mW

Average input forward current, if average (per channel) 20mA

Duration ≤ 1 ms) 40 mA

Peak forward input current, if PK, (per channel,

Lead solder temperature 260°C for 10 seconds

Junction temperature TJ case temperature, TC...+170°C

Operating temperature, TA….-55°C to +125°C

Storage temperature range, TS…..-65°C to +150°C (up to +125°C without derating)

Output voltages up to 20 V can be selected.

Transmitter input voltage VE5.5V

Schematic diagram of 8-pin ceramic impregnation single channel

Electrostatic discharge classification

A capacitor of 0.01µF to 0.1µF must be connected between VCC and ground. Note Enable pin 7. outer packaging type

HCPL-6630/31/3K and HCPL-6650/51/5K (dots), 3-stage 6N134, 6N134/883B, HCPL-5630/31/3K, HCPL-5650/51, HCPL-5600/01/0K first-stage (MIL-STD-883, Method 3015) Class E

-55°C to +125°C unless otherwise specified) AE

Test parameters for JEDEC registered parts were determined.

Electrical Characteristics (continued) TA = -55°C to +125°C unless otherwise specified

Test parameters for JEDEC registered parts were determined.

notes:

1. Each channel.

2. All devices are considered to be two terminal devices; II-O is the measured output leads or terminals shorted together between all input leads or terminals shorted together.

3. Measured between each input pair shorted together and all output connections for that channel shorted together.

4. Measured between adjacent shorted input pairs of each multi-channel device.

5. tPHL propagation delay is the edge of the output pulse measured from the 50% point of the leading edge of the input pulse to the 1.5 V point of the leading edge. From the 50% point of the trailing edge of the input pulse to the 1.5 V point of the trailing edge of the output pulse.

6. The HCPL-6630, HCPL-6631 and HCPL-663K dual channel parts work as two independent single channel units. Use the channel parameter limits for each channel of the single.

7. CML is the maximum rate of rise of the common mode voltage that can maintain the output voltage in a logic low state. (VO<0.8V). CMH is the maximum rate of decline of the common-mode voltage that can be maintained in the output voltage. Logic high state (VO>2.0V).

8. This is a transient withstand test, not a working condition.

9. A bypass capacitor (0.01 to 0.1 μF, ceramic) must be connected from VCC to ground. The total lead length between the ends of the external capacitor and isolator connections should not exceed 20 mm.

10. A high logic state on the enable input does not require an external pull-up.

11.tELH enable propagation delay is measured from the 1.5v point on the trailing edge of the enable input pulse to the point on the trailing edge of the 1.5v output pulse.

12.tEHL enable propagation delay is measured from the 1.5v point on the leading edge of the enable input pulse to the point where 1.5v is on the leading edge of the output pulse.

13. Standard parts are 100% tested at 25°C (groups 1 and 9). SMD and 883B parts at 25, 125 and -55°C (subgroups 1 and 9, 2 and 10, 3 and 11, respectively).

14. Parameters are tested after design and process changes as part of initial device characterization. Parameters are guaranteed to have specified limits for all batches not specifically tested.

15. Not required for models 6N134, 6N134/883B, 8102801, HCPL-268K and 5962-9800101.

16. Required for 6N134, 6N134/883B, 8102801, HCPL-268K and 5962-9800101 models.

17. Not required for HCPL-5650, HCPL-5651 and 8102805 models.

18. For HCPL-5650, HCPL-5651 and 8102805 models only.