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2022-09-23 10:21:31
Interpretation of CANDT test item "Bus input voltage limit test"
CANDT voltage limit test summary: In order to ensure the consistency of the physical layer of the CAN bus, the CANDT system refers to the ISO11898-2 standard and mainstream car company standards to measure the parameters related to the CAN node. This paper mainly tests the CANDT test item - the bus input voltage limit value test for interpretation.
The main source of reference
The evaluation of the bus input voltage limit test item includes the recessive input voltage limit and the dominant input voltage limit test. The principles of the reference ISO11898-2 standard are as follows:
1. CAN node recessive input voltage limit
With a CAN node IC protocol set to bus idle, the detectable recessive bit input limit should be measured by the circuit of Figure 1. where the value of I refers to the value of the current that can produce the maximum differential input voltage that allows the node to detect a recessive bit in the recessive state. The voltage of the voltage source U is:
V=VCAN_H minimum common mode voltage in recessive state
Or V=VCAN_H maximum common mode voltage in recessive state - Vdiff maximum in recessive state
Figure 1 ISO11898-2 Recessive Input Voltage Limit Principle
2. CAN node dominant input voltage limit
A CAN node detects the measurement method of the dominant bit input limit as shown in Figure 2. This node should send data cyclically. where the value of I refers to the value of the current that produces the minimum differential input voltage that allows the node to detect a dominant bit in the recessive state. The voltage of the voltage source U is:
V=VCAN_L minimum common mode voltage in dominant state
Or V=VCAN_L maximum common-mode voltage maximum in dominant state—Vdiff maximum in dominant state
Figure 2 The principle of ISO11898-2 dominant input voltage limit
2. Principle of CANDT test
The CAN bus input voltage limit is the differential voltage range that the DUT can normally identify in the process of receiving messages. According to the definition of ISO11898-2, the upper limit of the recessive level is 0.5V. When the differential level equal to 0.5V appears on the bus, The DUT should be able to correctly identify the recessive state and send the message normally; the lower limit of the dominant level is 0.9V. When a differential level equal to 0.9V appears on the bus, the DUT should be correctly identified as the dominant level state and Stop sending messages. Even if there is common mode interference within a certain range on the bus, the above identification can be performed correctly. The block diagram of CANDT test principle is shown in Figure 3 and Figure 4, where U1 in the block diagram is the DUT supply voltage, U2 is the common mode voltage, and U3 is the differential level.
Figure 3. The principle block diagram of CANDT equipment recessive input voltage limit test
Figure 4. The principle block diagram of the dominant input voltage limit test of CANDT equipment
Note: In the ISO11898-2 standard, the current source is required to increase the differential voltage value. Because the output capacitance of the current source itself is large, the system response is slow, and it is not suitable for simulating the current source. Here, the voltage source is used in series resistance. Equivalent current source.
3. CANDT test process
1. Recessive input voltage limit test
①As shown in the connection state of the test principle block diagram in Figure 3, the DUT and CANDT need to communicate normally;
②Disconnect the voltage source U3, adjust the voltage source U2, and gradually adjust the common mode voltage to 6.5V or -2V. During this period, the DUT should be able to send messages normally;
③Adjust the voltage source U3, gradually adjust the differential level to the upper limit value of the recessive level of 0.5V, and judge whether the DUT can send the message normally. If it can, it means that the test has passed;
2. Dominant output voltage limit test
①As shown in the connection state of the test schematic diagram in Figure 4, the DUT and CANDT need to communicate normally;
②Disconnect the voltage source U3, adjust the voltage source U2, and gradually adjust the common mode voltage to 6.5V or -2V. During this period, the DUT should be able to send messages normally;
③ Adjust the voltage source U3, gradually adjust the differential level from the upper limit of the recessive level 0.5V to the lower limit of the dominant level 0.9V, and judge whether the DUT stops sending messages. If it stops, it means the test is passed;
4. CANDT test results
According to the test process, the test results of CANDT software are shown in Figure 5:
Figure 5 Bus input voltage limit measurement results
5. View waveform details
Here is an example of the recessive input voltage upper limit test. Recessive input voltage upper limit test, that is, when the voltage source U2 adds a common-mode voltage of 6.5V to CANH, and the voltage of the voltage source U3 is adjusted to 0.5V, the DUT should still be correctly identified as a recessive state and send normally message, and the message view corresponding to the result is shown in Figure 6:
Figure 6 Waveform view corresponding to recessive input voltage upper limit test
The waveform details after adding a 6.5V common-mode voltage and a differential level of 0.5V are shown in Figure 7. When the bus is in an idle state, the voltages of CANH and CANL are normally pulled up to near the common-mode voltage. In the driving state, the voltages of CANH and CANL are similar to the normal voltages in the dominant and recessive states. During the driving state, due to the influence of the common-mode voltage during the level conversion, the recessive or dominant levels may be slightly different. slope.
Figure 7 Common mode voltage 6.5V, recessive level 0.5V
Summarize:
The purpose of the bus input voltage limit test is that under the common mode interference, the DUT can correctly identify the bus input voltage of the limit value, and verify whether the parameter meets the reference standard. Of course, in order to ensure the consistency of the physical layer of the CAN bus, we also need to measure other parameters, and we will introduce other test items of CANDT to you one after another.