illustrate

The HCPL-4506 and HCPL-0466 contain a GaAs LED, while the HCPL- J456 and HCNW4506 contain an AlGaAs LED. LED with integrated high gain optically coupled photodetector. Interaction between devices with minimal propagation delay difference makes these optocouplers the best solution for increasing inverter efficiency switching dead time. An on-chip 20 kΩ output pull-up resistor enables short-circuiting of output pins 6 and 7 by eliminating an external pull-up resistor in a common IPM application. A typical IPM application is given.

100a78d1379b.png" title="QQ picture 20200115101821.png" />

A 0.1µF bypass capacitor connection is recommended between pins 5 and 8.

feature

Performance specified for regular IPM applications

Industrial temperature range: -40°C to 100°C

Fast maximum propagation delay

tPHL=480ns

tPLH=550ns

Minimize pulse width distortion

PWD=450 ns

15 kV/µs minimum common mode transient immunity at VCM=1500 V

At IF=10mA, CTR>44%

Safety Approvals: UL Recognized - 3750 V rms/1min for HCPL-4506/0466/J456 - 5000 V rms/1min for HCPL-4506 Option 020 and HCNW4506CSA Approved IEC/EN/DIN EN 60747-5-2

-VIORM=560 V peak for HCPL-0466 option 060

-VIORM=630 V peak for HCPL-4506 option 060

-VIORM = 891 V peak for HCPL-J456

- For HCNW4506, VIORM=1414 V peak

application

IPM isolation

Isolated IGBT/MOSFET gate drive

AC and Brushless DC Motor Drivers

Industrial inverter

Insulation and Safety Related Specifications

All Avago datasheets report the leakage and gaps inherent in the optocoupler assembly itself. These dimensions are the starting point requirements that equipment designers need when determining circuit insulation. However, once mounted on a printed circuit board, minimum creepage and clearance requirements must meet the specified standards for individual devices. The surface of the printed circuit board between the solders for creepage must account for the rounded corners of the input and output leads. There are recommended techniques such as grooves and ribs that can be used for printed circuit boards to achieve the desired creepage distance and cleanliness. Creep and clearance distances also vary based on factors such as pollution levels and insulation levels.

IEC/EN/DIN EN 60747-5-2 Insulation related characteristics

For a detailed description of the following, please refer to the optocoupler section of the Designer's Catalog under Normative Information (IEC/EN/DIN EN 60747-5-2) Method a and Method b partial discharge test curves.

notes:

These optocouplers are only suitable for "safe electrical isolation" within the safety limit data. The maintenance of safety data shall be by means of protective circuits. Insulation characteristics according to IEC/EN/DIN EN 60747-5-2. Surface mount is classified as Class A according to CECC 00802.

Packaging Features

Above recommended temperature (TA=-40°C to 100°C) unless otherwise specified.

All typical values at 25°C, VCC=15 V.

I/O instantaneous withstand voltage is a dielectric voltage rating and should not be interpreted as an I/O continuous rated voltage. For continuous voltage ratings, refer to the IEC/EN/DIN EN 60747-5-2 Insulation-Related Characteristics table (if applicable) Equipment Level Safety Specifications or Avago Application Note 1074 entitled "Optocoupler Input Output Continuous Voltage",

notes:

1. Linearly reduce the free air temperature above 90°C at a rate of 0.8 mA/degree Celsius.

2. Linearly reduce the free air temperature above 90°C at a rate of 1.6 mA/°C.

3. Linearly reduce the free air temperature above 90°C at a rate of 3.0 mW/°C.

4. Linearly reduce the free air temperature above 90°C at a rate of 4.2 mW/°C.

5. The current transfer ratio expressed as a percentage is defined as the ratio of the output collector current (IO) to the forward LED input current (IF) multiplied by 100.

6. A device that is considered a double-ended device: pins 1, 2, 3, and 4 are shorted together, and pins 5, 6, 7, and 8 are shorted together.

7. According to UL 1577, each optocoupler is verified by applying an insulation test voltage (leakage) of ≥ 4500 V rms for one second (detection current limit, II-O≤5μA).

8. According to UL 1577, each optocoupler is proof tested by applying insulation test voltage ≥4500 V rms for 1 second (leakage detection current limit, Ii-o≤5μA).

9. According to UL 1577, each optocoupler is proof tested by applying insulation test voltage ≥ 6000 V rms for 1 second (leakage detection current limit, II-O ≤ 5 μA).

10. If applicable, this test is carried out before the 100% production test, as shown in the IEC/EN/DIN EN 60747-5-2 Insulation-Related Characteristics table.

11. Pulse: f=20kHz, duty cycle=10%.

12. An internal 20 kΩ resistor can be used by shorting pins 6 and 7 together.

13. Since the internal resistance tolerance, and propagation delay depends on the load resistance value, the performance can be improved by using an external 20 kΩ 1% load resistor. See Figure 8 for more information on how the propagation delay varies with load resistance.

14.RL=20kΩ, CL=100pf load represents typical IPM (Intelligent Power Module) load.

15. See option 020 data sheet for more information.

16. Using a 0.1µF bypass capacitor connected between pins 5 and 8 can improve performance by filtering power line noise.

17. Difference between tPLH and tPHL between any two devices under the same experimental conditions. (See the IPM Dead Time and Propagation Delay Specifications section.)

18. Common mode transient immunity in logic high is the maximum tolerable DVCM/dt of the common mode pulsed VCM to ensure that the output will remain in a logic high state (ie, VO > 3.0V).

19. Common mode transient immunity in logic low is the maximum tolerable DVCM/dt of the common mode pulsed VCM to ensure that the output will remain in a logic low state (ie, VO<1.0V).

20. For any given device, the pulse width distortion (PWD) is defined as |tPHL-tPLH|.

The LED driver circuit with ultra-high CMR performance considers that there is no detector shielding. The main reason for the failure of the optocoupler CMR is that the input side of the optocoupler passes through the package to the detector IC as shown in the figure. The HCPL-4506 uses detectors in series to improve CMR performance. Integrated circuits with optically transparent Faraday shields will capacitively couple current from sensitive integrated circuits. However, this shielding does not eliminate the LED and optocoupler output pins and output grounds as shown. This capacitive coupling causes the LED current during perturbing common-mode transients to be a major source of shield CMR failure in the optocoupler. The main design goal of high CMR is that the LED driver circuit maintains the state (on or off) of the LED during normal operating common-mode transients. For example, the recommended application circuit (figure) can achieve 15kV/µs CMR while minimizing component complexity. Note that it is recommended to keep the LED off when the gate is high in the figure. Another reason for the failure of the shielded optocoupler CMR is directly coupled to CLEDO1 and CLEDO2 in the optocoupler output pin diagram. Several factors influence the impact and strength of direct coupling including: use of internal or external output pull-up resistors, LED current setting resistor placement, and connection to unused input package pins, and optocoupler output capacitor value (CL). To keep the LEDs in their proper state and minimize the effects of direct coupling, in the next two sections. CMR with LEDs (CMRL) High CMR LED driver circuits must keep the LEDs on during common-mode transients. This is done by making the LED current too large to exceed the input threshold, so it doesn't pull below the threshold instantaneously. A minimum LED current of 10mA is recommended to provide sufficient margin of 5.0mA over the maximum (see Figure 1) to achieve 15kV/µs CMR. Capacitive When using the internal load resistor, the coupling is higher (due to CLEDO2) and requires IF=16mA to get 10kV/µs CMR.

LED current setting resistor effect placement

The driver circuit keeps the LED lit during transients and outputs with a direct-coupled optocoupler. For example, the LED resistor diagram 18 is connected to the anode. Figure 19 shows the AC equivalent circuit transient of Figure 18 at common mode. During a+dVcm/dt in Figure 19, the current is available on the LED anode (Itotal) by a series limiting resistor. The LED current (IF) decreases from its DC value equal to the currents flowing through Clap and Cledo. It gets worse because the effect of the current through CLEDO1 is to output high (towards the CMR fault) at the same time the LED current is decreasing. The recommended LED driver circuit for this reason (Figure 15) would have a current setting resistor in series with the LED cathode. FIG. 20 is a common mode transient of the AC equivalent circuit of FIG. 15 . In this case, the LED current does not drop during the +dVcm/dt transient because the current flowing through the package capacitance is provided by the power supply. During the -dVcm/dt transient, however, the LED current reduces the current flowing through the Clayton. However, since the current flows in CLEDO1, the CMR performance is improved during negative transients, keeping the output low. Coupling to the LED and output pins are also subject to the connections of pins 1 and 4. If the CMR is limited by the LED turn-on current perturbation, like the recommended driver circuit (Figure 15), pins 1 and 4 should be connected to a common input circuit. However, if the CMR performance is limited by direct coupling to the output, pins 1 and 4 should remain unconnected when the LED is off.

CMR (CMRH) when LED is off

The high CMR LED driver circuit must keep the LED off during common mode transients (VF≤VF(off)). For example, the current flowing through CLEDN during the a+dVcm/dt transient in Figure 20 is a combination of parallel LEDs and series resistors. As long as the voltage developed across the resistor is less than VF (off) the LED will remain off and no common mode fault has occurred. The 100 pF capacitor from pins 6-5 will prevent the output from falling below the threshold even if the LED lights up momentarily. Recommended LED driver circuit (Figure 15) threshold during 15kV/μs transient at VCM=1500V at minimum optocoupler output voltage and 3V IPM. Adding a diode in parallel with the resistor gives additional margin, as indicated by the dotted line requirement in Figure 20, via the LED (off) below VF. Due to the open collector drive circuit, as shown in Figure 21, at a+dVcm/dt transient, it is not suitable for applications requiring ultra-high CMRH performance. Figure 22 is the AC equivalent circuit transient of Figure 21 in common mode. Essentially all current flowing through the CLEDN during the +dVcm/dt transient must be driven by the LED. CMRH faults can occur at dV/dt rates where the current through the LED and CLEDN exceeds the input threshold. Figure 23 is an alternative driver circuit that achieves ultra-high CMR performance by shunting the LEDs in the off state

IPM Dead Time and Propagation Delay Specifications

The HCPL-4506 family includes a normative "dead time" designed to help designers minimize propagation delay differences in their power inverter designs. Dead time is when the high-side and low-side power transistors (Q1 and Q2 in Figure 24) are turned off. Any overlap of Q1 and Q2 conditions will cause large currents to flow through the high and low voltage motor rails. In order to minimize the dead time, the designer must consider the propagation delay characteristics of the optocoupler and the characteristic circuit of the gate drive of the IPM-IGBT. It is important to know the minimum and maximum turn-on (TPHL) considering only the optocoupler (the characteristic drive circuit of the IPM IGBT gate can be analyzed in the same way). and shutdown (tPLH) propagation delay specification, preferably within the desired operating temperature range. The limit of zero dead time occurs when the input to Q1 is turned off at the same time as the input to Q1 is turned on. This condition determines the minimum delay between LED1 turning off and LED2 turning on, the delay associated with the worst-case optocoupler propagation waveform, as shown in Figure 25. Minimally in Figure 25, the signal delay (tPLH max - tPHL) from LED1 off when turning on LED2. Note that the propagation delays used to calculate the PDD are performed at the same temperature due to the optocouplers considered, usually mounted on each other. Very close. (Specifically, tPLHmax and tPHLmin in the previous formula differ from tPLHmax and tPHLmin over the full operating temperature range specified in the data. This delay is the maximum specified for the propagation delay variance specification. The operating temperature range is 450ns for the HCPL-4506 series from -40°C to 100°C. Using the maximum propagation delay LED signal delay variance ensures that the minimum dead time is zero, but it does not tell the designer what the maximum dead time is. The maximum dead time occurs In a highly unlikely case, an optocoupler. Has the fastest tPLH and the slowest tPHL in the same converter segment. The maximum dead time in this case becomes the sum of the spread between tPLH and tPHL Propagation delay as shown in Figure 26. Maximum dead time is also equivalent to the difference between maximum and minimum propagation. Delay difference specification. Maximum dead time (due to optocoupler) HCPL-4506 series at -40°C 600 ns (= 450 ns - (-150 ns) over the operating temperature range to 100°C.