L6585DE PFC an...

  • 2022-09-15 14:32:14

L6585DE PFC and ballast control combination integration circuit (1)

Features

PFC part

-The transition mode PFC

Protection

- Overvoltage protection

- Feedback disconnection

- IOU lock

–PFC clustering circle saturation detection

–THD optimizer

Half bridge section

] - Preheating and ignition phase

Independent programming

-3%oscillator accuracy

-1.2μs dead area

- programmable and programmable and can be programmed and Accurate life ending

Protective conforming to all ballasts

Configuration

- Intelligent hard exchange detection

-The fast thermal voltage control with a straw circle

Saturation detection

- Semi -bridge overcurrent control

Electric characteristics

vcc u003d 15 v, TA u003d 25 ° C, CL u003d 1 NF, COSC u003d 470 PF, RRUN u003d 47 KΩ, unless there are other regulations

1. Tracking. The parameters in the middle

2. The statistical characteristics are within the temperature range of -125 ° C.

3. The pulse strings have been sent to the HBCS pin, F u003d 6 kHz; the pulse duration is the duration of the pulse; The ""TON""

device description shown in the note

L6585DE embeds the relevant driver required for high -performance PFC controllers, ballast controllers and all manufacturing electronic ballasts. The PFC part is implemented under the transition mode. The current mode control runs, which provides a high -line multipliers, including a THD optimizer, allows extremely low THDs, and even under a large range of input voltage and load conditions. The PFC output voltage consists of a voltage mode error amplifier and an accurate internal voltage benchmark. The ballast controller provides the designer with a very accurate oscillator, a managing all logic

operation steps and full set of protection functions:

The programmable life termination detection, which conforms to light pair pair pair Earth and capacitor configuration

Overcurrent protection with current limiting or choking saturation

Hard exchange event detection

PFC (300 mAh power and 600 mAh The receiver) and the semi -bridge (290 mia and 480 mm) also allowed the ballast to design a very high output power (up to 160 watts).

VCC part

L6585DE is powered by voltage between VCC pins and GND pins. Owl voltage locking (UVLO) prevents IC from working to ensure the correct behavior of the internal structure when the power supply voltage is too low. The internal voltage clamping the voltage is limited to about 17 volts, which can provide a current of up to 20 mA. This is because it cannot be used directly as a clamp for the charge pump (the current peak is usually a few hundred milliamia), but it can be easily used at the time of startup, so that the VCC capacitor or in the preservation mode is used to maintain IC's IC. Activation, for example, the connection via VCA input resistance. In addition to the volume capacitor ( gt; 1 μF), it is recommended to place 100 NF ceramic capacitors near the VCC pin.

PFC部分

TM PFC操作

PFC阶段包含实现过渡模式PFC所需的所有特性控制器

[ 123] Due to the high -performance error amplifier and very accurate internal voltage benchmark, the non -inverter input of E/A is fixed to 2.52 V ± 2%. The control loop reacts to make the inverter input reach the same voltage. Connect to high -voltage rails to INV pin, and pass the voltage through the pressure segmentation. The output voltage is easy to set. The output of E/A can be used to control the loop network with RC, or more commonly, connect a simple capacitor between INV and COMP pins. The output voltage of E/A is also fed to the multiplier. This block will double the output of E/A on the multiple feet. The generated voltage will be used as a threshold for current input. Internal clamps limit the threshold to maximum value equal to 1 V. Figure 5 gives the characteristic curve of the multiplier.

ZCD input can directly connect to the auxiliary winding of the PFC choiring ring. When the current is zero, the MOSFET can be turned on. This sells high -current capacity of internal card holes, so that it can adapt to a very wide input voltage range. When starting, when the PFC stifling circle is not power -on, the internal startup is about 15 kg of PFC door drive to the repetitive frequency. When the current reaches the threshold, the MOSFET is turned off and turned on when the current of the choice ring reaches zero, a triangular input current is the result of the multi -voltage modulation. Power supply to MULT PIN with power supply has achieved power factor correction and THD.

Ahead of the edge

Generally filter the current fluid voltage through the RC network, to avoid errors from the capacitor of MOSFETMOSFET during the discharge current related to parasitic drain. This screening generates a delay between actual threshold cross and input trigger. During this period, the PFC electrical sensor current increases, and the choice circle may be saturated. The cutting -edge blank structure enables the PFCC input to activate after only 200 NS (typical values) after the PFG is turned on. This allowsUse an inductor with low saturation current. However, if saturation occurs, the voltage of the stiffened circle saturation protection will reach 1.7V or more at the pin PFCC.

THD optimizer function

When the input voltage passes through zero, the PFC choiring circle cannot store energy because its voltage is very low. This may lead to severe cross distortion and subsequent THD degradation. A small offset voltage superposition can reduce this problem on the MULT voltage. The internal THD optimizer improves the performance when the power supply is reached; this reduces the cross distortion and avoids the introduction of offset.

Overvoltage protection

can detect two different overvoltage protection: dynamic overvoltage, usually due to the excessive input voltage, the load transition quickly and static overvoltage.

Dynamic OVP

CTR pins are connected to the high -pressure rail through a separator. If the voltage is higher than 3.4 V here, the PFC gate driver will stop until the voltage returns to the threshold below the threshold. This limits the risk of clutch saturation and MOSFET damage.

Static OVP

Stable overvoltage may cause abnormal behaviors of two PFCs (for example, because the input voltage is higher than the PFC output voltage) and the ballast (such as overheating, overcurrent light current, overcurrent currents , Working point of capacitor mode). A stable overvoltage will cause compensation sales to low -saturation (about 2.25 V) transition. The fact is that L6585DE believes that it is a static overvoltage event, and the TCH cycle is started. After this cycle, if the COMP pin is saturated, the IC is locked in a low consumption state

mode.

Disable L6585DE

CTR pins can be used to turn off ICs when continuously turning on power. When the CTR is pulled below 0.75 V, the IC stops, and the internal logic is reset. When the CTR is lifted, IC starts from the new preheating order. This function can be locked only due to fault protection intervention when it is not available.

Protection feedback is broken

A very fast output voltage surge may damage the upper resistor of the divisioner input INV pins, causing the feedback to disconnect. In this case, the E/A saturation is very high PFC gate driver can open MOSFET for a long time. The output voltage increases rapidly, and even overvoltage and overvoltage may reach a high value trigger. If vinv lt; 1.2 V and trigger dynamic overvoltage protection, the activation feedback is broken.

PFC overcurrent protection

Saturated in the PFC choke or waves from the input end, due to the breakdown of the MOSFET diode. The latter situation is observationOvervoltage to PFC output. In these two cases, the PFC phase stops, and the HB stage continues to switch. This protection is not locked: Once the PFCC drops below 1.7 V, the PFC drive is restarted.

Daoxian section

Half -bridge driver and integrated self -lifting diode

Half -bridge driver can provide 290 mm Anyuan current and 480 mAh current. This allows them to effectively drive large MOSFETS CG as high as 2.2NF. The high -side MOSFET is driven by a self -lifting structure, reducing the number of external components.

Normal Starting Instructions

Reference Figure 7, the normal startup process is as follows:

The reference value is established, the RF and EOLP pin bias, the EOI pin is pulled down, and the TCH pin starts the source current of 31 μA. The frequency of the semi -bridge is generated by the internal CCO, which connects COSC and uses radio frequency current as the control signal. With EOI pins low, the start -up frequency will be due to current and RPRE and RRUN (see typical application diagrams).

2. Preheating: TCH pins continue to power 31 μA until the voltage reaches 4.63 V, so it is in a high impedance state. Because this sells a RC parallel network network, the voltage on this pins has decreased. When the voltage reaches 1.5 V, the TCH pin is pulled down and the preheating time is over. In this process, the EOI pins are pulled down, and the frequency of the semi -bridge is the start -up frequency. The edge is in a state of activity during this period to avoid detecting hard switching events. At this stage, it is very common.

3. At the end of the TCH cycle, the EOI pin is kept idle in high impedance mode. Therefore, the capacitors connected between EOI and the ground are charged RPRE through RF. The current generated by the radio frequency foot decreases, and the frequency is with it. The decrease in the exponent of the switching frequency causes the linear increase indicator voltage. When the light voltage reaches the impact value, light the light. The ignition time is set by the value of RPRE and CIGN. The ignition current control protection, the anti -saturation protection of the ballast, and the faint activation of the front edge.

4. Operating mode: When the EOI voltage reaches 1.9V, the IC enters the operating mode, and the switching frequency is only set by RRUN. The current control protection and antibody clutching ring is now activated. The threshold is low.

The oscillator characteristic curve represents the frequency of the semi -bridge and the resistance R of the radio frequency pins and grounding. During the preheating process, R is equal to RRUN in parallel with RPRE, and the running mode R is equal to RRUN. Each curve and COThe value of SC capacitors is shown in Figure 10.COSC values are measured between pin 1 (OSC) and 15 (GND); for other capacitors, please refer to AN2870.In the preheating and running mode, the correct value of R can find the curve with the selected capacitors and the selected capacitor and the FPRE and frun