feature

Bandwidth: 50MHz, 5V; Low Noise: 4.5nV/√Hz; Offset Voltage: 100 μV typical, specified over full common-mode range; Slew rate: 41 V/μs; Rail-to-rail input and output swing; Input Bias Current: 1pa; Single Supply Operation: 2.7 V to 5.5 V; Space-Saving MSOP and SOIC_N Packages.

application

Optical communications; laser source drivers/controllers; broadband communications; high-speed analog-to-digital converters and digital-to-analog converters; microwave link interfaces; mobile phone PA control; video line driver audio.

General Instructions

The AD865x family consists of high precision, low noise, low distortion, rail-to-rail CMOS operational amplifiers that operate from 2.7V to 5.5V.

The AD865x family consists of rail-to-rail input and output amplifiers with 50MHz gain bandwidth, 100µV common-mode voltage offset, and is powered by a 5V supply. It also has low noise - 4.5nv/√Hz.

The AD865x family can be used in communications applications such as cell phone transmit power control, fiber optic networking, wireless networking, and video line drivers.

The AD865x family is trimmed with the latest generation DigiTrim® inner package. This new generation measures and corrects for offset over the entire input common-mode range, delivering less V-variation distortion than other typical orbital twist amplifiers. Bias voltage and common-mode rejection ratio are specified and guaranteed over the entire common-mode range and over the extended industrial temperature range.

The AD865x family is available in narrow 8-lead SOIC and 8-lead MSOP packages. The amplifier is specified over the extended industrial temperature range (-40°C to +125°C).

application

theory of operation

The AD865x family consists of voltage feedback, rail-to-rail input and output precision CMOS amplifiers that operate from 2.7 V to 5.5 V. These amplifiers use Analog Devices' DigiTrim technology to achieve higher precision than most CMOS amplifiers. DigiTrim technology, a method of trimming the bias voltage of an amplifier after it is assembled, is used in many analog device amplifiers. The advantage of rear package trimming is that it corrects for any offset voltages caused by assembly mechanical stress.

The AD865x family offers standard op amp pinouts, making the DigiTrim completely transparent to the user. The input stage of the amplifier is a true rail-to-rail configuration, allowing the input common-mode voltage range of the op amp to extend to the positive and negative supply rails. The open-loop gain of the AD865x with a 1kΩ load is typically 115db.

The AD865x can be used in any precision op amp application. The amplifier shows no phase reversal for common-mode voltages within the power supply. With a voltage noise of 4.5 nV/√Hz and -105 dB distortion for a 10 kHz, 2 V pp signal, the AD865x is ideal for high-resolution data acquisition systems. Their low noise, sub-power amplifier input bias current, precise offset, and high speed make them excellent preamplifiers for fast photodiode applications. The speed and output drive capability of the AD865x also make the amplifier very useful in video applications.

Rail-to-rail output stage

The voltage swing of the output stage is rail-to-rail, achieved by using pairs of NMOS and PMOS transistors connected in a common source configuration. The maximum output voltage swing is proportional to the output current, and larger currents will limit how far the output voltage can be from the output voltage close to the supply rails. This is a feature of all rail-to-rail output amplifiers. When the output current is 40ma, the output voltage can reach within 5mv of the positive and negative rails. At light loads >100 kΩ, the output swings within ~1 mV of the supply.

Rail-to-rail input stage

The input common-mode voltage range of the AD865x extends to the positive and negative supply voltages. This maximizes the usable voltage range of the amplifier, an important feature for single-supply and low-voltage applications. This rail-to-rail input range is achieved by using two input differential pairs (one NMOS and one PMOS) placed in parallel. The NMOS pair is active at the upper end of the common mode voltage range, and the PMOS pair is active at the lower end of the common mode range.

The NMOS and PMOS input stages are separately trimmed with DigiTrim to minimize the offset voltage in the two differential pairs. When the input common-mode voltage is about 1.5 V below the positive supply voltage, both the NMOS and PMOS input differential pairs are active in the 500 MV transition region. A special design method improves the input bias voltage in the transition region where V changes are traditionally small. As a result, the common mode rejection ratio is improved in this transition band. Compared to the Burr Brown OPA350 amplifier shown in Figure 53, the AD865x shown in Figure 54 shows a lower offset voltage shift over the entire input common-mode range, including the transition region.

input protection

As with any semiconductor device, if there are conditions where the input voltage exceeds the power supply, the device input overvoltage characteristics must be considered. The inputs of the AD865x family are protected by ESD diodes to either supply. Excessive input voltage energizes the internal PN junction of the AD865x, allowing current to flow from the input to the power supply. This creates an input stage, with picoamps of input current, that can withstand ESD events (Human Body Model) up to 4000 volts without degradation.

Excessive power dissipation through protection devices can destroy or degrade the performance of any amplifier. Differential voltages greater than 7 V result in an input current of approximately (Vcc - VEE - 0.7 V) / RI, where RI is the resistor in series with the input. For input voltages above the positive supply, the input current is approximately (VIN - VCC - 0.7)/RI. For input voltages other than the negative supply, the input current is approximately (VIN – vehicle steering + 0.7)/RI. If the input to the amplifier maintains a differential voltage greater than 7V or the input voltage exceeds the amplifier supply, use an appropriately sized input resistor (R) to limit the input current to 10mA, as shown in Figure 55.

overdrive recovery

Overdrive recovery is the time it takes for the amplifier output to fall off the supply rails after the overload signal is activated. This is usually tested by placing the amplifier in a closed loop gain of 15 with an input square wave of 200 mV pp while the amplifier is powered by 5 V or 3 V. The AD865x family has excellent recovery times from overload conditions (see Figure 31 and Figure 32). The output recovers from the positive supply rail within 200 ns at all supply voltages. With a 5V supply, the recovery of the negative rail is within 100ns.

Layout, Grounding, and Bypassing Considerations

power bypass

The power supply pins can act as noise inputs, so care must be taken to apply a noise-free, stable DC voltage. The purpose of the bypass capacitor is to create a low impedance from power supply to ground at all frequencies to shunt or filter most of the noise.

The bypass scheme is designed to minimize the source impedance at all frequencies with a parallel combination of 0.1µF and 4.7µF capacitors. Chip capacitors of 0.1µF (X7R or NPO) are critical and should be placed as close to the amplifier package as possible. For high frequency bypassing, 4.7µF tantalum capacitors are less important, and in most cases only one is needed per board at the power input.

ground

The ground plane layer is very important for densely packed PC boards to spread current and reduce parasitic inductance. However, understanding the direction of current flow in a circuit is critical for effective high-speed circuit design. The length of the current path is proportional to the magnitude of the parasitic inductance and therefore the high frequency impedance of the path. High-speed currents in induced ground loops can create unwanted voltage noise.

The length of the high frequency bypass capacitor leads is critical. The parasitic inductance in the bypass ground contributes to the low impedance created by the bypass capacitor. Place the ground wire of the bypass capacitor in the same physical location. Since the load current also flows from the power supply, the ground of the load impedance should be in the same physical location as the ground of the bypass capacitor. For larger value capacitors that are effective at lower frequencies, the current return path distance is less critical.

leakage current

Poor PC board layout, contamination, and board insulator materials can generate leakage currents that are much larger than the input bias currents of the AD865x family. Any voltage difference between the input and nearby traces will create a leakage current through the PC board insulator, say 1 V/100 G = 10 pA. Also, any contamination on the board can cause a serious leak (skin oils are a common problem).

To significantly reduce leakage, place a guard ring (shield) around the inputs and inputs that are driven to the same voltage potential as the inputs. This ensures that there is no voltage potential between the input and the surrounding area to build up any leakage currents. To be effective, the guard ring must be driven by a relatively low impedance source, and a multilayer board should be used to completely surround the upper and lower sides of the input leads.

Another effect that can cause leakage current is charge absorption by the insulator material itself. Minimizing the amount of material between the input leads and the guard ring helps reduce absorption. Also, in some cases, low absorption materials such as Teflon® or ceramics may be required.

input capacitance

With bypassing and grounding, high-speed amplifiers can be sensitive to parasitic capacitance between the input and ground. A few picograms of capacitance reduces the input impedance at high frequencies, which in turn increases amplifier gain, causing peak frequency response or oscillations. For the AD865x, additional input damping is required for stability when the capacitive load is greater than 47 pF with direct input to output feedback (see the Output Capacitor section).

output capacitor

When using high-speed amplifiers, the effect of capacitive loading on amplifier stability must be considered. The capacitive load interacts with the output impedance of the amplifier, resulting in reduced bandwidth, peaking and ringing in the frequency response. To reduce the effects of capacitive loads and allow higher capacitive loads, there are two common approaches.

(1) As shown in Figure 56, place a small resistor (R) in series with the output to isolate the load capacitor from the amplifier output. Heavy capacitive loading can reduce the phase margin of the amplifier, causing the amplifier response to peak or become unstable. The AD865x is capable of driving up to 47 pF in a unity-gain buffered configuration without oscillation or external compensation. However, if the application requires higher capacitive load drive when the AD865x is at unity gain, an external isolation network can be used. The effect of this resistor is to isolate the op amp output from the capacitive load. Table 5 lists the series resistor values required for different capacitive loads. While this technique improves the overall capacitive load drive of the amplifier, the biggest disadvantage is the reduction in the output swing of the entire circuit.

(2) Another way to stably drive an op amp with a large capacitive load is to use a snubber network, as shown in Figure 57. Since there are no isolation resistors in the signal path, this approach has the significant advantage of not degrading the output swing. The exact values of RS and CS were derived experimentally. In Figure 57, the optimal combination of RS and CS for capacitive load drive from 50 pF to 1 nF was selected. For this purpose, RS=3Ω and CS=10 nF were chosen.

Settling time

The settling time of an amplifier is defined as the time it takes for the output to respond to a step change in the input and enter and stay within a defined error band, measured relative to the 50% point of the input pulse. This parameter is especially important in measurement and control circuits where amplifiers are used to buffer A/D inputs or DAC outputs. The AD865x family is designed to combine high slew rate and wide gain bandwidth products to produce amplifiers with very fast settling times. The AD865x is configured in a non-inverting gain of 1 with a 2V pp step applied to its input. The settling time for the AD865x family is approximately 130 ns to 0.01% (2 mV). The output is monitored by a 10×, 10 M, 11.2 pF oscilloscope probe.

THD reading vs common mode voltage

The total harmonic distortion of the AD865x family is well below 0.0004% with any load below 600Ω. Distortion is a function of circuit structure, applied voltage and layout, and other factors. As shown in Figure 58, the AD865x family outperforms its competitors in distortion, especially at frequencies below 20 kHz.

Drive 16-bit ADC

The AD865x family is an excellent choice for driving high-speed, high-precision ADCs. Driver amplifiers for this type of application require low THD+N and fast settling times. Figure 61 shows a complete single-supply data acquisition solution. The AD865x family drives the AD7685, a 250 kSPS 16-bit data converter.

The AD865x are configured in an inverse gain of 1 with a single 5V supply. The input frequency is 45khz and the ADC sampling frequency is 250ksps. The results for this solution are listed in Table 6. The advantage of this circuit is that the amplifier and ADC can be powered from the same power supply. For a non-vertical gain of 1, the input common-mode voltage consists of two supplies.

Dimensions