How to add automati...

  • 2022-09-23 10:23:20

How to add automatic EMC analysis to PCB LAYOUT?

Introduction Electromagnetic compatibility (EMC) is generally defined as the ability of a product to function within its environment without introducing electromagnetic interference. EMC compliance is necessary to bring products to market. Simply put, if a product fails the EMC compliance test for the target market, it cannot be sold.

Regulatory agencies around the world impose limits on the radiated and conducted emissions that equipment is allowed to produce. Automotive and aerospace manufacturers may even set stricter standards for their suppliers. Design teams are well aware of the importance of ensuring their products meet EMC specifications, but many do not attempt to perform EMC analysis during design.

There is a perception that EMC analysis during PCB Layout can be a time-consuming task that is not only difficult to set up and configure correctly, but also produces results that are difficult to interpret. Historically, design-based analysis has focused on Signal Integrity (SI) and Power Integrity (Pi), while EMC "analysis" has been performed manually after manufacturing and testing the actual product.

An often overlooked point is that adding automated EMC analysis during the design phase provides an opportunity to avoid EMC compliance failures after manufacture. HyperLynx® DRC provides easy-to-use EMC analysis and well-documented rule checking that includes explanations of each principle and recommendations on how to resolve problems. By adding automated EMC analysis at appropriate points during PCB Layout prior to manufacturing, the need to perform redesigns can be reduced, impacting product development costs and overall time-to-market.

Electromagnetic compatibility can be a daunting and confusing topic, especially for novice engineers and designers and those who are not well versed in the subject. Also, there is often confusion about the difference between Electromagnetic Compatibility (EMC) and Electromagnetic Interference (EMI). The purpose of this article is not to provide an in-depth tutorial on EMC and EMI theory, but a quick review of the relevant definitions is appropriate.

As mentioned earlier, EMC is generally defined as the ability of a product to function in its environment without introducing electromagnetic interference. Specifically, the product must:

■ Can withstand a specified level of interference


■ will not cause more than the specified amount of interference


■ Ability to remain self-compatible.

EMI is generally defined as interference that affects a circuit due to electromagnetic induction or electromagnetic radiation.

To further simplify these two definitions:

EMC is the degree to which a product is susceptible to environmental influences, while EMI is the environmental impact.

The subject is so complex that it is believed that EMC analysis is difficult to perform and interpret during PCB layout. In practice, however, performing an in-design analysis is easier and more cost-effective than waiting for the actual product to be manufactured before testing it, because in the latter case, fixing the problem is much more time and cost-intensive.

Two statistics are sufficient to demonstrate the importance of conducting in-design testing.

1. While EMC testing labs are not required to provide average EMC test pass rates, some studies suggest that first-time pass rates are only about 50%.


2. EMC compliance failures are cited as the second most common cause of redesigns in the automotive industry.


Performing an EMC analysis during PCB Layout (Design for EMC Compliance) is essential given that EMC failures require one or more redesigns, which can have an impact on product development costs and overall time-to-market.

"Shift Left" of EMC Analysis During PCBLAYOUT In the engineering world, the term "shift left" is often used to describe the act of moving (or shifting) tasks that are normally performed at a later stage of the design process to an earlier stage of the design process. In general, shifting a task does not necessarily eliminate the need for that task later in the process; the goal is to reduce dependencies and improve outcomes.

In this example, the EMC analysis performed based on the post-manufacturing EMC test results will be transferred and also performed at the appropriate point in the PCB Layout stage using HyperLynxDRC. The purpose of the shift left is to give engineers and designers the opportunity to perform related tasks earlier in the overall design process, ultimately eliminating iterations and ensuring that the overall process is more efficient. Fundamentally, the entire design process can be improved with every analysis performed at each stage of PCB Layout. The higher the degree of transfer of the application, the greater the benefit.

Consider typical use cases. Traditionally, engineers or designers would perform some very simple manual EMC analysis during PCB design and then rely on post-manufacturing EMC test results to determine if a more detailed analysis is required. Any EMC problems detected in this post-design analysis environment must be communicated back to the designer for corrective action. After completing the first set of changes to address the EMC issues discovered during testing, a new design must be made and the cycle above must be restarted.

In addition, it is assumed that details of any EMC issues found during testing can be analyzed and communicated so that the design team can address them. The validity of this assumption will vary depending on the level of expertise of the EMC test lab and design team.

Manually checking for EMC problems is time-consuming, subjective, potentially inaccurate, and prone to errors. By moving EMC analysis left into the automated in-design process using HyperLynx DRC, the cycle time to identify and resolve EMC issues is no longer subject to external influences. The closer the analysis is to the engineer or designer, the more frequently it is run, and the easier it is to detect and correct problems earlier in the design process.

EMC Analysis — Run Often, Early Considering that a design improvement can often reduce both EMC emissions and susceptibility, there are significant advantages to running the analysis frequently at the appropriate stage of early PCB layout. Many design teams put a lot of effort into controlling potential EMC/EMI problems rather than spending time using analytical methods to suppress them.

As previously mentioned, HyperLynxDRC supports optimal layout design by performing various EMC and EMI rule checks on place and route. To minimize uncertainty and ensure proper use, HyperLynx DRC features include:

■ Detailed records of each rule


■ Explain the principles of each rule


■ Provide examples with diagrams detailing any settings required


■ Provides suggestions on how to correct the problem.

Many of the EMC checks provided by HyperLynx DRC look for items that are not easy to simulate, such as traces that cross plane splits, reference plane changes, shields and vias, and more. Some examples of other issues that can be checked during EMC/EMI analysis include:

■ Residual branch length


■ Filter device layout


■ IC on the dividing plane


■ I/O coupling


■ Copper island


■ Networks close to the edge of the plane


■ Wires with wrong reference voltage.

For each of the above examples, the user can run an automated analysis without in-depth knowledge of EMC/EMI rules. HyperLynx DRC is extremely customizable, and users can not only use its many built-in checks, but also write custom design rule checks.

Table 1 is an example of items that should be checked using EMC analysis at different stages of PCB layout.

Note that in some cases the same item needs to be checked at multiple stages of PCB Layout. This does not mean that the same parameter is checked twice, but as the design progresses, the analysis may need to be repeated. For example, consider the maximum number of vias for a network. Analysis results after completing the routing of critical nets, may change after adding power and ground planes and non-critical nets later in the design cycle.


The EMC analysis results provided by HyperLynxDRC are very accurate, enabling interactive display from results to Layout and suggestions on how to correct the problem. Basic rules rarely require any setup, but more advanced rules do. Therefore, better results depend in part on the EMC expertise of the design team.

Summary For most engineers and designers, the greatest achievement is to produce, during first manufacturing, a device that operates reliably at full speed and is low enough noise to pass EMC compliance testing without the use of expensive shielding and filtering. product. Achieving electromagnetic compatibility is an important design milestone. HyperLynx DRC shifts EMC analysis left and embeds it into PCB design tools, dramatically reducing the likelihood of EMC compliance failures after fabrication is complete.

As discussed in this article, adding automated EMC analysis should not be an isolated event, but rather a series of events that occur at appropriate stages of PCB layout to help guide engineers and designers towards a physical implementation with better EMC performance. Establishing this direct relationship between engineers and analysis means that key design decisions that support EMC compliance can be applied at every stage of the PCB Layout process.

Efficiency gains are realized with each left shift of the EMC analysis applied in the PCB Layout process. The ultimate goal of any shift-left initiative is to enable the design system to support the right-by-design approach using EMC rules to eliminate costly post-design iterations.

In summary, by adding automatic EMC analysis to PCB Layout using HyperLynxDRC, engineers and PCB designers will be able to:

■ Design a physical implementation with correct EMC performance


■ Reduced reliance on post-manufacturing EMC analysis


■ Improves the likelihood of passing EMC compliance testing during first manufacturing


■ Automate manual processes that are subjective, time-consuming, and potentially error-prone


■ Reduce or eliminate rework late in the design cycle.

Of course, the above advantages are only the advantages that can be realized in the early stage. As with any new technology, the transformation will happen in stages. Initially, the design team may only focus on a select few of the most critical, error-prone and misunderstood ground rules. As design teams become more familiar with the HyperLynxDRCEMC rule checking, they will certainly work to enhance their processes to improve the timeliness, accuracy and quality of related products.

The aim is to continuously improve the process. In the end, adding automated EMC analysis to PCB Layout is a win for both product development teams and manufacturing teams, improving quality, reducing costs, and reducing time-to-market.