feature

Low Offset Voltage: 1 mV; Input Offset Drift: 0.005 mV/8C; Rail-to-Rail Input and Output Swing; 5 V/2.7 V Single Supply Operation; High Gain, Common Mode Rejection Ratio, PSRR: 130dB ; Ultra Low Input Bias Current: 20pa ; Low Supply Current: 750mA/Op Amp; Overload Recovery Time: 50ms; No External Capacitors Required.

application

Temperature Sensors; Pressure Sensors; Precision Current Sensing; Strain Gauge Amplifiers; Medical Devices; Thermocouple Amplifiers.

General Instructions

This new amplifier features ultra-low offset, drift and bias currents. The AD8571 , AD8572, and AD8574 are single, dual, and quad amplifiers with rail-to-rail input and output swing. All are guaranteed to operate from a single supply of 2.7 V to 5 V.

The AD857x family offers what was previously only available in expensive auto-zero or chopper-stabilized amplifiers. These new zero-drift amplifiers combine high cost and high precision using new topologies of analog devices. (No external capacitors required) In addition, the AD857x family uses a patented spread spectrum auto-zero technique that virtually eliminates the interaction of the AC chopper function with the signal frequency applied.

When the bias voltage is only 1 microvolt and the drift is 0.005 microvolts/degree Celsius, the AD8571 is ideal for applications where error sources cannot be tolerated. Position and pressure sensors, medical devices and strain gage amplifiers drift from zero over their operating temperature range. More systems require rail-to-rail input and output swing provided by the AD857x family.

The AD857x family is suitable for the extended industrial/automotive (-40°C to +125°C) temperature range. The AD8571 single is available in 8-lead MSOP and narrow 8-lead SOIC packages. The AD8572 dual amplifier is available in 8-wire narrow SO and 8-wire TSSOP surface mount packages. The AD8574 quad is available in narrow 14-lead SOIC and 14-lead TSSOP packages.

Function description

The AD857x series are CMOS amplifiers that achieve high accuracy by auto-zeroing at random frequencies. The self-correcting topology allows the AD857x to maintain its low offset voltage over a wide temperature range, and the random auto-zero clock eliminates any intermodulation distortion (IMD) errors at the amplifier output.

The AD857x can operate from a single supply voltage as low as 2.7V. The extremely low 1µV bias voltage and IMD-free products allow the amplifier to be easily configured for high gain without the risk of excessive output voltage errors. This makes the AD857x an ideal amplifier for applications requiring dc accuracy and low distortion ac signals. An extremely small temperature drift of 5 nV/°C ensures a minimum offset voltage error of -40°C to +125°C over its entire temperature range. These combined features make the AD857x the best choice for a variety of sensitive measurements and automotive applications.

Amplifier structure

Each AD857x op amp consists of two amplifiers, a main amplifier and an auxiliary amplifier, used to correct the main amplifier's bias voltage. Both include a rail-to-rail input stage, allowing the input common-mode voltage range to reach both supply rails. The input stage consists of an NMOS differential pair and a parallel PMOS differential pair. The output of the differential input stage is combined in another gain stage whose output is used to drive the rail-to-rail output stage.

The wide voltage swing of the amplifier is achieved by using two output transistors in a common source configuration. The drain-to-source resistance of these transistors limits the output voltage range. When the amplifier needs to source or sink more output current, the voltage drop across these transistors increases due to their rds. Simply put, at high output current conditions, the output voltage does not swing as close to the rails as it does at low output current conditions. This is a feature of all rail-to-rail output amplifiers. Figures 6 and 7 show how the output voltage approaches rail for a given output current. The outputs of the AD85X are short-circuit protected to a current of approximately 50 mA.

The AD857x amplifiers have special gain that produces an open-loop gain greater than 120dB with a 2KΩ load. Because the output transistors are configured in a common source configuration, the gain of the output stage and thus the open-loop gain of the amplifier depends on the load resistance. The smaller the load resistance, the smaller the open loop gain. This is another feature of rail-to-rail output amplifiers.

Basic Self-Zero Amplifier Theory

Self-calibrating amplifiers are not a new technology. Implementations of various integrated circuits have been around for over 15 years and have seen some improvements over time. The AD857x is designed to provide many significant performance improvements over older versions while significantly reducing equipment cost. This section provides a brief explanation of how the AD857x provides extremely low bias voltage and high open-loop gain.

As described in the previous section on amplifier structure, each AD857x op amp contains two internal amplifiers. One is used as the main amplifier and the other is used as a self-correcting or nulling amplifier. Each amplifier has an associated input bias voltage, which can be modeled as a DC voltage source, in series with the non-vertical input. In Figures 44 and 45, these are labeled VOSX, where x denotes the amplifier associated with the offset; A denotes the null amplifier and B the main amplifier. The open-loop gain of each amplifier's inputs +IN and –IN is AX. Both amplifiers also have a third voltage input with an associated open loop gain of BX.

According to the role of the two sets of switches in the amplifier, there are two operating modes: auto-zero phase and amplification phase.

self-zero phase

At this stage, all φA switches are closed and all φB switches are open. Here, the null amplifier is taken out of the gain loop by shorting the two inputs together. Of course, there is some level of bias voltage in the null amplifier, as shown by VOSA, which maintains the potential difference between the inputs +in and –in. The feedback loop of the zeroing amplifier is closed by φA2, and VOSA appears on the output of the zeroing amplifier and on the internal capacitance CM1 of the AD857x. Mathematically, we can express this as:

It can be expressed as,

This indicates that the bias voltage of the nulling amplifier multiplied by the gain factor appears at the output of the nulling amplifier and thus on the CM1 capacitor.

Amplify phase

When the φB switch is closed and the φA switch is open for the amplification stage, this offset voltage remains on CM1 and substantially corrects any errors from the null amplifier. The voltage across CM1 is designated as VNA. We can also specify VIN as the potential difference between the two inputs of the main amplifier, or VIN=(VIN+–VIN-). Now, the output of the zeroing amplifier can be expressed as:

Because φA is now open, there is nowhere for CM1 to discharge, so the current voltage VNA is equal to when φA is closed. If we call the self-correction period switching frequency TS, then the amplifier is in phase every 0.5␣3 TS. Therefore, in the amplification stage:

Substituting Equation 4 and Equation 2 into Equation 3, we get:

For simplicity, we assume that the self-correction frequency is much faster than any potential change in VOSA or VOSB. This is a good assumption since the change in offset voltage is a function of temperature change or long-term wear time, both of which are much slower than the AD857x's auto-zero clock frequency. This effectively makes the VOS time-invariant, and we can rearrange Equation 5 and rewrite it as:

We can already feel the effect of auto-zeroing. Note: The VOS term is reduced by a factor of 1+BA. This illustrates how the nulling amplifier greatly reduces its own offset voltage error before correcting the main amplifier. The main amplifier output voltage is now the voltage output by the AD857x amplifier. equal:

In the amplification stage, VOA=VNB, so it can be rewritten as:

compound words,

The optimized way of AD857x architecture is AA=AB and BA=BB and BA>>1. Also, the gain product to AB AB is much larger than AB. This allows Equation 10 to simplify to:

The most obvious is the gain product of the main and null amplifiers. This AABA term enables the AD857x to have very high open-loop gain. To understand how VOSA and VOSB relate to the total effective input bias voltage of the entire amplifier, we should establish the following general amplifier equation:

where k is the open-loop gain of the amplifier and VOS, and EFF is its effective offset voltage. Converting Equation 12 to the form of Equation 11 gives:

It's easy to see from here:

Therefore, the bias voltages of both the main amplifier and the null amplifier are reduced by the gain factor BA. This reduces typical input bias voltages from a few millivolts to sub-mV effective input bias voltages. This self-correcting scheme makes the AD857x family of amplifiers one of the most accurate in the world.

High Gain, Common Mode Rejection Ratio, PSRR

Common-mode and power-supply rejection are indications of the amount of offset voltage that an amplifier produces due to changes in the input common-mode or power supply voltage. As shown in the previous section, the self-correcting structure of the AD857x allows it to minimize the offset voltage very efficiently. The technique also corrects for offset errors caused by common-mode voltage fluctuations and power supply variations. This results in an excellent common mode rejection ratio and peak rejection ratio of over 130dB. Because auto-correction occurs continuously, these numbers can be maintained over the entire temperature range of the device, from -40°C to +125°C.

Maximizing Performance with Proper Layout To achieve maximum performance with the very high input impedance and low offset voltage of the AD85X, attention should be paid to the board layout. PC board surfaces must be kept clean and free of moisture to avoid leakage currents between adjacent traces. The surface coating of the circuit board will reduce surface moisture and provide a moisture barrier, reducing parasitic resistance on the board. Using a guard ring around the amplifier input will further reduce leakage current. Figure 46 shows how to configure the guard ring and Figure 47 shows a top view of how to lay out a surface mount layout. The guard ring does not need a specific width, but it should form a continuous loop around the two inputs. Parasitic capacitance is also minimized by setting the guard ring voltage to a non-vertical input voltage. To further reduce leakage current, Teflon isolation insulators can be used to mount the components to the PC board.

retaining ring

Other possible sources of offset error are thermoelectric voltages on the circuit board. This voltage, also known as the Seebeck voltage, occurs at the junction of two dissimilar metals and is proportional to the temperature at the junction. The most common metal connections on circuit boards are traces soldered to the board and lead soldered to components. Figure 48 shows a cross-sectional view of a thermal voltage error source. If the PC board temperature (TA1) at one end of the component is different from the temperature at the other end (TA2), the Seebeck voltages will not be equal, resulting in thermal voltage errors.

Using dummy elements to match the thermoelectric error sources reduces the error of the thermocouple. Placing the dummy element as close as possible to its partner will ensure that the two Seebeck voltages are equal, eliminating thermocouple errors. Maintaining a constant ambient temperature on the board will further reduce this error. Using a ground plane will help distribute heat throughout the board and will also reduce EMI noise pickup.

1/f noise characteristics

Another advantage of auto-zeroing amplifiers is the ability to eliminate flicker noise. Flicker noise, also known as 1/f noise, is noise inherent in the physics of semiconductor devices, increasing by 3db for each octave lower in frequency. The 1/f corner frequency of an amplifier is the frequency at which the flicker noise equals the amplifier's broadband noise. At lower frequencies, flicker noise dominates, causing higher errors for sub-high frequency or DC precision applications.

Because the AD857x amplifiers are self-correcting op amps, they do not add flicker noise at lower frequencies. Essentially, low frequency noise is seen as a slowly varying offset error and is greatly reduced due to self-correction. As the noise frequency approaches DC, the correction becomes more effective, counteracting the exponential increase in noise with decreasing frequency. This allows the AD857x to have lower noise around dc than standard LNAs that are susceptible to 1/f noise.

Random self-zero correction to eliminate intermodulation distortion

The AD857x can be used as a conventional op amp with gains up to 1MHz. Based on a pseudo-random generator uniformly distributed between 2kHz and 4kHz, the frequency of the self-zero correction of the device is continuously varied. The randomization of the self-correcting clock results in continuous randomization of the intermodulation distortion (IMD) product, which appears as simple broadband noise at the amplifier output. This noise naturally combines with the voltage noise of the amplifier in a square root sum, resulting in no IMD at the output. Figure 50a shows the spectral output of the AD8572 with the amplifier configured for unity gain and the input grounded. Figure 50b shows the spectral output of an amplifier with a gain of 60db.

60dB gain

Figure 51 shows the spectral output of the AD8572 configured for high gain (60 dB) with a 1 mV input signal applied. Note that there are no IMD products in the spectrum. The signal-to-noise ratio (SNR) of the output signal is better than 60db or 0.1%.

Broadband and External Resistor Noise Considerations Broadband noise at the output of any amplifier is primarily a function of three types of noise: input voltage noise from the amplifier, input current noise from the amplifier, and Johnson noise from external resistors used around the amplifier. Input voltage noise (en) is strictly a function of the amplifier used. The Johnson noise of a resistor is a function of resistance and temperature. Input current noise, or input, produces an equivalent voltage noise proportional to the resistance around the amplifier. These noise sources are uncorrelated with each other, and their combined noise sums as a square root sum. The full equation is as follows:

where en=amplifier input voltage noise, in=amplifier input current noise, rs=source resistance termination with non-vertical connection, k=Boltzmann constant (1.38 3 10-23 J/k), T = Ambient temperature (unit: Kelvin) (K=273.15+℃).

The input voltage noise density en of the AD857x is 51 nV/√, and the input noise in is 2 fA/√. If the source resistance is less than 172kΩ, the input voltage noise will dominate the entire en. When the source resistance is greater than 172kΩ, the overall noise of the system will be dominated by the Johnson noise of the resistor itself.

Since the input current noise of the AD857x is small, in does not become the dominant term unless rs is greater than 4gΩ, which is an unrealistic source resistance value.

Total noise, en, total, expressed in volts/square root hertz, the equivalent rms noise over a certain bandwidth can be found as:

where BW is the bandwidth of interest in Hertz.

For a complete discussion of circuit noise analysis, see the 1995 Symposium on Linear Design of Analog Devices.

Output overspeed recovery

The AD857x amplifiers have excellent overdrive recovery of only 200 microseconds from either supply rail. This characteristic is especially difficult for self-correcting amplifiers, since the nulling amplifier takes a significant amount of time to erroneously correct the main amplifier back to a valid output. Figure 23 and Figure 24 show the AD857x version.

The output overdrive recovery of a self-correcting amplifier is defined as the time it takes for the output to correct from an overload condition to its final voltage. It is measured by placing the amplifier in a high gain configuration with the input signal applying the output voltage to the supply rails. The input voltage is then dropped to the linear region of the amplifier, typically halfway between the supplies. The time from when the input signal is stepped down until the output settles to within 100 microvolts of its final value is the overspeed recovery time. Most competing auto-correcting amplifiers require a series of auto-zero clock cycles to recover from output overdrive, and some take a few milliseconds for the output to properly settle.

Input overvoltage protection

Although the AD857x is a rail-to-rail input amplifier, care should be taken to ensure that the potential difference between the inputs does not exceed 5 V. Under normal operating conditions, the amplifier will correct its output to ensure that both inputs are at the same voltage. However, if the device is configured as a comparator, or under some unusual operating conditions, the input voltage may be forced to a different potential. This can cause excessive current to flow through the internal diodes in the AD857x, which are used to protect the input stage from overvoltage.

If either input exceeds either rail by more than 0.3V, a significant amount of current will start flowing through the ESD protection diodes in the amplifier. These diodes are connected between the input and each supply rail to protect the input transistors from electrostatic discharge events and are usually reverse biased. However, if the input voltage exceeds the supply voltage, these ESD diodes will become forward biased. In the absence of current limiting, excessive current can flow through these diodes, causing permanent damage to the device. If the input is subject to overvoltage, appropriate series resistors should be inserted to limit the diode current to less than 2 mA maximum.

output phase reversal

Some amplifiers experience output phase inversion when the input common-mode voltage range is exceeded. When the common-mode voltage exceeds the common-mode range, the output of these amplifiers will suddenly jump in the opposite direction to the supply rail. This is a result of the differential input pair being turned off, causing a fundamental shift in the internal voltages, resulting in unstable output behavior.

The AD857x amplifiers are carefully designed to prevent any output phase reversal provided both inputs remain within the supply voltage range. If one or both inputs could exceed either supply voltage, resistors should be placed in series with the inputs to limit the current to less than 2mA. This will ensure that the output does not reverse its phase.

Capacitive Load Drive

The AD857x has excellent capacitive load drive capability and can safely drive up to 10 nF from a single 5 V supply. Although the device is stable, capacitive loading can limit the bandwidth of the amplifier. Capacitive loads also increase the amount of overshoot and ringing at the output. An RC snubber network (Figure 52) can be used to compensate for capacitive load ringing and overshoot of the amplifier.

capacitive load

While the snubber will not recover the loss of amplifier bandwidth from the load capacitance, it will allow the amplifier to drive larger capacitance values while maintaining minimal overshoot and ringing. Figure 53 shows the output of an AD857x driving a 1NF capacitor, with or without a snubber network.

Use buffer network reduction

The optimum values for the resistors and capacitors are a function of the load capacitance and are best determined empirically, as the actual CLOAD will include stray capacitance and may vary significantly from the nominal capacitive load. Table 1 shows some buffer network values that can be used as starting points.

power-on behavior

After power-up, the AD857x will settle to a valid output within 5 microseconds. Figure 54a shows an oscilloscope photo of the amplifier output along with the supply voltage, and Figure 54b shows the test circuit. With the amplifier configured for unity gain, the device takes about 5µs to resolve its final output voltage. This turn-on response time is much faster than most other self-correcting amplifiers, whose outputs can take hundreds of microseconds or more to settle.

Application of 5v Precision Strain Gauge Circuit

The extremely low offset voltage of the AD8572 makes it an ideal

Amplifiers for any application requiring high gain accuracy, such as weighing or strain gages. Figure 55 shows the configuration of a single-supply precision strain gage measurement system.

REF192 provides 2.5V precision reference voltage for A2. The A2 amplifier boosts this voltage to provide a 4.0V reference for the top of the strain gauge resistor bridge. Q1 provides current drive for the 350Ω bridge network. A1 is used to amplify the output of the bridge, and the full-scale output voltage is equal to:

where RB is the resistance of the load cell. Using the values given in Figure 55, the output voltage will vary linearly from 0 V unstrained to 4 V full strain.

3V Instrumentation Amplifier

High common-mode rejection, high open-loop gain, and operating voltages as low as 3v make the AD857x the best op amp choice for discrete single-supply instrumentation amplifiers. The CMRR of the AD857x is greater than 120dB, but the CMRR of the system is also a function of the external resistor tolerance. The gain of the differential amplifier shown in Figure 56 is:

In an ideal differential amplifier, the ratio of resistors is set exactly equal to:

It sets the output voltage of the system to:

Due to limited component tolerances, the ratios between the four resistors will not be exactly equal, and any mismatch will reduce the common-mode rejection of the system. Referring to Figure 56, the exact CMRR can be expressed as:

In the 3-op amp instrumentation amplifier configuration shown in Figure 57, the output differential amplifier is set to unity gain and all four resistors are equal in value. If the tolerance of the resistors used in the circuit is delta, the worst CMRR of the instrumentation amplifier is:

Therefore, using 1% tolerance resistors will result in a worst-case system CMRR of 0.02 or 34 dB. Therefore, as shown in Figure 57, high-precision resistors or additional trimming resistors should be used to achieve high common-mode rejection. The value of this trimmer resistor should be equal to the R value multiplied by its tolerance. For example, using a 10 kΩ resistor with a 1% tolerance requires a series trimmer equal to 100Ω.

High Precision Thermocouple Amplifier

Figure 58 shows a K-type thermocouple amplifier configuration with cold junction compensation. Even with a 5V supply, the AD8571 provides sufficient accuracy to achieve better than 0.02°C resolution between 0°C and 500°C. D1 is used as a temperature measurement device to correct for cold junction errors of the thermocouple and should be as close as possible to both termination junctions. When the thermocouple measuring head is immersed in a zero degree ice bath, R6 should be adjusted until the output is 0 V.

Using the values shown in Figure 58, the output voltage will track the temperature at 10 mV/°C. For a wider temperature measurement range, R9 can be reduced to 62 kΩ. This will produce a 5mV/degree Celsius change at the output, allowing measurements up to 1000 degrees Celsius.

Precision ammeter

Due to its low input bias current and high bias voltage from a single supply voltage, the AD857x is an excellent precision current monitoring amplifier. Its rail-to-rail input allows the amplifier to be used as a high-side or low-side current monitor. Using two amplifiers simultaneously in the AD8572 provides an easy way to monitor the current supply and return paths for load or fault detection.

Figure 59 shows the high-side current monitor configuration. Here, the input common-mode voltage of the amplifier will be at or near the positive supply voltage. The amplifier's rail-to-rail input provides accurate measurements even when the input common-mode voltage is the supply voltage. The CMOS input structure does not generate any input bias current, ensuring minimal measurement errors.

The 0.1Ω resistor creates a voltage drop on the non-vertical input of the AD857x. The output of the amplifier is corrected until this voltage appears at the inverting input. This creates a current through R1, which in turn flows through R2. The monitor output is as follows:

Using the components shown in Figure 59, the monitor output transfer capability is 2.5␣V/A.

Figure 60 shows the equivalent for a low-end monitor. In this circuit, the input common-mode voltage to the AD8572 will be at or near ground. Likewise, a 0.1Ω resistor provides a voltage drop proportional to the return current. The output voltages are as follows:

For the component values shown in Figure 60, the output transfer function decreases from V at -2.5v/A.

Precision Voltage Comparator

The AD857x can operate in open loop as a precision comparator. When operating in this configuration, the offset voltage of the AD857x is less than 50µV. The slight increase in offset voltage is due to the self-correcting structure working with minimal offset in a closed-loop structure (ie, a negative feedback structure). At 50 mV overdrive, the device has a propagation delay of 15 microseconds on the rising edge and 8 microseconds on the falling edge.

Care should be taken to ensure that the maximum differential voltage of the device is not exceeded. See the Input Overvoltage Protection section for more information.

SPICE model

The SPICE macromodel of the AD857x amplifier is in Listing 1. This model simulates typical specifications of the AD857x and can be downloaded from the Analog Devices website. A schematic diagram of the macromodel is shown in Figure 61.

Transistors M1 through M4 emulate a rail-to-rail input differential pair in the AD857x amplifier. The EOS voltage source is placed in series with the non-vertical input to establish not only the 1µV bias voltage, but also the common-mode and power-supply rejection ratios and input voltage noise. The differential voltages at nodes 14 to 16 and nodes 17 to 18 are reflected to E1, which is used to simulate the second-pole-zero combination in the open-loop gain of the amplifier.

The voltage at node 32 is then reflected to G1, which adds an additional gain stage and, together with CF, establishes the modeled slew rate at 0.5v/μs. M5 and M6 are in a common source configuration, similar to the output stage of the AD857x amplifier. EG1 and EG2 fix the quiescent current in these two transistors at 100 microamps, which also helps to accurately simulate the output and output characteristics of the amplifier.

The net around ECM1 creates a common-mode voltage error, and CCM1 sets the corner frequency at which the CMRR rolls. The power supply rejection error is generated by the network around EPS1, and CPS3 establishes the corner frequency at which the PSRR rolls off. Two current loops around nodes 80 and 81 are used to produce a 51 nV/√ noise figure on RN2. These three error sources are reflected to the input of the op amp model through the equation of state. Finally, GSY is used to accurately simulate the supply current versus supply voltage for the AD857x.

This macromodel is designed to accurately simulate many of the specifications displayed by the AD857x amplifiers and is one of the most realistic macromodels available for any op amp. It is optimized to operate at 27°C. Although the model will operate at different temperatures, it may lose accuracy relative to the actual performance of the AD857x.

Dimensions

Dimensions are in inches and (mm).