feature

5V CMOS Compatibility

15 ns typical pulse width distortion

Maximum 30 ns pulse width distortion

Maximum Propagation Delay Skew 40 ns

High Speed: 15 MBd

Maximum propagation delay 60ns

10 kV/µs minimum common mode rejection

40°C to 100 °C temperature range

UL Listed (File #E90700)

application

line receiver

Pulse Transformer Replacement

Output interface to CMOS-LSTTL-TTL

Wide Bandwidth Analog Coupling

General Instructions

The FOD0708 and FOD0738 optocouplers consist of AlGaAs light-emitting diodes optically coupled with high-speed transconductance amplifiers and voltage comparators. These optocouplers utilize the latest CMOS integrated circuit technology to achieve superior performance consumption at very low power consumption. These devices are packaged in a small 8-pin SOIC package for optimum mounting density.

Absolute Maximum Ratings Ta = 25°C unless otherwise noted

Electrical Characteristics (TA=-40°C to +100°C) and 4.5 V≤VDD≤5.5 V

All typical values at TA=25°C and VDD=5V unless otherwise noted.

Switching characteristics over recommended temperature (TA=-40°C to +100°C) 4.5 V≤VDD≤5.5 V. All typical specifications are at TA=25°C, VDD=+5 V.

All typical values at TA=25°C and VDD=5V unless otherwise noted.

Isolation Characteristics (TA=-40°C to +100°C unless otherwise specified.)

All typical values are VCC=5 V, TA=25°C

notes:

1. Propagation delay time, from high to low (tPHL), measured from the 50% level of the rising edge of the input pulse to the falling edge of the 2.5V level output voltage signal. The propagation delay time, from low to high (tPLH), is the 2.5V level from the falling edge of the input pulse to the rising edge of the output voltage signal.

2. The pulse width difference is defined as the absolute difference between the high-to-low and low-to-high propagation delay times, |tPHL–tPLH|.

3. Propagation delay skew, tPSK, is defined as the operating range of the worst-case worst-case device for tPHL or tPLH between cells within the recommended value.

4.CMH - Maximum withstand rate of common mode voltage rise to ensure the output remains high, (ie VOUT > 2.0V) measured in kilovolts per microsecond (kV/microsecond).

5. CML - Maximum tolerance to common mode voltage drop to ensure output remains low, (ie VOUT < 0.8V). Units are kilovolts per microsecond (kV/microsecond).

6. Isolation voltage VISO is the dielectric breakdown rating of an internal device. For this test, pins 1, 2, 3, and 4 are common, and pins 5, 6, 7, and 8 are common.

Typical features

Typical Characteristics (continued)

Typical Characteristics (continued)

Figure Test Circuit Common Mode Transient Immunity (FOD0708 and FOD0738)