feature

Output voltage from 1.1V to 5V

Integrated High Current Gate Driver Two Interleaved Synchronous Phase Maximum Performance per IC

Up to 4-phase power system

Built-in current sharing between phases and between ICs

Frequency and Phase Synchronization Between Integrated Circuits

Remote sensing and programmable active droop 8482 ;

High Precision Voltage Reference

High-speed transient response

Programmable frequency from 200KHz to 2MHz

Adaptive Delay Gate Switch

Integrated power good, OV, UV, enable/soft start

Function

Driving an N-channel mosfet

Operation optimized for 12V

Light Load High Efficiency Mode

Overcurrent Protection Using MOSFET Sensing

28-pin TSSOP package

application

logic power

Modular Power

illustrate

FAN5092 is a synchronous multi-chip DC-DC controller IC providing high precision, programmable output voltage for all high current applications. Dual interleaved synchronous buck regulators with built-in current sharing are phase-in high current applications that provide the required fast transient response while minimizing external components. FAN5092s can be paralleled for frequency and phase synchronization during maintenance and ensure current sharing in high power systems. Fan 5092 features remote voltage sensing, programmable activation of droop and optimal inverter lead response with minimal output capacitance transient response. It has integrated high-current gate driver switching with adaptive delay gates, requiring no external drive equipment. This enables switching frequencies up to 4MHz for ultra-high densities. The output voltage can be set from 1.1V to 5V with 0.5% accuracy. The FAN5092 uses a 12V power supply integrated to output over 150A of load current from a minimum external circuit. The Fan 5092 also offers integrated features including power good, output enable/soft start, undervoltage lockout, overvoltage protection and current limit current sensing on each slice. There are 28 pin TSSOP packages.

Pin Definition

Recommended Operating Conditions

Electrical Specifications

(Using the circuit in Figure 1, VCC=12V, VOUT=1.500V, TA=+25°C, unless otherwise noted.)

Indicates specifications for the entire operating temperature range.

Electrical Specifications (continued)

(Using the circuit in Figure 1, VCC=12V, VOUT=1.500V, TA=+25°C, unless otherwise noted.)

Indicates specifications for the entire operating temperature range.

notes:

1. Steady-state voltage regulation includes initial voltage setting, output ripple and output temperature drift measured at the VFB sensing point of the inverter.

2. Measure at the VFB induction point of the inverter. Remote sensing should be utilized for optimal performance.

application information

Operation FAN5092 Controller The FAN5092 is a programmable synchronous polyphase DC-DC controller IC. It can operate as a single controller, and then a second fan 5092 can be modularly paralleled for higher current. When surrounded by appropriate external components, the FAN5092 can be configured to output currents greater than 120A. Fan 5092 acts as a fixed frequency PWM buck regulator in high efficiency mode (E*) at light loads. See the FAN5092 block diagram on page 7 for the main control loop. The FAN5092 consists of two interleaved synchronous buck converters, implemented by summing mode control. Each phase has its own current feedback, and voltage feedback. The two buck converters controlled by the FAN5092 are interleaved, that is, they are interleaved with each other. This will minimize the RMS input ripple current and minimize the number of input capacitors required. It also doubles the effective switching frequency, improving transient response.

FAN5092 implements "summation mode control", which is different from traditional voltage mode and current mode control. It outperforms allowing over a wide range of output loads and external components. The control loop of the regulator consists of two main parts: the analog control block and the digital control block. This analog part consists of a signal conditioning amplifier to form an input comparator, which is a digital control block. The signal conditioning part accepts the input of the current sensor and the voltage sensor. The voltage sensor is shared by the two pieces, and the current sensors are separated. The voltage sensor amplifies the difference between the VFB signal and the reference voltage from the DAC and presents the output separately to the comparator. The current control path for each slice uses the difference between its PGND and SW pins when the low-side MOSFET is turned on, the signal to the voltage amplifier through the MOSFET and the resulting input current signal to the same input of its summing amplifier is certain gain. These, therefore, add up the two signals. This sum is then presented to a comparator that observes the oscillator ramp, which provides the digital control with a master PWM control signal block. The oscillator is ramped with each other so that the two slices are turned on alternately. The digital control block accepts the analog comparator input to supply the appropriate pulses to HDRV and LDRV to the output pins of each slice. These outputs control external power mosfets.

Remote voltage detection

The FAN5092 has true remote voltage sensing capability, eliminating errors due to tracking resistors. With remote sensing, the VFB and AGND pins should be connected as Kelvin tracking pairs to adjustment points such as processor pins. The converter keeps the voltage at that point. The layout of these fields requires care; see layout guidelines in this data sheet. High Current Output Driver FAN5092 contains four high current output drivers using mosfet in push-pull configuration. Drivers for high-end MOSFETs use the boot pin for input power and the switch pin for return. The low side driver mosfet uses the VCC pin for input power and the PGND return pin. Typically, the lead pins will use a charge pump as shown in Figure 1. Note that the Boot and VCC pins are separated from the chip's internal power and ground, bypass and AGND for switching noise immunity. The adaptive delay gate driver FAN5092 features an advanced design that ensures minimal MOSFET transition time when eliminating the water flow. It senses the state of the mosfet and adaptively adjusts the door drivers to ensure they never open at the same time. When the high-side MOSFET turns off, the voltage on the power supply begins to drop. When the voltage reaches about 2.5V, the low-side MOSFET. The gate driver is applied approximately 50 minutes delay. when? The low side MOSFET is turned off and the voltage at the LDRV pin is sensed. When it drops below about 2V, apply the gate driver for the high-side MOSFET. MAXIMUM DUTY CYCLE To ensure current sensing and charge pump operation, the fan 5092 guarantees that the low side MOSFET will be on for a specific part of each cycle. At low frequencies, this occurs as approximately 90% of the maximum duty cycle. Therefore, at 250KHz, 4 microsecond period, the low voltage side is at least 4 microseconds • 10% = 400 nanoseconds. At higher location frequencies, this time may drop so low as to be ineffective. The FAN5092 guarantees a minimum low-side turn-on time of approximately duty cycle, no matter what this duty cycle corresponds to.

Current sensing

The FAN5092 has two independent current sensors, one for each stage. Current sensing is done by measuring the source-drain voltage of the low-side MOSFET which is punctual. Each phase has its own power ground pin allowing the phases to be placed in different locations affecting measurement accuracy. For best results, this is important - the FAN5092 product specification connects the PGND and SW pin Kelvin trace pairs of each phase directly to the source and drain, respectively, of the appropriate low-side MOSFETs. Care needs to be taken in the layout of these venues; see this data sheet. The two independent current sensors of the current sharing fan 5092 operate independent current control loops to ensure that each of the two stages provides half of the total output current. only if the RDS of the low-side mosfet does not match. In normal use, two FAN5092s run in parallel. By connecting the ISHR pins together the two ICs will be forced to cycle in exactly the same way, ensuring all four stages. Short-Circuit Current Characteristics The FAN5092 short-circuit current characteristics include the event of a short circuit in the function that protects the DC-DC converter from damage. The short circuit limit is given by the formula

Precision Current Sensing Tolerances Associated with Using MOSFET Current Using current sensing can avoid the sense resistor. E*-mode By putting the fan 5092 into E* mode. When the droop pin is pulled to the 5V bypass voltage, the "A" phase of the fan 5092 is fully off, reducing the number of gates to charge power consumption by half. The E*-mode can be implemented with the circuit shown in Figure 3:

Note that the charge pump for HIDRVs should be based on the "B" phase of the fan 5092, since the "A" phase is off in E* mode. Internal Voltage Reference The reference included in the FAN5092 is an accurate bandgap voltage reference. Its internal resistance is precisely trimmed to provide a near-zero temperature coefficient (TC). Based on this reference is an integrated 5-bit output digital-to-analog converter. The DAC monitors 5 voltage identification pins, VID0-4, and adjusts the reference voltage from 1.100V to 1.850V in 25mV steps. Bypass Reference The FAN5092's internal logic runs on 5V. The IC runs only at 12V, and internally generates a 5V linear regulator whose output is on the bypass pin. This pin should be bypassed with a 1µF capacitor to eliminate noise suppression. The bypass pin should not have any external load attached to it. The dynamic voltage scaling FAN5092 has an internal pull-up on its video line. Pull-ups should not be used externally. The fan 5092 can output a dynamically adjusted voltage to accommodate low power modes. The designer must ensure that the video lines are present simultaneously (less than 500nsec) to avoid error codes that produce undesired output voltages. The Power Good flag tracks the VID code, but with a 500 microsecond delay from high to low; this is long enough to ensure dynamic voltage scaling. The Power Good (PWRGD) FAN5092 Power Good feature is designed to comply with the Pentium IV DC-DC converter specification and provides a continuous voltage monitor on the VFB pin. The circuit compares the VFB signal to the VREF voltage and outputs a valid low interrupt signal to the CPU that deviates the supply voltage beyond its nominal setpoint. The output guarantees an open collector supply voltage within +8%/-18% above its nominal setting. The power of the good banner provides the control functions of the 5092 without the fan. Output Enable/Soft Start (Enable/SS) The FAN5092 will accept an open collector/TTL signal to control the output voltage. A low state disables the output voltage. When disabled, the PWRGD output is in the low state. Even if enable is not required in the circuit, a capacitor (usually 100nF) should be connected to this pin to soft start the switch. The soft-start capacitor can be selected approximately by the formula:

Schottky Diode Selection

The application circuit shown in the figure shows the Schottky diodes, D1 (respectively D2), one per chip. They are used as freewheeling diodes to ensure that the body diodes turn on when the upper MOSFET is off and the lower MOSFET is off. This diode does not need to conduct electricity because its high forward voltage drop and long reverse recovery time reduce efficiency, so the Schottky provides a path to shunt the current. Because this period is very long. In short, the diode selection criterion is that the Schottky current at the output should be less than the voltage of the forward MOSFET body diode due to adaptive gate delay minimization. Power capability is not the norm for this unit as it has very little loss. Output Filter Capacitor The converter's output bulk capacitance helps determine its output ripple voltage and its transient response. It has been seen in the chapter on choosing an inductor that ESR helps to set the minimum inductance. For most converters, the number of capacitors required is determined by transient response and output ripple voltage, and these are values determined by ESR rather than capacitance. That said, in order to meet the necessary ESR transient and ripple requirements, the capacitor value is already very large. The most common choice for output bulk capacitors is aluminum electrolytes because of their low cost. The only type of aluminum capacitors to use should be those with an ESR rating of 100kHz. Consult Application Bulletin AB-14 for detailed selection of output capacitors. For higher frequency applications, especially those operating above 1MHz consider the FAN5092 oscillator, oscillator or ceramic capacitor. Their ESR is comparable to that of electrolytes, but their capacitance is also much smaller. The output capacitor should also be included as close as possible to the processor; recommended values are 0.1µF and 0.01µF.

input filter

The design of a DC-DC converter can include input inductance between the system mains and the converter input as shown. This inductor is used to isolate the main inductor powered by the noise of the DC-DC switching section of the converter and to limit the inrush current of the input capacitor during power-up. The recommended value is 1.3 μH. It is necessary to install some low ESR capacitors at the input to the converter. when the high-side MOSFET switch is turned on. Because of the interleaving, the number of capacitors required is greatly reduced from that required for a monolithic buck converter. Figure 5 shows 3 x 1000 microF, but the exact amount required will vary for output voltage and current, according to the formula

For a four-blade fan 5092, where DC is the duty cycle, DC=Vout/VIN. Capacitor ripple current rating is a function of temperature, so the manufacturer should be contacted to find out the ripple current rating at the expected operating temperature. For details on input filter design,

Printed Circuit Board Layout Guidelines

The placement of the mosfet relative to the FAN5092 is key. Placing the mosfet on the FAN5092 gate to the FET's HIDRV and LODRV pins is minimized. The long lead lengths on these pins will be due to the gate capacitance of the FET. This noise radiates throughout the board, and since it's switching at such high voltages and frequencies, it's hard to suppress. In general, keep all noisy switch lines away from the quiet analog section of the fan 5092. The IS traces that connect to pins 9-20 (LDRV, HDRV, GND) and boots) should be kept away from connections to pins 1 to 8 and pins 21-28. Place 0.1µF decoupling capacitors as close to the fan 5092 pins as possible. The extra lead length reduces their ability to suppress noise. Each power and ground pin should have its own to appropriate. This helps in pins. Place the given mosfet, inductor and Schottky as close as possible for the same reasons as in the first bullet above. Place the input bulk capacitor as close as possible to the drain of the high-side mosfet.

Additionally, placing a 0.1µF decoupling cap right at the drain of each high-side MOSFET helps suppress high-frequency switching noise at the input of the DC-DC converter. Placing the output bulk capacitors as close to the CPU as possible optimizes their immediate supply capability during current transients in the load current. The output capacitor and CPU will allow the parasitic resistance of the board traces to degrade the performance of the DC-DC converter under severe load transient conditions, resulting in higher voltage excursions. For capacitor placement, refer to Application Bulletin AB-5. Fairchild offers PC board layout checklist applications. Application Bulletin AB-11. PC Board Example Layout and Gerber File A reference design for a board implementing the FAN5092 and PCAD layout Gerber files and silk screens are available through your local Fairchild representative. FAN5092 Evaluation Board Fairchild provides an evaluation board to verify the horizontal performance of the system fan 5092. It is using provided external components and PCB layout.