Features

Very low noise density, 5 nv/√Hz, maximum 1 kHz

[123 ] Excellent input bias voltage, maximum 75 μV

Low offset voltage drift is 1 μV/° C

The minimum high gain of 1500 V/MV

The minimum 106 decibel prominent cmr

Typical 2.4 v/μs conversion rate

Typical 5 MHz gain bandwidth accumulation

Industry standards 8- Drial double inserted foot

General description

OP270 is a high-performance, single-chip, dual operation amplifier, with extremely low voltage noise density (1 kHz is 5 nv/√ at the maximum of 5 nv/√ Hz). Its performance is equivalent to the industrial standards of the simulation equipment company.

The input bias voltage of OP270 is less than 75 μV and the bias drift is less than 1 μV/° C. OP270's opening gain exceeds 1500,000 under 10kΩ load. Even in high -gain applications, it can ensure good gain accuracy and linearity. The input bias current is less than 20 mAh, which reduces the error caused by the signal source resistance. Because co -mode suppression (CMR) is greater than 106 decibels, power suppression ratio (PSRR) is less than 3.2 μV/V. OP270 can significantly reduce errors caused by ground noise and power fluctuations. The power consumption of dual OP270 is one -third less than the two OP27 devices, which is a significant advantage for the application of power consumption. OP270 has the characteristics of unit gain stability, the width of the gain band is 5MHz, and the conversion rate is 2.4V/μs.

OP270 provides excellent amplifier matching, which is very important for applications such as increasing benefits, low noise meter amplifiers, dual buffers, and low noise active filters.

OP270 meets industry standards 8-lead DIP pin. It is compatible with MC1458, SE5532/A, RM4558 and HA5102 dual operation amplifier pins, which can be used to upgrade systems that use these devices.

For higher speed applications, it is recommended to use ADA4004-2 or AD8676. For the four -way computing amplifier, please refer to the OP470 product introduction.

Function box diagram

Typical performance features

Test circuit

Application information Voltage and current noise

OP270 is a very low noise dual operation amplifier amplifier At 1 kHz, its typical voltage noise density is only 3.2 NV/√Hz. Because the voltage noise is inversely proportional to the square root of the collector current, the extremely low noise characteristics of the OP270 are achieved by operating input transistors by operating in the high set electrode current. However, the current noise is proportional to the square root of the collector current. As a result, on the premise of sacrificing current noise performance, the OP270 has excellent voltage noise density performance, which is normal for low noise amplifiers.

In order to obtain the best noise performance in the circuit, the relationship between voltage noise (EN), current noise (in) and resistance noise (ET) must be understood.

Total noise and source resistance

The total noise of the operation amplifier can pass:

In the formula:

EN For total input reference noise.

EN is the voltage noise of an amplifier.

IN is the current noise of an amplifier.

ET is source resistance thermal noise.

RS is the source resistance.

The total noise refers to the input end, while the output end is enlarged by the circuit gain.

FIG. 32 shows the relationship between the total noise and source resistance when 1kHz. When RS is less than 1kΩ, the total noise is controlled by the voltage noise of OP270. When RS rises to more than 1kΩ, the total noise increases, mainly controlled by resistance noise, not the voltage or current noise control of the OP270. When RS exceeds 20kΩ, the current noise of OP270 becomes the main contributor of total noise.

FIG. 33 also shows the relationship between the total noise and source resistance, but at 10 Hertz. Due to the inverse ratio of current noise and frequency, the total noise is faster than the display in Figure 32. In FIG. 33, when RS is greater than 5 kΩ, the current noise of OP270 accounts for the leading position of total noise.

FIG. 32 and Figure 33 show that in order to reduce the total noise, the source resistance must be maintained at the minimum. In applications with high source resistance, OP200, which has lower current noise compared to OP270, can provide lower total noise.

FIG. 34 shows the relationship between peak noise and source resistance from 0.1Hz to 10Hz. At a lower RS u200bu200bvalue, the voltage noise of OP270 is the main contributor to peak noise. As RSI increases, current noise has become the main contributor. The peak noise cross point between OP270 and OP200 is located at the source resistance of 17 kΩ.

Table 5 lists a typical source resistance of some signal sources for reference.

Noise measurement

Peak voltage noise The circuit of FIG. 35 is a test device that measures the peak of peak voltage noise. To measure the 200 NV peak noise specifications of OP270 within the range of 0.1 Hz to 10 Hz, the following preventive measures must be complied with:

the device must be warm up at least 5 minutes. As shown in the preheating drifting curve (see Figure 8), due to the increase in the temperature of the chip after power, the bias voltage usually changes by 2 μV. Within 10 seconds of measurement intervals, the effects caused by these temperatures can exceed dozens of millivolves.

Out of similar reasons, the device must shield the airflow well. The shielding can also minimize the impact of the thermocouple.

Sudden exercise near the device may also pass, thereby increasing the observed noise.

measurement time to measure 0.1 Hz to 10 Hz noise should not exceed 10 seconds. As shown in the response curve of the noise test instrument, the 0.1 Hz corner is only defined by one pole. The 10 -second test time is used as an extra pole to eliminate the noise contribution of the frequency band below 0.1.

When measuring the noise of multiple devices, the noise voltage density test is recommended. 10 Hephz noise voltage density measurement has a good correlation with 0.1 Herz to 10 Hitz peak noise reading, because these two results are determined by the position of white noise and 1/f angle frequency.

The low -noise power supply (such as batteries) should be powered by a good bypass. This power supply will minimize the output noise introduced by the amplifier pins.

Noise measurement noise voltage density

The circuit of FIG. 37 shows a method of rapid and reliable measurement of dual -computing amplifier noise voltage density. The first amplifier is the unit gain, and the non -ease gain of the last amplifier is 101. Because the noise voltage of the amplifier is irrelevant, they add an effective value to generate:

OP270 is a single -chip device with two same amplifiers.

Therefore, the noise voltage density of the amplifier matches

Noise measurement current noise density

FIG. 38 shown in FIG. The test circuit can be used to measure the current noise density. The relationship between the voltage output and the current noise density is:

in the formula:

G is the gain of 10000.

RS u003d 100 KΩ source resistance.

Considering the capacity load driver and power supply

OP270 is a unit gain stable, which can drive large capacitors load without oscillation. Nevertheless, it is strongly recommended to bypass good supply. Proper power bypass can reduce problems caused by the noise of the power cord and improve the capacitor load driving capacity of OP270.

In the standard feedback amplifier, the output resistance of the computing amplifier is combined with the load capacitance to form a low -pass filter, which adds phase shift and reduce stability in the feedback network. Figure 39 shows a simple circuit to eliminate this impact. Component C1 and R3 decouple the amplifier and load capacitors, and provide additional stability. The C1 and R3 values u200bu200bshown in Figure 39 are suitable for load capacitors up to 1000 PF when they are used with OP270.

Unit's gain buffer application

When the input is driven by fast, large signal pulse (u0026 gt; 1V) 40 shown.

In the similar fast -feding part of the output, the input protective diode effectively connects the output to the input terminal, and the signal generator will generate a current with only short -circuit protection restrictions. When RF ≥ 500Ω, the output can handle the current requirements (at 10 V IL ≤20 ma); the amplifier remains in the activation mode and a smooth transition occurs.

When RF u0026 GT; 3KΩ, an extra phase shift and reduced phase margin formed by the input capacitance (3pf) of RF and amplifiers. Small capacitors (20 PF to 50 PF) with RF help to eliminate this problem.

Low -phase error amplifier

FIG. 41 The simple amplifier uses a single -chip dual -computing amplifier and several resistors, which is compared with the traditional amplifier design compared to the design of the traditional amplifier design , Greatly reduced phase errors. Under the given gain, the frequency range of the specific phase accuracy is more than ten years than the frequency range of the standard single -transport deletion of the large dealers.

Low phase error error amplifier The second order frequency compensation for the response of the operation amplifier A2 through the A1 feedback circuit. The two operational amplifiers must match the frequency response. At low frequency, A1The feedback circuit forced V2/(k1+1) u003d vin. A2 feedback circuit forced VO/(k1+1) u003d v2/(k1+1) to generate the overall transmission function of VO/VIN u003d K1+1. The DC gain is determined by the resistor division of the output end, which is not directly affected by the resistor separator near A2. Note that, like the traditional single transportation large dealer, DC gain is only set up by a resistance ratio. The minimum gain of low phase error amplifier is 10.

FIG. 42 The comparison of the low phase error amplifier and the traditional single transportation amplifier and the class joint amplifier. The low phase error amplifier shows a lower phase error, especially for the frequency of ω/βωt u0026 lt; 0.1. For example, the single -handed dealers appear at 0.002Ω/βΩt at a phase error of u0026#8722; 0.1 °, and the phase error of the low phase error amplifier is 0.11Ω/βΩt.

Five waves, low noise, three -dimensional graphic balancer

Figure 43 The graphics balancer circuit provides 15 dB of 15 dB within the five frequency band range Enhanced or cut off. The signal -to -noise ratio on the 20KHz bandwidth is better than 100dB, and refer to 3V RMS input. The larger inductors can be replaced by the active electrical sensor, but the signal -to -noise ratio is reduced.

Digital shaking control

Figure 44 Use DAC8221 (dual 12 -bit CMOS DAC) to translate between two channels. In the configuration of the current voltage converter, a channel is formed by the current output of the DAC A driven by half of the OP270. Another channel is formed by the complementary output current of DAC A, which often flows to the ground through the AGND pins. This complementary current is converted by the other half of OP270 to voltage, and it also keeps AgND on the virtual ground.

By using the feedback resistor inside the DAC8221, the gain error caused by the internal DAC trapezoidal resistor and the current-voltage feedback resistor. Only DAC A transmits a signal; DAC B provides a second feedback resistor. In the case of VREFB discomfort, the current-voltage converter using RFBB is accurate and is not affected by the digital data of DACB. In the audio range of 20Hz to 20KHz, the distortion of digital shake control is less than 0.002%. Figure 45 shows the complementary output of the 1 KHz input signal and the digital slope applied to the DAC data input.

Dual programming gain amplifier

Dual OP270 and DAC8221 (a dual 12 -bit CMOS DAC) can be combined into a dual programming amplifier that saves space. The digital code in DAC is easily set by microprocessor. It determines the internal feedback resistorThe ratio of the resistance of the feedback circuit of the operation amplifier feedback from the DAC trapezine.The gain of each amplifier is;

Among them, n is the decimal value of the 12 -digit code in DAC.

If the digital code in the DAC consists of all 0, the feedback loop is opened, causing the output saturation of the operation amplifier.The 20 MΩ resistor, which is parallel with the DAC feedback loop, eliminates this problem, and the gain accuracy is only a small reduction.

Character size