L6743 L6743Q Lar...

  • 2022-09-15 14:32:14

L6743 L6743Q Large current MOSFET driver

Features

Dual MOSFET driver used for synchronization rectification

Converter

High drive current of fast external MOSFET

Switch

123] Integrated the diode

High -frequency operation

Enable the pin

Self -adaptive dead zone management

Flexible door drive: 5 V to 12 V v Compatible

Output high impedance (Hiz) management

Phase stop

Preliminary OV protection

SO-8 and DFN10 3x3 pack

[

[ 123] Application

Power -type machine/server large current VRM/VRD/Workstation CPU

Large current, high -efficiency DC/DC converter

Explanation

] L6743, L6743Q are a flexible high -frequency dual -drive, which is specially designed to drive the N -channel synchronous rectifier MOSFET Barg topology. Combined with the ST PWM controller, the drive allows the implementation of a complete voltage regulator modern large -current CPU and DCDC conversion. L6743 and L6743Q are two high -voltage sides embedded in large current drives and low -side MOSFETs. The device accepts flexible power supply (5 V to 12 V) to optimize the efficiency of the high -voltage and low grille drive voltage of the high -voltage and low -voltage side. Built -in self -lifting diode to save the use of external diode. Reflex piercing management avoids the high side and the low side MOSFET at the same time, combined with the control of adaptive dead areas, minimizing the transmission time of the diode of the LS body diode. L6743, L6743Q embedded in preliminary OV protection: When VCC overcomes UVLO and the device in Hiz, the LS-MOSFET is opened to protect the load to prevent the output of the HS failure for the output voltage to overcome the warning threshold. The available driver is SO-8 and DFN10 3X3 packaging

Electric characteristics

Table 5. Electrical characteristics

(VCC u003d 12 V ± 15%, TJ u003d 0 ° C to 70 ° C, unless there are other regulations)

Device description and equipment description and Operation

L6743, L6743Q provides high-voltage and low-voltage sides to provide large current drivers to control the N-channel MOSFET as an external drive-voltage DC-DC converter to connect the PWM signal. The integrated large current drive allows the use of different types of power MOSFETs (also multiple MOS to reduce equivalent RDS (on) to maintain a fast switch transition. The driver of the high -voltage side MOSFET uses a starting pin to power, and the phase pins are used to return. Low side MOSFET's driver uses a VCC pin to power, and the PGND pin is used to return. The driver uses counterattack and adaptive dead zone control to minimize the conduction time of the low -side diode, maintain good efficiency, and save the use of Schottky

Diodes: When the high -voltage side MOSFET is closed, the high -voltage side MOSFET is closed. The source voltage began to decrease; when the voltage reaches about 2V, the low voltage MOSFET gate drive voltage suddenly applied. When the low side MOSFET is closed, the voltage on the LGATE pin is detected. When it fell, below 1V, the high -voltage side MOSFET gate driver voltage was suddenly applied. If the current in the inductors is negative, the source of the high side MOSFET will never decrease. Even in this case, in order to allow the low -side MOSFET to be turned on,

Watch the door dog controller enable: If the source of the high side MOSFET does not decrease, then the low side MOSFET is opened, so that the negative current of the sensor makes the sensor's negative current Circulation. Even if the current is negative, the system is allowed to adjust. Before VCC overcomes the UVLO threshold, L6743 and L6743Q always firmly close the high and low -pressure side MOSFET. Then, after UVLO is over, EN and PWM input control the driver's operation. EN PIN enable driver: If low, all MOSFETs are closed (Hiz), which has nothing to do with PWM status. When EN is high -electricity, PWM input

Accept control: If it keeps floating, the internal resistor division of the HIZ state: The MOSFET has been closed before the PWM conversion. After the UVLO traverses and at Hiz, the preliminary OV protection is activated: if the voltage induction overcomes about 1.8 volts through the phase pin, the low side MOSFET is locked to protect the load from dangerous overvoltage. The driver status is to reset from PWM.

Drive power and power conversion input flexible: 5V and 12V can choose high -side and low -side MOSFET voltage drivers.

High impedance (HIZ) management

The driver can manage two different ways to manage high impedance state by maintaining all MOSFETs in a closed state.

If the EN signal is pulled down, the device will keep all MOSFETs closed and ignore the PWM state.

When EN is asserted, if the PWM signal is maintained in the Hiz window for a longer time

In addition to the waiting time, the device detects the Hiz status, so all Moss Fitz is turned off. The Hiz window is defined as containing VPWM_IL and VPWM_IH. Only after the PWM is converted to the logic zero (VPWM), the device exits lt; VPWM_-IL) from the Hiz state. For detailed information about Hiz timing, see Figure 4. Realization of high impedance status allowsThe controller to be connected to the drive to manage its output high impedance status to avoid incomplete voltage regulation of the negative electrode during the closing phase. Moreover, differential power management status can be managed, such as pre -pressure startup.

Preliminary OV protection

After VCC overcomes its UVLO threshold, in Hiz, L6743 and L6743Q activate preliminary OV protection. The purpose of this protection is to protect the load, especially the high -side MOSFET failure during the system start. In fact, VRM, and more general PWM controller, have a 12 -volt line compatible opening threshold. If the VCC is lower than the opening threshold (the result is within about 10 V), it will not work. If it is a high -sided MOSFET, if there is a failure, the controller will not recognize the voltage before VCC u003d ~ 10 V (unless other special functions are implemented): But in this case, the output voltage is already the same voltage (~ 10V) and and the output voltage (~ 10V) and and the The load (mostly CPU) has been burned. L6743, L6743Q lock the PWM controller by locking the low -voltage side MOSFET bypass PWM controller, and the phase PIN voltage exceeds 2V. When the PWM input exits the window, the Hiz window is protected, and the output voltage control is transferred to the controller to connect to the PWM input. Because the driver has its own UVLO threshold, a simple method is to use the 5 VSB bus: 5 VSB always appears before any other voltage when the device is closed, and if it is the high -voltage side. Low MOSFET driver 5V to ensure the reliable protection of the load. The initial OV activated after UVLO, when the driver was in HIZ state and was disabled after the first PWM conversion. The controller must manage its output voltage time.

Internal boot diode

L6743, L6743Q embedded a starting diode to power the high -voltage side drive, saving the use of external components. Just connect an external capacitor between the start and the phase to complete the high -voltage side power connection. In order to prevent the self -raising capacitors from generating additional charge due to large negative peaks, the external series resistance RBOOT may be needed when connected to the trips (within a few ohms). It is necessary to design a capacitor to show that the high -side MOSFET is turned on. In fact, it must provide a stable voltage supply to the high -voltage drive. During the start of the MOSFET, it can also minimize the power diode consumed by embedded startup. Figure 5 gives some guidance for how to discharge and choose according to the required.

Power loss

L6743, L6743Q is high and low -side MOSFET embedded in high current drives: yes The energy consumed in the process to avoid overcoming the highest junction work temperature. The main cause of the power consumption of the deviceThere are two: bias power and driver power.

The power consumption of the device (PDC) depends on the static power consumption of the device to provide pins, which can be simply quantified:

The driver's power supply refers to the electrical energy external MOSFET required by the driver's continuous switch, it It is the MOSFET selected by the switch frequency and the function of the total grid charge. Considering that the MOSFET that can be quantified by the total power PSW has three main factors: the outer fence pole resistance (if existence), the MOSFET resistor, and the drive resistor resistance. The last item is an important item dissipation that needs to be determined by calculating the power of the device.

The total power result consumed by the switch MOSFET: PDC VCC ICC VPVCC IPVCC u003d #8901; PSW F u003d SW #8901; qghs #8901; PVCC+QGLS

When applying L6743Q, it is recommended to consider the impact of external gate resistance on the driver consumption power. The external grid resistance helps the device to dissipate the switch power, because the power PSW will be shared between the internal driver impedance and the external resistor and the device will generally cool down. For Figure 6, the typical MOSFET driver can use push-pull output to indicate two different MOSFET grades: P-MOSFET driver is extremely high, N MOSFET driver is low (using its own RD (on): RHI: RHI峎 HS, RLO s HS, RHI 峎 LS, runway). In this case, the external power MOSFET can be represented by a capacitor (CG_-HS, CG-LS) to store the grid charge (QG-HS, QG-ULS) MOSFET required to store the external power supply (HS is PVCC, PVCC, LS is VCC). This capacitor is charged and discharged by the driver switch FSW. Total power PSW is driving along the way. According to the raster resistor of the external grid resistance and power MOSFET, the driver only dissipates part of the PSW, as shown below:

Layout Guide

L6743 and L6743Q provides driving capabilities to achieve large current antihypertensive DC-DC converters. The first priority when placing components for these applications must be retained to the power supply part to minimize the length of each connection and circuit. To minimize noise and voltage peaks (also including EMI and loss) power connection must be a part of a power supply plane and no matter how to achieve a wide copper trace: the ring must be minimized anyway. Key components, such as power MOSFET, must approach others. However, there are still some space between power MOSFET to ensure good performance hot and cooling and airflow. The trajectory between the driver and the MOSFET should be short and wide to minimize the trajectory inductance of the bell in the driver signal as much as possible. In addition, Tong Kong is also important to minimize itTo reduce related parasitic effects. It is recommended to use a multi -layer printing circuit board. Small signal components and key nodes connecting to applications, as well as bypass power containers with device power supply. Find bypass electric containers (VCC, PVCC, and BOOT capacitors) close to the device, and use wide copper wire as short as possible to minimize parasitic inductors. The system that does not use the Sytky diode and the low -edge MOSFET may show a large peak on the phase needle. This peak is as limited as the positive peak, but there is an additional consequence: it can cause the self -raising capacitor to over -charge. During the maximum input voltage and in a specific transient process, the starting voltage to overcome the absolute maximum rated value also causes the device to fail. In this case, it is recommended to add a small resistance string to the startup capacitor. Using Rboot also helps start the peak restriction on the pin. To dissipate heat, put the copper chip under IC. The copper area can connect the internal copper layer to improve thermal conductivity through several holes. The combination of copper pads, copper planes and perforations under this driver allows the equipment to achieve the best thermal performance.