feature

Quasi-Resonant Converter (QRC) Optimization

Advanced Burst Mode Operation Below 1W

Standby power consumption

Pulse current limit

Overload Protection (OLP) - Automatic restart

Over Voltage Protection (OVP) - Auto Restart

Abnormal Over Current Protection (AOCP) - Latching

Internal Thermal Shutdown (TSD) - Latch

Undervoltage Lockout (UVLO) with Hysteresis

Low start-up current (typ: 25µA)

Internal high pressure sensor

Built-in soft-start (20ms)

Extended Quasi-Resonant Switching

application

CTV Corporation

audio amplifier

Related application instructions

AN4146: Quasi-Resonant Design Guidelines FSCQ Series Fairchild Power Converter Switching. AN4140: Transformer Design Considering Offline Flyback Converter Switching Using Fairchild Power Supplies.

illustrate

Quasi-resonant converters (QRCs) generally exhibit lower EMI and higher power conversion efficiency compared to conventional hard-switching converters at fixed switching frequencies. Therefore, QRC is well suited for noise sensitive applications such as color TV and audio. Each product in the FSCQ family contains an integrated pulse width modulation (PWM) controller and a sensor designed specifically for quasi-resonant off-line switch mode power supplies (SMPS) with minimal external components. The PWM controller includes an integrated fixed frequency oscillator, undervoltage lockout, leading edge blanking (LEB), optimized gate drivers, internal soft start, temperature compensated precision current source for loop compensation, and protection circuitry. Compared to discrete MOSFET and PWM controller solutions, the FSCQ series can reduce overall cost, parts count, size and weight while simultaneously increasing efficiency, productivity and system reliability. These devices provide a basic platform well suited for cost-effective quasi-resonant designs of switched flyback converters.

Table 1. Maximum output power

notes:

1. Maximum practical continuous power in an open frame design at 50°C.

2. 230 VAC or 100/115 VAC with frequency multiplier.

3. The junction temperature can limit the maximum output power.

Absolute Maximum Ratings (continued) (TA=25°C unless otherwise specified)

notes:

4. Repeat Rating: Pulse width limited by maximum junction temperature.

5.L=15mH, start Tj=25°C, although these parameters are guaranteed in design, but not tested in mass production

Function description

1. Start-up: The figure shows a typical start-up circuit and auxiliary windings of FSCQ series transformers. Before the FSCQ series starts switching, it consumes only startup current (typically 25µA). The AC line provides current to charge the external capacitor (Ca1) connected to the Vcc pin. When Vcc reaches the start-up voltage of 15V (Vstart), the FSCQ series starts switching and its current consumption increases to IOP. The FSCQ series then continues its normal switching operation and the required power FSCQ series is supplied by the auxiliary winding of the transformer unless VCC is below the stop voltage. 9V (vertical stop). To ensure control IC, VCC has under-voltage lockout (UVLO) function with 6V hysteresis. Diagram showing FSCQ series and supply voltage (VCC).

The minimum average value of the power supply current AC is given by

Where Vacmin is the minimum input voltage, Vstart is the FSCQ series start-up voltage (15V), and Rstr is the start-up resistor. The startup resistor should be chosen to ensure that the Isup AVG is greater than the maximum startup current (50µA). Once the resistor value is determined, the maximum loss is in the startup resistor, resulting in:

where VACMAX is the maximum input voltage. Startup resistors should have appropriate power dissipation ratings.

2. Synchronization: The FSCQ series employs a quasi-resonant switching technology to minimize switching noise and losses. In this technique, a capacitor (Cr) is added between the MOSFET drain and source as shown. The basic waveform of the quasi-resonant converter is shown in Figure 7. The external capacitor reduces the rising slope of the drain voltage to reduce the EMI generated when the MOSFET is turned off. To minimize the switching losses of the MOSFET, the MOSFET when the drain voltage reaches a minimum value is shown in the figure.

The minimum drain voltage is indirectly detected by monitoring the Vcc winding voltage, as shown in Figures and 8. The voltage dividers RSY1 and RSY2 are chosen so that the peak voltage of the sync signal (Vsypk) is lower than the OVP voltage (12V) which avoids triggering the OVP under normal conditions of operation. Typically Vsypk is set 3–4V below the OVP voltage. To detect the optimal turn-on time MOSFET, the synchronization capacitance (CSY) should be determined so that TR is the same as TQ, as shown. TR and TQ are expressed as: where Lm is the primary side inductance of the transformer, Ns and Na are the output winding and VCC winding, respectively VFo and VFa are the output diode forward voltage drops are the winding and Vcc winding respectively, Ceo is the output capacitor and external capacitor of the MOSFET , Cr.

In general, QRC has a limited application over a wide load range because the switching frequency decreases with output load, resulting in severe switching losses under light load conditions. To overcome this limitation, the FSCQ series employs an extended quasi-resonant switching operation. The figure shows the changing operation of mode normal and extended quasi-resonant. In normal quasi-resonant operation the FSCQ series goes into extended quasi-resonant switching frequency operation above 90kHz with load reduction. To reduce the switching frequency, when the drain voltage reaches the second minimum level, as shown in Figure 10. Once the FSCQ series enters quasi-resonant operation, the first sync signal is ignored. After the first sync signal is applied, the sync threshold levels change from 4.6V and 2.6V to 3V and 1.8V, respectively, synchronizing the on-time of the MOSFET with the second sync signal. The FSCQ series increases the switching frequency up to 45kHz when under load.

3. Feedback control: FSCQ series adopts current mode control, as shown in Figure 11. Optocouplers (such as Fairchild's H11A817A) and shunt regulators (such as Fairchild's KA431) are often used to implement feedback networks. Comparing the voltage bias voltage fed back through the Rsense resistor makes it possible to control the switching duty cycle. When the KA431 exceeds the internal reference voltage of 2.5V, the H11A817A LED current increases, pulling down the feedback voltage and reducing the duty cycle. This activity usually occurs when the input voltage increases or the output load decreases.

3.1 Pulse-by-pulse current limit: Because the current is controlled in mode, the PWM is limited by the inverting input of the SenseFET comparator (Vfb*) as shown in Figure 11. The feedback current (IFB) and internal resistors should be designed to ensure that the maximum cathode voltage of diode D2 is about 2.8V when all IFB passes through the internal resistors. Because when the feedback voltage (VFB) exceeds 2.8V, the maximum voltage of the cathode is at this voltage, and the voltage of D2 is clamped, thereby clamping Vfb*. Therefore, passing through the SenseFET is limited.

3.2 Leading Edge Blanking (LEB): The internal sensing FET turns on, usually through the current spike of the sensing FET, reverse-recovered by passing through the MOSFET and secondary side rectifier. In current mode PWM control, excessive voltage across the Rsense resistor can cause incorrect feedback operation. To the contrary, the FSCQ series uses a leading edge blanking (LEB) circuit. This circuit suppresses the PWM sense FET for a short time after the comparator has been turned on.

4. Protection circuit: FSCQ series has several self-protection functions such as overload protection (OLP), abnormal overcurrent protection (AOCP), overcurrent voltage protection (OVP) and thermal shutdown (TSD). OLP and OVP are auto-restart mode protections, while TSD and AOCP are latched mode protections. Because these protection circuits are fully integrated in the integrated circuit, reliability can be improved without adding cost if there are no external components. – Auto-restart mode protection: Once a fault condition is detected, the switch is terminated and the SenseFET remains off. This causes VCC to drop. when? Vcc drops to 9V under-voltage lockout (UVLO) stop voltage, protection resets, and the FSCQ series consumes only startup current (25µA). Then, the Vcc capacitor charges because the current supplied through the start-up resistor is greater than the current drawn by FPS. When VCC is activated with a voltage of 15V, the FSCQ series resumes normal operation. If the fault condition is not removed, the SenseFET remains off and VCC drops to the stop voltage again. This way, auto-restart can alternately enable and disable the power toggle sensor setting until troubleshooting (see diagram).

Latch Mode Protection: Once triggered, the switch is terminated and the induction FET remains off until the AC power cord is unplugged. Well, VCC continues to charge and discharge between 9V and 15V. The latch will only reset when VCC is discharged to 6V by unplugging the AC power line.

4.1 Overload Protection (OLP): Define overload due to unexpected abnormal events. In this case, a protection circuit should be triggered to protect the switching power supply. However, the load protection circuit transition can be triggered even during normal operation of the switching power supply. To avoid this unexpected action the load protection circuit is designed to determine at a specific time whether it is a temporary situation or an overload situation. Because of the one-by-one current limiting capability, the maximum peak current through the SENSEFET is limited, so the maximum input power is limited by a given input voltage. If the output consumes more than this maximum power, the output voltage (Vo) drops below the set voltage. This reduces the current through the optocoupler LED, which also reduces the current through the optocoupler transistor, thereby increasing the feedback voltage (Vfb). If Vfb exceeds 2.8V, D1 is blocked and the 5µA current source begins to slowly charge CB up to VCC. In this case, Vfb continues to increase until it reaches 7.5V, then the switching operation is terminated as shown. The delay time to turn off is to charge the CB from 2.8V to 7.5V with 5µA. Typically, A20~50ms delay time is typical in most applications. Orp is implemented in auto-restart mode.

4.2 Abnormal Over Current Protection (AOCP): When the secondary rectifier diode or transformer pins are short-circuited, a steep current with extremely high di/dt can flow through the sensor during the LEB time. Even though the FSCQ series has OLP (overload protection), in this case, it is not enough to protect the FSCQ series only from abnormal situations, because severe current stress is applied to the sensor until the OLP triggers. This FSCQ series has an internal AOCP (Anomalous Over Current Protection) circuit as shown. when? The gate open signal is applied to the SenseFET on the power supply, enabling the AOCP block and monitoring the current through the sense resistor. The voltage passed through the resistor is then compared to the preset AOCP level. If the sense resistor voltage is greater than the AOCP level, the set signal is applied to the latch, causing the SMPS to turn off. This protection is in latched mode.

4.3 Over Voltage Protection (OVP): If a side feedback circuit failure or solder defect causes an open circuit in the feedback path, the current through the optocoupler transistor becomes almost zero. Then, Vfb rises in a similar manner to an overload condition, forcing a preset maximum current to the SMPS until the overload protection triggers. Because it is supplied to the output, the output voltage may exceed the rated voltage before the overload protection triggers, causing secondary equipment failure. Neat To prevent this, Over Voltage Protection (OVP) circuit is employed. In general the synchronization signal is proportional to the output voltage, and the FSCQ series uses the synchronization signal instead of directly monitoring the output voltage. If the sync signal exceeds 12V, an OVP is triggered. To avoid accidental OVP triggering during normal operation, the peak voltage of the sync signal should be designed to be lower than 12V. This protection is implemented in auto-restart mode.

4.4 Thermal Shutdown (TSD): The sensor and control chip are built into one package. This enables the detection of sensory nets. Thermal shutdown is triggered when the temperature exceeds about 150°C. This protection is implemented in latch mode.

5. Soft start: FSCQ series has an internal soft start to increase the circuit voltage and induced current of the inverter input of the PWM comparator before it starts up. Typical soft-start time is 20ms. The width of the pulsed power switching device is gradually increased to establish correct operating conditions of transformers, inductors and capacitors. Increasing the pulse width of the power switching device also helps prevent transformer saturation and reduces secondary diodes during startup. In order to quickly accumulate the output voltage, an offset reference current is introduced in the soft-start.

6. Burst operation: To minimize power consumption in standby mode, the FSCQ series adopts burst operation. Once the FSCQ series enters burst mode, the FSCQ series allows all output voltages to reduce the effective switching frequency. Figure 15 shows a typical feedback circuit for a C-TV application. In normal operation, the image-on signal is applied and transistor Q1 is turned on, which separates R3, Dz and D1 from the feedback network. Therefore, only Vo1 is run normally, determined by R1 and R2 as:

In standby mode, the picture ON signal is disabled and transistor Q1 is turned off, which couples R3, Dz, D1 to the reference pin of KA431. Then, Vo2 is determined by the Zener diode breakdown voltage. Assuming a 0.7V forward voltage drop on D1, the Vo2 backup mode is roughly given by:

Figure shows burst mode operation waveforms. When the picture ON signal is disabled, Q1 is turned off R3 and Dz are connected to KA431 to D1. Before Vo2 drops to Vo2stby, the voltage on the reference pin of the KA431 is higher than 2.5V, increasing the current through the photodiode. This reduces the feedback voltage (VFB) of the FSCQ series and forces the FSCQ series to stop switching. If the switch is disabled for more than 1.4ms, the FSCQ series enters into burst operation, reducing the operating current from IOP to 0.25 mA (IOB). Because there is no switch, Vo2 decreases until Vo2stby is reached. When Vo2 reaches Vo2stby, the current through the photodiode decreases, allowing the feedback voltage to rise. When the feedback voltage reaches 0.4V, the FSCQ series continues to switch with a predetermined peak leakage current of 0.9A after the switching pulse for 1.4ms, and the FSCQ series stops switching to check the feedback voltage. If the feedback voltage is lower than 0.4V, the FSCQ series stops switching until the feedback voltage increases to 0.4V. If the feedback voltage is higher than 0.4V, the FSCQ series resumes normal operation. The output voltage drop circuit can be implemented or as shown. In the circuit shown in the figure, the signal is applied to Q1 when the image is off. Then, Vo2 is determined by the Zener diode breakdown voltage. The approximate value of VO2 in standby mode assuming a photodiode forward voltage drop of 1V gives:

feature

High efficiency (greater than 83% at 90V AC input) Low standby mode power consumption (<1W) through extended quasi-resonant operation The 24 volt output is designed to drop to around 8 volts in standby mode