feature

On-chip temperature sensor; external temperature measurement with remote diode; interrupt and overtemperature outputs; fault-tolerant fan control with automatic hardware trip point; remote reset and power-down capabilities; LDCM support; system management bus (SMBus) communication; standby mode to minimize Power consumption; limit comparison of all monitored values; DAC output for linear fan speed control; ramp rate register to control rate of change; fan speed, fan noise reduction.

application

Network servers and personal computers; microprocessor-based office equipment; test equipment and measuring instruments.

General Instructions

The ADM1028 is a low cost temperature monitor and fan microprocessor system controller. Temperature can measure the processor temperature in a diode single-processor system with a remote sensor. An on-chip temperature sensor monitors the ambient system temperature. Measured values can be programmed via the system management read bus and limit comparison values on the same serial bus.

The ADM1028 also contains a DAC for fan speed control. One provides an automatic hardware temperature trip point and the fan will be driven to full speed if exceeded. The ramp rate register is used to control how fast the fan speed increases or decreases. This is to eliminate sudden changes in fan speed, thereby reducing fan noise and extending fan life. Finally, the chip has a remote reset and power down feature, allowing it to be shut down remotely via SMBus.

The ADM1028's 3.0 V to 5.5 V supply voltage range, low supply current, and SMBus make it an application. These include hardware monitoring applications in personal computers, electronic test equipment, and office electronics.

Typical Performance Characteristics – ADM1028

Function description

The ADM1028 is a low-cost temperature monitor and fan controller for microprocessor-based systems. The temperature of the remote sensor diode can be measured to monitor processor temperature in a single-processor system. Onboard temperature sensors allow monitoring of the system ambient temperature.

Measured values can be read via the serial system management bus, and limit comparison values can be programmed on the same serial bus.

The ADM1028 also contains a DAC for fan speed control. Provides an automatic hardware temperature trip point for fault tolerant fan control, beyond which the fan will be driven to full speed. Provides two interrupt outputs that will be asserted if software or hardware limits are exceeded. Finally, the chip has remote reset and shutdown capabilities.

Internal registers of the ADM1028

The main internal registers of the ADM1028 are briefly described below. See Tables 3 through 9 for more detailed information on the function of each register.

Configuration Register: Provides control and configuration.

Address Pointer Register: This register contains the address that selects one of the other internal registers. When writing to the ADM1028, the first byte of data is always a register address, which is written to the address pointer register.

Interrupt (INT) Status Register: This register provides the status of each interrupt event.

Interrupt (INT) Mask Register: Allows masking of individual interrupt sources.

Value and Limit Registers: Temperature measurement results - guaranteed to be stored in these registers along with their limit values.

Analog Output Register: The code that controls the analog output DAC is stored in this register.

Alarm Status Register: Indicates the status of thermal signals and GPI pins.

Remote Function Register: This register allows control of the R_RST and R_OFF outputs.

Fan Speed Ramp Register: This register allows enabling/disabling of the DAC ramp and provides control of the fan speed ramp rate.

serial bus interface

Control of the ADM1028 is performed over the serial bus. The ADM1028 is connected to this bus as a slave device under the control of a master device such as an 810 chipset.

The ADM1028 has a 7-bit serial bus address. When the device is powered up, it will use the default serial bus address. The SMBus address of the ADM1028 is 0101110 in binary.

The serial bus protocol operates as follows:

1. The host initiates a data transfer by establishing a START condition (defined as a high-to-low transition on the serial data line SDA) while the serial clock line SCL remains high. This means that the address/data stream will follow. All slave peripherals connected to the serial bus respond to the start condition and shift in the next 8 bits, including the 7-bit address (MSB first) plus the R/W bit, the R/W bit Determines the direction of data transfer, i.e. whether the data will be written or read from the slave device.

The peripheral whose address corresponds to the address sent responds by pulling the data line low during the low cycle before the ninth clock pulse (called the acknowledge bit). All other devices on the bus are now idle while the selected device is waiting to read or write data from it. If the R/W bit is 0, the master will write to the slave. If the R/W bit is 1, the master will read from the slave.

2. Data is sent over the serial bus in the order of 9 clock pulses, 8 bits of data, and an acknowledgment bit from the slave device. Transitions on the data line must occur during the low period of the clock signal and remain stable during the high period because a low-to-high transition while the clock is high can be interpreted as a stop signal. The number of bytes of data that can be transferred over the serial bus in a single read or write operation is limited only by what the master and slave devices can handle.

3. A stop condition is established when all data bytes are read or written. In write mode, the master will assert the stop condition by pulling the data line high during the tenth clock pulse. In read mode, the master will overwrite the acknowledge bit by pulling the data line high during the low cycle before the ninth clock pulse. This is called non-recognition. The master will then assert the stop condition by taking the data line low for the low period before the tenth clock pulse and then taking the data line high during the tenth clock pulse.

In one operation, any amount of data can be transferred over the serial bus, but it is not possible to mix reads and writes in one operation because the operation type is determined at the beginning and cannot be done without starting a new operation Subsequent changes.

For the ADM1028, a write operation consists of one or two bytes, a read operation consists of one byte, and performs the following function: To write data to or read data from one of the device data registers, the address pointer register must be set so that the correct address of the data register before data can be written to or read from it. The first byte of a write operation always contains the address stored in the address pointer register. If data is to be written to the device, the write operation consists of writing the second data byte of the register selected by the address pointer register.

As shown in Figure 2a, the device address is sent over the bus with R/W set to 0. Followed by two data bytes. The first data byte is the address of the internal data register to be written, which is stored in the address pointer register. The second data byte is the data to be written to the internal data register.

When reading data from a register, there is only one possibility:

one. The serial bus address is written to the device along with the address pointer register value. The ADM1028 should then acknowledge the write by pulling SDA low during the ninth clock pulse. The master server does not generate a stop condition, but issues a new start condition. The serial bus address is sent again, but with the R/W bit high, indicating a read operation. The ADM1028 will then return the data from the selected register and generate a "No" acknowledgment to indicate the end of the read operation. The host will then initiate a stop condition to end the transaction and release the SMBus.

Temperature measurement system internal temperature measurement

The ADM1028 contains an on-chip bandgap temperature sensor. An on-chip ADC converts the sensor output and outputs the temperature data in 8-bit 2's complement format. The temperature data format is shown in Table 1.

External temperature measurement

The ADM1028 can measure the temperature of an external diode sensor or diode transistor connected to pins 9 and 10.

Pins 9 and 10 are a dedicated temperature input channel. The default function of pins 11 and 12 is as a thermal output to indicate an overtemperature condition.

The forward voltage of diodes or diode-connected transistors operating at constant current shows a negative temperature coefficient of about -2 mV/°C. Unfortunately, the absolute value of VBE varies from device to device and requires individual calibration to remove this, making this technique unsuitable for mass production.

The technique used in the ADM1028 is to measure the change in VBE when the device is operated at two different currents.

This is given by:

where: K is the Boltzmann constant. q is the charge on the carrier. T is the absolute temperature in degrees Kelvin. N is the ratio of the two currents.

Figure 3 shows the input signal conditioning used to measure the output of an external temperature sensor. This image shows an external sensor as a substrate transistor for temperature monitoring on some microprocessors, but can also be a discrete transistor.

If a discrete transistor is used, the collector will not be grounded and should be connected to the base. If using a PNP transistor, connect the base to the D- input and the emitter to the D+ input. If using an NPN transistor, the transmitter is connected to the D- input and the base is connected to the D+ input.

To prevent ground noise from interfering with the measurement, the more negative side of the sensor is not referenced to ground, but is biased to ground by an internal diode at the D- input.

If the sensor is used in a very noisy environment, a capacitor of up to 1000 pF can be placed between the D+ and D- inputs to filter the noise.

To measure ∏VBE, the sensor switches between I and N×I operating currents. The resulting waveform is passed through a 65 kHz low-pass filter to remove noise before entering a chopper-stabilized amplifier, which performs the amplification and correction functions of the waveform to produce a DC voltage proportional to ∏VBE. This voltage is measured by the ADC, which provides the temperature output in 8-bit 2's complement format. To further reduce the effect of noise, digital filtering is performed by averaging the results over 16 measurement cycles. External temperature measurements typically take 9.6 ms.

Layout Considerations

Digital circuit boards can be electrically noisy environments and care must be taken to protect analog inputs from noise, especially when measuring very small voltages from remote diode sensors. The following precautions should be taken:

1. Place the ADM1028 as close to the remote sensing diode as possible. This distance can be 4 to 8 inches if the worst noise sources such as clock generators, data/address buses, and CRTs are avoided.

2. Arrange the D+ and D- rails together, parallel to the grounded guard rails on each side. If possible, provide a ground plane under the track.

3. Use a wide track to reduce inductance and noise. A minimum track width and spacing of 10 mil is recommended.

4. Minimize the number of copper/solder joints that may cause thermocouple effects. Where copper/solder joints are used, make sure they are in the D+ and D- paths and at the same temperature.

Thermocouple effects should not be a major issue, as 1°C corresponds to about 200µV and the thermocouple voltage is about 3µV/oC of temperature difference. Unless there are two thermocouples with a large temperature difference, the thermocouple voltage should be much less than 200µV.

5. Place the 0.1µF bypass and 2200 pF input filter capacitors near the ADM1028.

6. If the distance to the remote sensor is more than 8 inches, it is recommended to use twisted pair cables. This will work to about 6 to 12 feet.

7. For really long distances (up to 100 feet) use shielded twisted pair cable such as Belden 8451 microphone cable. Connect the twisted pair to D+ and D- and connect the shield to GND close to the ADM1028. Leave the far end of the shield unconnected to avoid ground loops.

Since the measurement technique uses switched current sources, excessive cable and/or filter capacitance can affect the measurement. When using long cables, filter capacitor C1 can be reduced or removed. In no case should the total shunt capacitance exceed 1000 pF.

Cable resistance can also introduce errors. A 1Ω series resistor introduces an error of about 0.5°C.

Analog output

The ADM1028 has a single analog output (fan speed) from an unsigned 8-bit DAC that produces 0 V–2.5 V. During power-on reset, the analog output registers default to 00, resulting in a minimum fan speed. The analog output can be amplified and buffered by external circuits such as op amps and transistors to provide fan speed control.

A suitable fan drive circuit is shown in Figures 5a to 5e. When using these circuits, the following points should be noted:

1. All of these circuits will provide an output range from zero to almost +VFAN.

2. In order to amplify the 2.5V range of the analog output to +VFAN, the gain of these circuits needs to be set as shown.

3. Care must be taken when selecting an op amp to ensure that its input common mode range and output voltage swing are appropriate.

4. The op amp may be powered only by the +V rail. If powered from +V, the input common-mode range should include ground to accommodate the minimum output voltage of the DAC, and the output voltage should swing below 0.6V to ensure the transistor can be fully turned off.

5. In all of these circuits, the output transistor must have an ICMAX greater than the maximum fan current and be able to dissipate power due to its voltage drop when the fan is not running at full speed.

6. If the fan motor produces a large reverse emf when the switch is open, a clamp diode may need to be added to protect the output transistor if the output goes from full scale to zero very quickly.

Figure 5c shows how the fan off signal (along with any control circuitry) can be used to turn the fan on and off independently of the value on the fan SPD/NTEST_IN pin.

Fault Tolerant Fan Control

The ADM1028 has a fault tolerant fan control function that is related to the operation of the THERMA, Thermab outputs. It can override the setting of the analog output and force it to its maximum value to provide full fan speed in the event of a critical overtemperature issue, even if for some reason this has not been handled by the system software.

There are two temperature setpoint registers that will activate fault tolerant fan control. One of the limits is programmed by the user, and one is a hardware (read-only) register that will operate if the user does not program any limits. Enables fault tolerant fan control if three or more consecutive readings exceed the limit. These limits are separate from the normal high and low temperature limits of the INT output and do not affect fault tolerant fan control or thermal output.

A hardware limit of 100°C is programmed into the register at address 18h for the default thermal limit for the remote diode. This is the default limit, if the remote sensor reading exceeds 100°C, the analog output will be forced to full scale. This makes the fault-tolerant fan control fail-safe as it will operate at this temperature even if no other limits are set by the user, or in the event of a software failure. Similarly, if the measured ambient temperature exceeds 70°C, the default internal temperature limit in Register 17h forces the analog output to full scale.

The user can override the default limits by programming new limits into register 14h of the remote sensor and register 13h of the internal sensor. The default value in register 14h is the same as the read-only register (100°C), but it can be programmed with a higher or lower value.

Once registers 13h and 14h are programmed, or if the default value is acceptable, bit 3 of the configuration register must be set to '1'. This bit is a write-once bit that can only be written to "1" and has two effects:

1. It makes the values in registers 13h and 14h active limits and disables read-only registers 17h and 18h.

2. It locks the data in registers 13h and 14h so that when AUXRST or RST is asserted or a power-on reset occurs, the data cannot be changed until the lock bits are reset.

Once the hardware override of the analog output is triggered, it will only resume normal operation after three consecutive measurements of 5 degrees below the set limit. When the fan speed output is forced to full scale, the fan speed output is negated.

Fan Speed Ramp

The ADM1028 device contains a fan speed ramping mechanism that is accomplished using an 8-bit counter and control register. On power-up or when RST or AUXRST is asserted, the fan speed registers, counters, and fan speed ramp registers are initialized to 0x00. By default, the fan speed ramp mechanism is disabled, and any value written to the fan speed register is immediately reflected on the fan speed output. Setting bit 0 of the fan speed ramp rate register enables the ramp mechanism. The counter is then preloaded with the current value contained in the fan speed register, which prevents the fan speed from changing until a new value is written to the fan speed register. When the new target fan speed value is written to the fan speed register, the counter starts counting up or down (depending on whether the current value is greater or less than the target value). The counter will then count at the rate specified by the Ramp Rate bits in the Fan Speed Ramp Register. Once the counter reaches the target value, the counter will stop counting. The fan speed value comes from the output of the counter. If a new value is written to the fan speed register while the ramp function occurs, the counter may change direction to reach the new target value. THERM operates independently of the fan speed ramp mechanism. Therefore, under overtemperature conditions, THERM will assert immediately.

ADM1028 Interrupt System

The ADM1028 has three interrupt outputs: INT, THERMA, and THERMB. They have different functions. INT responds to violations of software-programmed temperature limits, and its interrupt sources are maskable, as described in detail later. The interrupt and status bits are only set if at least three consecutive conversions exceed the limit.

The operation of the INT output is shown in Figure 7. Assuming the temperature starts within the programmed limits and the temperature interrupt source is not masked, INT will go low if the temperature measured by the external sensor exceeds the sensor's programmed high or low temperature limits. When the temperature is low, the integral also becomes low.

Once the interrupt is cleared, it will not interrupt again even if the temperature remains outside the previously exceeded limit. However, if the temperature for three consecutive conversions falls back within the set range, INT will be reset. Once the INT functions are reordered, the function will be reordered when three consecutive conversions exceed a certain limit.

interrupt mask

Any bit in the interrupt status register can be masked by setting the corresponding mask bit in the interrupt mask register. Interrupt sources will no longer generate interrupts. However, the bits in the status register will be set to normal.

interrupt clear

The Interrupt Status Register reflects the limit exceeded condition. Status bits can be cleared individually by writing a '1' to the appropriate status bit. Writing a '1' to bit 1 and bit 2 will cause a software interrupt to be generated. Bit 4 (GPI) of the Interrupt Status Register reflects the current state of the GPI pin and therefore cannot be cleared by writing to this bit.

Use the INT enable bit (bit 1 of the configuration register) to clear the INT output without affecting the contents of the Interrupt (INT) status register.

heat output

THERMA, THERMB signals are functionally identical.

These system overtemperature outputs will be asserted together when overtemperature is detected. THERMA (pin 11) is an open-drain digital output that has a pull-up resistor integrated into VCC3AUX. THERMB is an open-drain digital output used to drive external circuits operating at different supply voltage levels.

Hot run mode

Hot only responds to the "hardware" temperature limits at addresses 14h and 18h, not software programmed limits. Regarding fault tolerant fan speed control, the functions of these registers have been described previously.

Hot will go low if three consecutive measurements exceed the hardware temperature limit. It will remain at a lower temperature until the temperature drops 5 degrees below the limit of three consecutive measurements. When THERM is low, the analog output will go to FFh to boost the controlled fan to full speed and the fan shutdown will be canceled.

When exiting the fault tolerant fan control state, the analog FANYSPD output returns to its previously programmed value, which may have changed during the time the FANEYSPD output was forced to FFH.

interrupt structure

The interrupt structure of the ADM1028 is shown in Figure 9. As each measurement is taken and stored in the appropriate value register, the values and limits from the corresponding limit register are fed to the high and low limit comparators. The result of each comparison (1=out of limit, 0=within limit) is routed through the data demultiplexer to the corresponding bit input of the interrupt status register and used to set that bit high or low as desired.

The interrupt mask register has bits corresponding to each interrupt status register bit. Setting an interrupt mask bit high forces the corresponding status bit to output low, while setting an interrupt mask bit low allows the corresponding status bit to be asserted. When masked, the status bits all or together produce the INT output, and if any of the unmasked status bits go high, i.e. when any measurement exceeds the limit, the output will go low.

The INT output is enabled when bit 1 (INT_Enable) of the configuration register is high.

General Purpose Logic Input (GPI)

Pin 2 is used as a general purpose logic input with a 12V tolerance. The GPI input can be programmed to active high or active low by clearing or setting Bit 6 of the configuration register. The default is high activation. Bit 4 of the Interrupt Status Register follows the state of the GPI (or reverses the state) and when it is set to 1 will generate an interrupt, just like any other input to the Interrupt Status Register. However, the GPI bits are not latched in the status register and always reflect the current state (or inverted state) of the GPI input. If 1, it will not be cleared by reading the status register.

power-on reset

When the ADM1028 is powered up, when the supply voltage VCC3AUX rises above the power-on reset threshold, it initiates a power-on reset sequence and the registers are reset to their power-on values. Normal operation will begin when the supply voltage is above the reset threshold. Registers that do not display power-up values have indeterminate power-up conditions (including value registers and limit registers). In most applications, the first operation after power-up is usually to write the limit to the limit register.

Power-on reset clears or initializes the following registers (the initialization values are shown in Table 3):

• Configuration registers

• Interrupt Status Register

• Interrupt Mask Register

• Analog output registers

• Programmable trip point registers

The ADM1028 can also be reset by taking AUXRST low as an input. All registers will be reset to their default values and the ADC will remain inactive as long as AUXRST is below the reset threshold. Bringing the RST pin low will cause the following registers to be reset.

• Bit 3 of the Configuration Register (Programmable Thermal Limit Lockout Bit)

• DAC output, fan speed

Initialization (soft reset)

A soft reset performs a similar but not identical function to a power-on reset. It restores power-on defaults to configuration registers, interrupt status registers, and interrupt mask registers. The limit registers remain unchanged. It reconstructs the INT structure, not the THERM structure.

A soft reset is done by setting bit 4 of the configuration register high. This bit is automatically cleared after it is set.

Unlike clearing INT, where the temperature must fall back within the set range of three conversions before resetting the INT function, a soft reset allows INT to be pulled low immediately after a soft reset.

NAND tree test

A NAND tree for automatic test equipment (ATE) board-level connectivity testing is available in the ADM1028. By keeping pin FAN-SPD/NTEST-IN (pin 8) high and energized, the device enters NAND-tree test mode. This pin is sampled and its power-on state is latched. If the connection is high, the NAND tree test mode is invoked. Once the ADM1028 is powered down, the NAND tree test mode will exit.

In the NAND tree test mode, all digital inputs can be tested as shown in Table II. THERMA/NTEST_OUT will be the NAND tree output pins.

The structure of the NAND tree is shown in Figure 10. To perform a NAND tree test, all pins are initially driven low. The test vector sets all inputs low, then toggles them high (stays high) one by one. Run the test circuit using this "walk once" mode, starting with the input closest to the output of the tree and looping to the furthest point, making the output of the tree switch as each input changes. A typical propagation delay of 500 ns is allowed.

Configure interrupts

When powered on, the device's interrupt function is disabled. The configuration register (0x40) must be written to enable interrupt output. The INT_Enable bit (bit 1) of the register should be set to 1.

Dimensions

Dimensions are in inches and (mm).