feature

239 ; PC power output monitoring circuit

Very few external components

Overvoltage Protection for 3.3V, 5V and 12V Outputs

Undervoltage Protection for 3.3V, 5V and 12V Outputs

Overcurrent Protection for 3.3V, 5V and 12V Outputs

Dual overcurrent ports for 12V output ( FAN7687 )

Fail-Safe Output with Open-Drain Output

Good open-drain power output

I300ms power good delay

ï38ms PSON ON/OFF delay

Il $73

ï 2.3ms PSON to FPO off delay

Latch function controlled by PSON

typical application

ïPC switching power supply

illustrate

The FAN7685/FAN7686/FAN7687 is a complete output switching power supply for monitoring circuits on the secondary side. It provides over voltage protection (OVP), under voltage protection (UVP), over current protection (OCP) and a power good signal generator to monitor the output of switching power supply systems. Remote On/Off (PSON) control and some sophisticated protection functions are also implemented. It directly senses all output rails of OVP, UVP and OCP without external voltage divider resistors. As for output control, Power Good Output (PGO) and Fail Safe Output (FPO) are included. The FAN7685/FAN7686/FAN7687 provide a simple and cost-effective solution for external components, greatly reducing the PCB board space for power supply.

notes:

FAN7686 pin definition

FAN7687/FAN7687A Pin Definition

Typical Application Circuit

application information

Power Good (PGO) and Power Good Delay PC power supplies are generally designed to provide a power good signal to the motherboard, as defined by the computer manufacturer. If the +3.3V, +5V, and +12V outputs are above the undervoltage threshold limit, the PC power supply makes the power good signal high. At this point, the power supply should be able to provide enough power to ensure continuous operation within specification. Conversely, the PGO signal will be low when one of the +3.3V, +5V, or +12V outputs falls below the undervoltage threshold or rises above the overvoltage threshold, or the main power supply has been off long enough that power supply operation is no longer reliable state. AC Input, Power Good (PGO), Remote On/Off (PSON) and +3.3V/+5V/+12V rails as shown below

Although no specific timing parameters are met, the following signal timings are recommended: - T1 (power-on time): T1 < 500ms - T2 (rise time): 0.1 ms ≤ T2 ≤ 20 ms - T3 (PGO delay): 100 ms

When the PC motherboard holds this signal high or left open, the fault signal protection output (FPO) also goes high. Therefore, the main power rail cannot carry current and remains at 0V. When the FPO signal is held high due to a fault, the fault state is latched and the mains output rail cannot carry current and remains at 0V. Toggling the PSO input signal from low to high will reset the failsafe latch. Under this fault condition, only the backup power supply is not affected. The 38ms debounce block will be activated when the PSON input signal goes high-to-low or low-to-high to avoid glitches on the PSON input that might disable/enable the FPO output. When PSON is set low, the undervoltage function is disabled for 75ms to avoid power-on failure. When turned off, there is an additional 2.3ms delay from PSON to FPO. The rail should be powered only when the PSON signal is held at ground potential, so the FPO goes low after a 38ms denoised state. The FPO pin can be tied to +5V (or up to +15V) through a pull-up resistor.

Undervoltage protection

The FAN7685/FAN7686/FAN7687 provide undervoltage protection (UVP) for the +3.3V, +5V, and +12V rails. when? For under-voltage conditions over 73us on one of the VS33 (+3.3V), VS5 (+5V) or VS12 (+12V) input pins, the PGO goes low and the FPO output goes high. Additionally, this fault state will be latched until PSON switches from low to high or Vcc falls below the minimum operating voltage. When the power is turned on by AC input or PSON, the internal UVP delay time is 75ms. But under normal conditions, the UVP delay time is only 73us de-ounce time. In offline switching, the need for undervoltage protection is often overlooked in power system design. But it is very important in battery powered or handheld devices, because TTL or CMOS logic often fails under UVP conditions. Over Voltage Protection (OVP) The over voltage protection (OVP) of the FAN7685/FAN7686/FAN7687 monitors +3.3V, +5V and +12V. When an overvoltage condition occurs on one of the +3.3V, +5V or +12V input pins for more than 73us, the FPO output goes high and the PGO goes low. Additionally, this fault state will be latched until PSON switches from low to high or Vcc falls below the minimum operating voltage. Under overvoltage conditions, most power supplies have more power than is normally specified or required. In an unprotected device, the output voltage can be high enough to cause internal or external damage to the system.

To protect the system under these abnormal conditions, overvoltage protection is usually provided within the power supply. Since TTL and CMOS circuits are highly susceptible to overvoltage, it has become an industry standard to provide overvoltage protection on all +3.3V, +5V and +12V outputs. Therefore, it is not only necessary to protect the +3.3V and +5V rails of logic circuits on the motherboard, but also +12V peripherals such as hard disks, floppy disks, and CD-ROM players, etc., need to be protected. Overcurrent Protection In bridge or forward, off-line switching power supplies, usually in medium to high power designs, the overload protection design needs to be very precise. Most of these types of power supplies sense overloaded output current conditions. The trigger point needs to be set higher than the maximum load to prevent false turn-on. During safety testing, the power supply may have the output voltage directly connected to ground. If this happens while working, this is called a short circuit or overcurrent condition. When it happens before the power is turned on, it's called a short-circuit power-on. It can happen at the design stage, the production line, quality control checks or the end user. After PSON starts, FAN7685/FAN7686/FAN7687 provide UVP and OCP with a delay of 75ms to lower. The FAN7685/FAN7686/FAN7687 provide overcurrent protection (OCP) for 3.3V, 5V and 12V rails. When an overcurrent condition occurs on the OCP comparator input pin for more than 73us, the FPO output goes high and the PGO goes low. Also, this fault state will be latched until PSON is toggled from low to high or Vcc is removed. A resistor connected between RI pin and GND pin will introduce accurate IO(RI) for OCP function. Of course, the more precise the resistance tolerances, the better. The formula for selecting the RI resistance is VRI/IO(RI). The IO(RI) range is from 12.5uA to 62.5uA. The four OCP comparators and the IO(RI) section are provided by the VS12. The current drawn from VS12pin is less than 1mA. Here is an example of calculating a 12V rail catenary: