feature

Low-power high-speed offers single-channel 8-pin DIP ( FOD250L ), 8-pin SOIC (FOD050L) or dual-channel 8-pin SOIC (FOD053L) Superior CMR–CMH=50kV/µs (typ.) and CML=35kV/ Guaranteed Over Temperature Performance in Microseconds (Typical): 0°C to 70° CU.L. Approved (File #E90700) VDE Pending

application

line receiver

Pulse Transformer Replacement

High-speed logic ground isolation: LVTTL/LVCMOS

Wide Bandwidth Analog Coupling

illustrate

The FOD250L, FOD050L and FOD053L optocouplers consist of an AlGaAs light emitting diode optically coupled to a velocity photodetector transistor. These devices are special - suitable for operation on a 3.3V supply voltage. The independent connection of the photodiode bias increases speed by several orders of magnitude. Conventional phototransistor optocouplers are implemented by reducing the base-collector capacitance of the input transistor. Internal sound enclosures provide excellent versatility for CMH=50kV/ms (typ.) and mode suppression for CML=35kV/ms (typ.).

Absolute Maximum Ratings (TA = 25°C unless otherwise noted).

Stresses in excess of the Absolute Maximum Ratings may damage the device. Equipment may not work or be recommended for operation under recommended operating conditions and increase component stress to these levels.

Additionally, prolonged exposure to stresses higher than recommended operating conditions may affect device reliability. Absolute Maximum Ratings are for stress ratings only.

Electrical Characteristics (TA = 0 to 70°C unless otherwise specified.) Individual Component Characteristics

All typical values at TA=25℃

All typical values at TA=25°C

Note:

1. The current transfer ratio is defined as the output collector current IO multiplied by the forward LED input current IF multiplied by 100%.

Electrical Characteristics (continued) (TA=0 to 70°C unless otherwise specified.) Switching Characteristics (VCC=3.3V)

isolation characteristics

All typical values at TA=25°C

notes:

A 2.1.9kΩ load represents a TTL unit load of 1.6mA and a 5.6kΩ pull-up resistor.

A 3.4.1kΩ load represents a 1 LSTTL unit load of 0.36mA and a 6.1kΩ pull-up resistor.

4. Common mode transient immunity in logic high is leading maximum tolerable (positive) DVCM/dt. The edge of the common mode pulse signal VCM to ensure that the output will remain in a logic high state (ie VO>2.0V). Common mode transient immunity of logic low level is the maximum tolerable (negative value). dVcm/dt of the trailing edge of the common-mode pulse signal VCM to ensure that the output remains in a logic low state (ie, VO < 0.8V).

5. The device is considered a two-terminal device: pins 1, 2, 3, and 4 are shorted together, and pins 5, 6, 7, and 8 are shorted together.

Typical performance curve