Features

FET input: IB u003d 50 PA Maximum Value

Broadband: 8 MHz

High conversion rate : 20 v/μs

Low noise: 8nv/√Hz (1 kHz)

Low incomparable: 0.00008%)

# 8226; High -Open Ring gain: 130 DB (600Ω load)

Wide -wide power range: ± 2.5 to ± 18v

Low offset voltage: maximum 500 μV

single, double and four versions

Application

SAR ADC driver

reference voltage; Cushion

Cross -resistant Anti -Dracer

Optical Diode amplifier

8226; Integrated

Description

OPAX132 series FET input computing amplifier provides high -speed and excellent DC performance. The combination of high conversion rate and broad band width provides a fast stability time. Single, double and four versions have the same specifications to achieve the maximum design flexibility. High -performance levels can be in single and dual versions. They are all ideal options for universal, audio, data collection and communication applications, especially in encountering high -source impedance.

OPAX132 operational amplifier is easy to use, and there is no common phase reverse and overload problem in common FET input computing amplifiers. The input of the common source grid circuit provides excellent co -model suppression, and keeps a low input bias current within its wide input voltage range. OPAX132 series operational amplifier units have stable gain. Under extensive load conditions, including high load capacitors, providing excellent dynamic performance. The characteristics of the dual and four -way versions are completely independent circuits to reduce the interaction of string disturbance and freedom, even at speeding or overload.

The single and dual versions are installed and packaged with 8-needle DIP and SO-8 surface. Quad has 14 stitches DIP and SO-14 surface installation packaging. All regulations are suitable for operations of -40 ° C to 85 ° C.

Equipment information

(1), please refer to the appointment appendix at the end of the data table.

Typical features

TAu003d 25 ° C, vs u003d ± 15 v, RL u003d 2 kΩ, unless there are other instructions.

Detailed instruction The amplifier provides high -speed and excellent DC performance. The combination of high conversion rate and broad band width provides a fast stability time. Single, double and four versions have the same specifications to achieve the maximum design flexibility. High -performance levels can be in single and dual versions. They are all ideal options for universal, audio, data collection and communication applications, especially in encountering high -source impedance. Function box diagram

Feature description

OPAX132 series JFET operational amplifier combined with low noise, broadband width, high accuracy and accuracy and accuracy and Low input bias current makes it an ideal choice for high -source impedance applications. OPAX132 is stable in unit gain, with high conversion rates (± 20V/μs) and broad band width (8MHz).

Device function mode

OPAX132 has a single function mode. When the power supply voltage is greater than 5V (± 2.5V), OPAX132 can work. The maximum power supply voltage of OPAX132 is 36 V (± 18 V).

Application and implementation

Note: The information in the following application chapters is not part of the TI component specification, TI does not guarantee its accuracy or integrity. TI's customers are responsible for determining the applicability of the component. Customers should verify and test their design implementation to confirm the system function.

Application information

OPAX132 series computing amplifier units are stable and suitable for extensive general applications. Power insertion should bypasses 10 nails or larger ceramic capacitors.

OPAX132 series operational amplifier is not affected by the common unexpected output phase reversal with the FET computing amplifier. When the input co -mode voltage exceeds the input co -mode voltage range, the output phase of many FET input computing amplifiers reverses. This may occur in the voltage follow -up circuit, leading to serious problems in the application of control circuit applications. The OPAX132 series operational amplifier does not have this bad behavior. All circuits are completely independent in double and fourth versions. When ensuring normal behavior, a amplifier is an excessive drive or short circuit in a package.

Working voltage

The operating power range of the OPAX132 series of computing amplifiers is ± 2.5 V to ± 18 V, which has excellent performance. Although the specifications are used for production testing with a ± 15 V power, the entire working voltage range, largeMost performance remains unchanged. The typical feature part shows the parameters of significantly changes with the working voltage.

The bias voltage is fine -tuned

The bias voltage of the OPAX132 series amplifier is laser and fine -tuning, usually without user adjustment. OPAX132 amplifier (single -handed amplifier version) provides offset voltage connections on the pinna 1 and 8. As shown in Figure 18, the offset voltage can be adjusted by the connection potential meter. This adjustment is only used to zero the shift of the computing amplifier, rather than adjusting the offset of the system or the signal source. Zero offset will reduce the offset voltage drift characteristics of the operator. Although the exact change of drift cannot be predicted, the impact is usually small.

Input bias current

The FET input of the OPAX132 series provides a very low input bias current, the error caused in most applications can be ignored. Essence For applications with low input bias current, the knot temperature should be minimized. The input bias current of the FET input computing amplifier increases with the increase of temperature, as shown in Figure 5.

The OPAX132 series can run at a lower power supply voltage to minimize power consumption and temperature. Using ± 3V power supply can reduce the power consumption to one -fifth of the time of ± 15V.

The total power consumption of dual channels and four channels is higher than the single channel, resulting in higher knot temperature. Therefore, a preheated four -yuan group will have a higher input bias current than a preheating form. In addition, due to the large θJa, the knot temperature of SOIC at the same ambient temperature is usually higher than the DIP.

The layout of the printing circuit board also helps to minimize the temperature rise. By welding the device to the circuit board instead of using the socket, the temperature can be lifted to the minimum. The wide copper marks can also help heat dissipation as an additional heat sink.

The input -level co -source grid circuit ensures that the input bias current remains unchanged within the entire input co -mode range of the OPAX132 series. See Figure 6.

Typical application

OPAX132 series with excellent DC accuracy and communication performance. These equipment runs up to 36 volt power rails, and provides ultra -low input bias current and input bias current noise, as well as 8 trillion bandwidth and high -inclusive load driving. These characteristics make OPAX132 a strong, high -performance operational amplifier, which is suitable for high -voltage industrial applications with high power impedance.

Design requirements

For this application uses the following parameters:

gain u003d 5 v/v

Low-through deadline u003d 30 kHz

-40 DB/DEC filterResponse

Keep the peak of gain less than 3 dB in the gain and frequency response

Detailed design program

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Application curve

Power suggestion

OPAX132 stipulate Work; many specifications are suitable for -40 ° C to 85 ° C. In typical features, parameters that can show significant changes related to working voltage or temperature.

Pay attention to safety

The power supply voltage greater than 36 V permanently damaged the device; please refer to the absolute maximum rated value.

Put 10 NF bypass electric containers near the power pins to reduce the coupling error of noise or high impedance power supply. For more information on the side electric container places, please refer to the layout guide.

Layout

layout guide

In order to obtain the best operating performance of the equipment, please use good PCB layout practice, including:

The noise can spread through the power pins and computing amplifiers of the entire circuit to the analog circuit. The barrier container is used to reduce the coupling noise by providing a low -impedance power supply of an analog circuit.

-Cap the low ESR and 10 NF ceramic side electric containers between each power supply foot and ground, and as close to the device as much as possible. Single -width capacitors from V+to the ground are suitable for single power applications.

Circuit simulation and the individual grounding of the digital part are one of the simplest and most effective noise suppression methods. A layer or multi -layer on the multi -layer printing circuit board is usually used for ground layers. The floor helps to distribute heat and reduce the noise of electromagnetic interference. Ensure that the number of numbers and simulation of the ground is separated, and the flowing current flows. For more details, see the circuit board layout technology, Sloa089.

In order to reduce parasitic coupling, the input trajectory should be as far away from the power supply or output trajectory as much as possible. If these record channels cannot be separated, the sensitive record channel is compared with noiseThe record road is much better parallel.

The external components are as close to the device as possible.As shown in the layout example, keeping RF and RG approach the inverter input, which can minimize the parasitic capacitance.

The length of the input record should be as short as possible.Always remember that the input trajectory is the most sensitive part of the circuit.

Consider setting a driver's low impedance protection ring around the key line.The protective ring can significantly reduce the leakage current of different potentials nearby.

It is recommended to clean the PCB after assembly to obtain the best performance.

Any precision set circuit may change performance changes due to water entering plastic packaging.After any water -based PCB cleaning process, it is recommended to bake PCB components to remove the water packaging water during the cleaning process.In most cases, it is enough to bake for 30 minutes after low temperature at 85 ° C.

layout example