feature

Outperforms industry peers – Tight fault current range (± 100µA typical) – Temperature compensated fault current characteristics – No external trimming required, Direct interface with thyristor, supply voltage from AC line - 26V shunt, adjustable Sensitivity, Grounded Neutral Fault Detection, UL943 Compliant, 450µA Quiescent Current, Suitable for 120V or 220V Systems, Package Options: 8L DIP and 8L SOIC

illustrate

The FAN1851A is a controller interrupter for AC outlet ground faults. These devices detect hazardous grounding conditions (eg: relative phases of pools or electrical equipment connected to AC lines and industrial environments. The output of the IC triggers an external thyristor, which opens a relay circuit breaker to prevent harmful or fatal electric shock. US UL943 timing specification The full advantage of the tick is to ensure maximum immunity to false triggering to noise generation. A special feature in the circuit quickly resets the integrating timing capacitor in the event of a noise pulse introducing unwanted charging current. Additionally, the trigger is included to ensure that even if the Slow circuit breakers can also fire relays on either of the two half cycles of the line voltage when external full wave rectification is used. The application circuit can be configured to detect normal faults (hot wire to ground) and grounded neutral errors.

Function description

The voltage at the supply pin is shunt by an internal shunt regulator D3. This shunt regulator also produces an artificial ground voltage A1 input (shown as a +10V supply). A1, Q1 and Q2 together act as a current mirror for the fault current signal (from an external transformer). When a fault signal is present, the mirror current charges the external timing capacitor until its voltage exceeds the latch trigger threshold (typically 17.5V). When this threshold is exceeded, the latch engages and Q3 turns off, allowing I2 to drive the thyristor connected to the "TRIAC Trigger" pin. The extra circuitry in the feedback path of A1 and the switched current source I1 eliminates any charge on CT caused by noise in the transformer. If there is no fault current present, then the I1 discharge current is equal to 3Ith of the CT, where ITH is the current value set by the external RSET resistor. If a fault signal appears at the input of A1 at virtual ground, +10V), one of the two current mirrors in the feedback path of A1 (Q4 and Q5) will become active, depending on the half-cycle in which the fault occurred. This action will raise the VS voltage, switch I1 to a value equal to ITH, and reduce CT's discharge rate to the best possible charge for the fault current. Note that in the row, while the IF is only in it if you exit the "--input" pin (since Q1 only carries fault current in one direction). So in one half cycle if -ITH charges CT and in another half cycle it discharges it.

start of term

Normal fault: An unintentional circuit between the load terminals, RB as shown by the dotted line in the diagram. Normal fault grounded neutral fault: The unintentional electrical path between the load terminals of the neutral and ground, as shown by the dashed line

Normal fault plus grounded neutral point fault: the combined neutral point fault of normal fault and grounding, as shown by the dotted line in the figure.

DC Characteristics (TA=+25°C, ISHUNT=5mA)

Technical engineer: 1. This external applied current is a supplement to the internal "output drive current" source.

AC Electrical Characteristics (TA=+25°C, ISHUNT=5mA)

notes:

1. 10 times on average.

2. The required UL system sensitivity tolerance is 4mA to 6mA.

application information

A typical ground fault circuit breaker circuit is shown in the diagram. It is designed to operate at 120 VAC with 5mA normal fault sensitivity. A full-wave rectifier bridge and a 15kΩ/2W resistor are used to provide the DC power required by the integrated circuit. A 1µF capacitor at the "+VS" pin is used to filter the supply voltage ripple and is also connected to the thyristor to allow two half cycles of the thyristor. When the fault causes the thyristor to trigger, the circuit breaker is energized and the line voltage is removed from the load. At this point no fault current flows and the CT discharge current increases from ITH to 3ITH (see block diagram). This fast resets the timing capacitor and output latch. The circuit breaker can be reset and the line voltage can be restored to the load, assuming the fault has been removed. Normal faults are detected using a 1000:1 inductive transformer. The fault current, which is basically the current between the hot and neutral wire through 1000 and fed into the input pin of the op amp through a 10µF capacitor. A 0.0033µF capacitor adds up between the "-Input" and "+Input" pins and a 200pF capacitor between the "+Input" and "Ground" pins for better noise immunity. Normal fault sensitivity is determined by the timing capacitor discharge current ITH. Iss calculation method:

At the decision point, the average fault current is equal to the threshold current, ITH.

where IF(rms) is the rms input fault current of the op amp, and a factor of 2 is due to only charging the capacitor at a given time during half a cycle, when ITH discharges continuously. A factor of 0.91 converts rms values to mean values. Combining equations (1) and (2) we have:

For example, to get the 5mA (rms) sensitivity of the circuit in the figure, we have:

The correct value of RSET can also be obtained by plotting the characteristic curve of Equation (3). Note that this is an approximate calculation; the exact value of RSET depends on the specific sense transformer used and the FAN1851A tolerance. Because UL943 specifies a sensitivity "window" between 4mA and 6mA, a regulation for adjusting RSET should be made with a potentiometer. Independent of setting the sensitivity, the required integration time can be obtained by correct choice of the time capacitor, CT. Due to the many variables involved, the correct choice of CT is best based on experience. The following design examples should only be used as a guideline. Suppose the goal is to meet UL943 timing requirements. It is also assumed that the worst case occurs during GFI with a severe normal fault and the presence of a 2Ω grounded neutral fault. This situation is shown in .

UL943 specifies that the average travel time under these conditions does not exceed 25ms. Current Transformer Calculation Based on Charging Current

The normal failures are as follows:

1. Start with ≤25ms specification. Subtract the 3ms GFI turn-on time (15kΩ and 1µF). Subtracting the 8ms potential due to the inductive loss of the fault current is only half a cycle.

2. Subtract the 4 ms time circuit breaker required to open the sluggish circuit.

3. This gives a total maximum integration time of less than 10ms. This is permissible.

4. To generate an 8ms integration time value that includes part tolerances and other variables:

where:

T=integration time

V=threshold voltage

I = mean fault current into CT

In practice, the actual value of CT must be modified to include the effect of the neutral loop on the net charging current. The effects of neutral loop induced currents are difficult to quantify, but they usually add to normal fault currents, thus allowing for larger CT values. For UL943 requirements, 0.015µF has been found to be the best compromise between timing and noise. For those GFI standard detections that do not require a grounded neutral, a larger value capacity can be used for noise immunity. A larger capacitor can accommodate, since RN and RG are absent, allowing the full fault current I, into GFI. In the figure, grounded neutral detection allows some energy to be coupled into the sense transformer in the event of a neutral fault by continuously supplying 120 Hz energy to the neutral coil.