Working power supply voltage 8V to 28V, maximum 40V overvoltage

The voltage of the working power supply voltage 6V implemented

Static current in the standby state is less than 50 μA

ISO 9141 Compatible interface

Charging pump MOS that drives the power supply as reverse battery protection

PWM operating frequency is as high as 30 kg

A programmable cross -conduction

Protection time

Overwriting, under pressure, short circuit

circuit and heat protection

Real -time diagnosis

Instructions

The ISO 9141 bus The car power MOS bridge driver control circuit of the interface.

Absolute maximum rated value

Electrical characteristics (8V lt; vvs lt; 20V, ven u003d high, -40 °, -40 ° C ≤TJ≤150 ° C, unless there are other regulations. When the current flows into the pin, the voltage refers to GND and the current assumes positive.

[ 123]

2. Not tested in production: It is guaranteed by design, and through characteristic verification

3. Internal VVCC is 4.5V 5.5 volts

4. For calculation, see page 18

Figure 5. At VVS u003d 8V Vvs u003d 13.5 volts

Function description

General Principles

L9904 Integrated Circuit (IC) Design is used to control four external N channels MOS transistor, used for the H bridge configuration driven by the car DC motor. It includes an ISO9141 compatible interface. Typical application is shown in Figure 6.

Voltage supply

IC reverse through external batteries reverse through external batteries. Protect the diode supply to the VVS pin. The typical working voltage range is reduced to 8 volts. The power supply current of the integrated circuit consumes two parts: static and dynamic. Static current is usually 5.8 mA. Gallery charge qgate external power MOS transistor. The current can be estimated by the following expressions: identification u003d 2 · FPWM · qgate

The door charge is qgate u003d 160 nc, and the external power transistor of the PWM frequency is FPWM u003d 20kHz needsDynamic power current IDYN u003d 6.4mA. The total power supply current consumption is IVS u003d 5.8ma+6.4mA u003d 12.2MA.

Extended power supply voltage range (ST)

Other components shown in the use can extend the voltage range of the working battery to 6V Figure 7. A small induction of a L ~ 150 μH (iPeak ~ 500mA) connects the battery power supply in series to form a boost converter switch to open the leakage output ST. The switch frequency is typical 100kHz, and the fixed duty ratio is 50%. The boost converter starts with VVS LT; below 8V, increases the power supply voltage of the VS pin and close it at VVS GT; 10V to avoid EME under the nominal battery voltage. Diode D2 and ST pins series are necessary systems that are necessary for battery voltage. The booster converter cannot drive any additional load.

Function description (continued)

Control input (en, dir, pwm)

CMOS level input driver As shown in Figure 4 as shown in Figure 4 Show the device described in the true value table. Enter the input high signal activation device. For enable input floating (unconnected) or Ven u003d 0V device is in the standby mode. When activating the device, it is recommended to wake up at 50 μs to stabilize the internal supply. DIR and PWM input the driver that controls the external H bridge crystal tube. The direction of the motor can be selected with DIR input, and the PWM input is used to select the duty cycle and frequency. The input of the unconnection is defined through the internal pull -up resistor. During the wake -up and braking period and before the IC is disabled, the two inputs should be opened very high.

Symbol: x does not care about R: resistance output TS: heat shutdown

0: Low logic or not activated L: Output OV under absorption conditions: Over Voltage

1: High or effective logic H: Output UV under the source condition: Improving pressure

T: Three -state SC: Short circuit

6 Turn off the H bridge External MOS transistors in short -circuit state. All others keep power through DIR and PWM.

Heat Break

When the knot temperature exceeds TJSD, all the drives are switched to sinking state (L), K output is closed, and DG is diagnosed with low dg until the temperature drops to TJSD-TJHYST the following.

Overvoltage stop

When the power supply voltage VVS exceeds the overvoltage threshold VVSOVH, all the drives are switched to Sink Condition (L), K output is closed, and DG is diagnosed with low DG.

Function description (continued)

Impurd pressure stop

For the power supply voltage below the disabled threshold, the gateThe driver is kept in the wave state (L) and the diagnosis DG is low.

Short -circuit detection

The output voltage of the H bridge S1 and S2 pins is monitored by the comparator to detect short -circuit or battery on the ground. If the voltage is kept below, the activated outer high -voltage side MOS transistor tube will be closed by the threshold voltage of the closure of the comparator VS1TH and VS2TH longer than the short -term current detection time TSCD. This transistor is kept in the shutdown state, and the diagnostic output becomes lower until the DIR or PWM input state changes. The status of other MOS transistors remains unchanged. The time of the outer low -side MOS transistor will exceed the time of the comparator threshold voltage VS1TH and VS2TH more than the short -circuit current detection time TSCD. The transistor is kept in a closed state, and the diagnostic output is low until the DIR or PWM input state changes. The status of other MOS transistors remains unchanged.

Diagnostic output (DG)

If the following error stack is monitored, the diagnostic output provides real -time error detection: heat shutdown, over pressure shutdown, under pressure shutdown and short circuit shutdown. If an error occurs, the internal pull -up resistance is low.

Self -lifting capacitor (CB1, CB2)

In order to ensure that the external power MOS transistor can reach the required RDSON, that is, the lowest grid source voltage logic level is 5V, and the standard power MOS transistor is 10V. The high -end transistor requires that the gate voltage is higher than the power supply voltage. This is a combination of self -lifting capacitors through the internal charge pump circuit. When the high -voltage side MOS transistor is turned off, the low -end is turned on. When the low -voltage side is turned off, the charging self -lifting capacitor can power the gate driver of the high -side power MOS transistor. In order to effectively charge, the value capacitor of the guidance program should be greater than the grid source of the power MOS and meet the required PWM ratio.

The charge pump circuit (CP)

As shown in Figure 6, the external N -channel MOS transistor can be used to achieve reverse battery protection. In this case, its drain diode provides protection. The gate for output CP to drive the transistor is higher than the battery voltage, which opens the MOS and bypasses the drain diode with RDSON. This CP is connected to VS through an internal diode with a 20K #8486; resistor. The high level of the grille drive EN for external N dites power MOS transistors (GH1, GH2, GL1, GL2) is activated under the control of DIR and PWM input to activate the external MOS driver (see the truth table and the driver sequence map 4). The external power MOS door is connected to the device through the series resistance to reduce the system's electromagnetic launch (EME). The resistance affects the switch behavior. You must choose carefully. The charging and discharge time of the power supply is added to the MOS grid and can generate cross -current in the semi -bridge. The driver guarantees a longer switching delay time from the source to the remittance stage to prevent cross -transmission. The grid pole voltage limit is 14V. RDSO of the driver of the charging and discharge currentN restrictions. The drivers did not protect the protection of shorts.

Function description (continued)

A programmable cross -conducting protection

The external power MOS transistor configuration configured by the H bridge (two semi -bridge) is opened through the additional delay time TCCP, so that Prevent cross -transmission in the semi -bridge. Cross -conducting protection time is determined by the external capacitor CPR and resistance RPR at the external capacitance of the PR pin. CPR charging capacitance reaches voltage limit VPRH. Control the level changes in the input DIR and PWM will turn off the charging source of related external MOS transistors and PR pins. The resistor RPR discharge capacitor CPR. When the voltage at the PR reaches the value of the VPRL. After that, cardiopulmonary resuscitation will be charged again. CPR should be selected between 100pf and 1NF. The resistance RPR should be higher than 7kW. The delay time can be expressed as:

TCCP u003d RPR · CPR · Ln NPR, npr u003d vprh/vprl u003d 2

tccp u003d 0.69 · cpr · CPR

ISO interface [ISO interface [ISO interface [ISO interface [ISO interface [ISO 123]

The ISO interface provides communication between the microcontroller and the serial bus. It has a single -rooted wire that is compatible with VBAT and GND compatible with Potter rate, up to 60kbit/s. Logic electric flat transmission input TX driver to open K output. The K output can be connected to the serial bus of the VBAT through the pull -up resistor. The K pins are protected by overvoltage, short -circuited for GND and VS, and can be driven outside VVS and GND. When the lack of VVS or GND output shows high impedance characteristics. The internal pull -ups output RXUP resistor monitor the state of K pins to read the received data and control the transmitted data. In the short, if the internal openings cannot drive the voltage potential, the circuit condition of the K pins can be recognized when the K pins are lower than 0.45 · VVS threshold. Then RX is kept in a high state. The chronograph starts and switches the drum transistor. Turn off 20 μs. The next low -electric flattener of the TX input will reset the timer and the leakage transistor is opened again.