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2022-09-23 11:09:02
FMS6410B System with Integrated Filter and Composite Video Summer Camp
feature
7.1MHz fifth-order Y, C filter with composite summer 50dB stopband attenuation at 27MHz on Y, C and CV Output is better than 0.1dB to 4.5MHz flat on Y, C and CV output No external frequency selection components Or <5ns group delay on clock Y, C, and CV outputs AC-coupled input AC or DC-coupled output Ability to select PAL frequency components or clock 0.3% differential gain, 0.2° differential phase turn on Y, C, and CV channels Integrated low-slope DC recovery Circuit lead-free SOIC-8 package
application
Cable and satellite set-top boxes DVD players Personal video recorders (PVR) Video on demand (VOD)
illustrate
The FMS6410B is a dual Y/C fifth-order Butterworth low-pass video filter for minimal overshoot and flat group delay. The device also contains a summing circuit for generating filtered composite video. Typically, the Y and C input signals from the DACs are AC coupled into the filter. Both channels have DC recovery circuitry to clamp the DC input level during video sync. Y and C channels use separate feedback clamps. The clamp pulse is from the Y channel. All outputs can drive 2Vpp, AC or DC coupled, into single or dual video loads. The single video load consists of a series of 75Ω impedance matched resistors connected to terminated 75Ω lines. This represents a total load of 150 Ω for the part. The double load is two of them in parallel with a total resistance of 75Ω. The gain of the Y, C and CV signals is 6dB1Vpp input level. All video channels are synchronized to establish proper output voltage reference levels.
Absolute Maximum Ratings "Absolute Maximum Ratings" are values for which the safety of the device is not guaranteed. This device should not operate within these limitations. Parameter values defined in the Electrical Characteristics table are not guaranteed to be at absolute maximum ratings. The "Recommended Operating Conditions" table defines the conditions under which the equipment will actually operate.
DC characteristics
TA = 25°C, VCC = 5V, VIN = 1Vpp; all inputs are AC-coupled to 0.1µF; all outputs are AC-coupled to 220µF into 150Ω loads; referenced to 400kHz; unless otherwise noted.
Notes: 1.100% tested at 25°C.
AC Electrical Characteristics
TA=25°C, VCC=5V, VIN=1Vpp; all inputs are AC-coupled to 0.1µF; all outputs are AC-coupled to 220µF
150Ω load; referenced to 400kHz; unless otherwise noted.
Notes: 1.100% tested at 25°C.
Application Information Function Description
This product is a two-channel, monolithic, continuous-time video filter for reconstructing luminance and chrominance signal sources from S-video D/a. Generate a composite video output by summing the Y and C outputs. The chip is designed to AC-coupled input and to work with AC or DC-coupled output. The reconstruction filter provides a fifth-order Butterworth response with group delay equalization. This provides the most flat response in terms of latency. amplitude. Each of the three outputs is capable of driving 2Vpp into a 75Ω load. All channels are clamped during the sync interval to set the appropriate minimum output DC level. Through this operation, the effective input time constant is greatly reduced, which allows the use of small, low-cost coupling capacitors. The net effect is that the input settles to 10mV in 10ms for any DC shift present in the input video signal. In most applications, the input coupling capacitor is 0.1µF. The Y and C inputs typically sink 1µA during active video, and typically slope the horizontal line to 2mV at the Y output. During synchronization, the clamp recovers by generating an average leakage current of 20 μA over the clamping interval. Any change in the coupling capacitance value affects the amount of inclination of each line. Any decrease in tilt is accompanied by an increase in settling time.
Luma (Y) I/O A typical luma input is driven by a low impedance source of 1Vpp or a 75Ω terminated output to drive a line driven by the output of a current DAC. In either case, the inputs must be capacitively coupled to allow the synchronization detection and DC recovery circuits to function properly. All outputs can drive 2Vpp, AC or DC coupled, into single or dual video loads. The single video load consists of a series of 75Ω impedance matched resistors connected to terminated 75Ω lines, representing a total part load of 150Ω. The double load is that these are connected in parallel to the part. The gain of the Y, C and CV signals is 6dB1Vpp input level. Chroma (C) I/O The chroma input can be driven in the same way as the luma input, but is typically only a 0.7Vpp signal. Because the chrominance signal does not contain any DC content, the output signal can use capacitors as small as 0.1µF if DC coupling is not required.
Composite video (CV) output The composite video output driver is the same as another output. Layout Considerations General layout and power supply bypass performance and thermal characteristics at high frequency. Fairchild provides a demo board, the FMS6410BDEMO, to guide layout and auxiliary device testing and character building. The FMS6410BDEMO is a four-layer board with full power and ground planes. For best results, follow these steps as a basis for a high frequency layout: Include 10µF and 0.1µF ceramic bypass capacitors. Place 10µF capacitors at the power pins. Place 0.1µF capacitors on the power pins. If using a DC-coupled output, use a large ground plane to help dissipate heat. Minimize all trace lengths to reduce series inductance. Output Connector For the highest quality output signal, pin a series terminating resistor as close as possible to the output of the device. This greatly reduces the effect of parasitic capacitance and inductance on the output. Place the series termination resistor less than 0.1 inches from the device pins as shown.
Figure is a schematic diagram of a video filter/driver device used as a media output driver in the system. In this case, the composite video signal is terminated by the media device and the S-video output terminal is opened. It is critical to have terminating resistors close to the output pins of this series to reduce parasitic capacitance to the filter output driver CV output that may appear as noise.