Features

Micro power 1.5μW (1 sample/second)

2.8V to 16V width power range

High precision

] Maximum guarantee setting value error ± 0.5mv

Guarantee 0.1%of the maximum value of the dead area

Wide input voltage range V+to the ground

TTL output with 5V power supply TTL supply

Two independent ground reference control input

Small size 8 -needle so

Application

Temperature control (constant thermostat) [123 ]

Motor Speed u200bu200bControl

Battery Charger

Any switch control circuit

LTC #174; 1041 is a single CMOS BANG- Bang uses a linear technology -made controller enhanced LTCMOS #8482; silicon grid process. The characteristic of the bang cycle is that the rotating control element is completely opened or closed to adjust the parameters to be controlled. The setting value input determines the average control value and incremental input to set the dead zone. The dead zone is always 2 X Delta and the setting point is centered. Independent control setting values u200bu200band dead areas have no interactive effects, in order to input the LTC1041 through a unique sampling structure. The sampling rate is set to the external RC connected to the OSC pin. At the beginning of each sample, the internal energy simulation part is opened by 80 μs. During this period, the simulation input is sampled and compared. The power supply is closed. This achieved extremely low average power consumption at a low sampling rate. CMOS logical control output continues to work without consumption. In order to keep the system power at the absolute minimum value, a switch provides power output (VP-P). External loads, such as bridge networks and resistors, can be output by this switch. Output logic sensing (that is, on u003d v+) can reverse the input on the vehicle recognition number (VIN). This pair of LTC1041.

All resistors 1%. Huangquan Instrument Co., Ltd., part number 44007.

VP-P driver heat-sensitive resistance to eliminate 3.8 ° F error caused by self-heating

Absorb ratio (Note 1)

Total power supply voltage (V+ To v-) 18 volts

Input voltage (V ++ 0.3V) to (v-0.3V)

The operating temperature range

LTC1041C – 40 ° C to 85 ° C

LTC1041M (outdated) –55 ° C to 125 ° C

Storage temperatureRange -55 ° C to 150 ° C

Lead temperature (welding, 10 seconds) 300 degrees Celsius

The short -circuit duration of the output

Electric characteristics

The specification for the entire operation

The temperature range, otherwise the specification is TA u003d 25 ° C. Test conditions: V+u003d 5V, unless there are other regulations.

Note 1: The absolute maximum rated value means that the value device that exceeds life may be damaged.

Note 2: It is applicable to limits that exceed the range of input voltage and include gain uncertainty.

Electrical features

Note 3: Set point error ≡ ≡ ≡ ≡ [[[[[[[[, VU u003d upper limit, VL u003d lower limit.

Note 4: Dead zone error (vu -vl) –2 delta, where the VU u003d upper limit and VL u003d lower limit.

Note 5: Rin is guaranteed by design and does not test. Rin u003d 1/(FS X 66PF).

Note 6: Average power current u003d td is (open) fs+(1 – td fs) ls (level).

Note 7: The response time is set by an internal oscillator and an independent voltage. TD u003d VP-P pulse width.

Note 8: The output can also meet the specifications of the EIA/JEDEC standard B series CMOS drive.

Typical performance features

ATIO application

LTC1041 using sampling data technology to achieve it Unique features. It consists of two comparators, each with two differential inputs (Figure 1A). When the sum of the voltage of the comparator input is positive, the output is high, when the harmony is negative, the output is low. The input is connected to each other, so that the RS trigger (on/off u003d gnd) is VIN GT; (set point+increment) and set (open/level u003d v+) vin lt; quantity). This makes the stagnation line 2 delta, and the center is the set point. (See Figure 1b.)

For RS LT; 10K CMOS make dual -differential input structure switches and precision capacitors array. The impedance characteristics of the input LTC1041 can be determined according to the equivalent circuit shown in FIG. 2. The charging time constant of the input capacitance is

rupee cinEssence The ability to completely charge CIN from the signal is to determine the error caused by the input charging current within the activity time of the controller. When the source resistance is less than 10K the CIN full charging current does not cause errors.

For RS GT; 10K

For the source resistance greater than 10K , CIN cannot be fully charged, causing voltage errors. In order to minimize these errors, you should use the input barrier container CS. The cost is shared between CIN and CS, resulting in a small voltage error. The size of this error is av u003d vin cin (cin+cs). This can make the error be smaller by increasing the CS. Another error term for the average effect of bypass container CS. Each input switch cycle is between positive and negative inputs, CIN is charged and coming out. The average input current generated is avg u003d vin cin FS, where FS is sample frequency. Because the input current and the difference input voltage, the LTC1041 can be said to have an average input resistance Rin u003d vin/IAVG u003d I/(fs cin). Because the two comparators input are connected in parallel, RIN is half of the value (see RIN and sampling frequency). This limited input resistance causes errors caused by the sider between RS and Rin. The input voltage error caused by these two effects is VERROR u003d Vehicle recognition number [2Cin/(2CIN+CS)+RS/(RS+Rin)]. Example: Assuming FS u003d 10Hz, RS u003d 1M, CS u003d 1 μF, VIN u003d 1V, Verror u003d 1V (66 μV+660 μV) u003d 726 μV. Please note that most of this error is caused by Rin. If the sampling frequency is reduced to 1Hz, the voltage error impedance effect of the input end is reduced to 136 μV.

The input voltage range

The input switch of the LTC1041 can be switched to V+power supply or ground. Therefore, the input voltage range includes two power rails. This is another benefit of the sampling input structure. The only measuring error on the error specification on the LTC1041 is the ""ideal"" of the ""ideal"" of the upper and lower switches (Figure 1B). From the perspective of control, the setting value is essential. These errors may be defined as VU and VL.

The error limit (see electrical characteristics) specified in the specified (see electrical characteristics) includes errors, time and temperature caused by offset, power changes, and gain. Pulse power (VP-P) output usually needs to use the LTC1041 network with resistance, such as bridges and pressure signs. The energy consumed by these resistance networks is far more than this digital LTC1041 itself. At the low sampling rate, the LTC1041 spent most of the time closed. Provide switching power output VP-P to drive the input network to reduce its average power.Vice President switched to V+during the controller activation time (≈80 μs) and the power supply of high impedance (opening) internal high impedance (opening). Figure 3 shows the VP-P output circuit. When the VP-P Output is driven, the voltage cannot be accurately controlled (see the typical curve of the VP-P output voltage and the load current). Nevertheless, high precision can be implemented in two ways: (1) Drive ratio network and (2) driver quickly set for reference. In the proportional network, all inputs and VP-P (Figure 4). Therefore, the absolute value of VP-P does not affect accuracy.

If the best performance LTC1041 must be fully stable within 4 μs after startup (VP-P high impedance to V+transition). In addition, the input voltage cannot change within 80 μs activation time. When the driver resistance is driven, the network uses VP-P, and the capacitor load is minimized to meet the requirements of 4 μs. In addition, the source impedance network shown in the LTC1041 should be paid to the time of driving. It is greater than 10K

In applications required for absolute reference, VP-P output can be used to drive fast settlement reference. The LTC1009 2.5V reference voltage is stable in ≈2μs. This is an ideal application (Figure 5). The current -through hole R1 must be large enough to supply the LT1009 minimum bias current (≈1MA) and load current IL.

Internal oscillator

The internal oscillator allows LTC1041 to choose through. The frequency of oscillation, so the sampling rate is set by an external RC network (see typical curves, sampling rate REXT, CEXT). Rext and CEXT have been connected as shown in Figure 1. To ensure oscillation, REXT must be between 100K and 10m The size is not limited to Cexter. At a low sampling rate, REXT is determining power consumption. Rex consumes continuous power supply. The average voltage of the OSC pin is about V+/2, and the power loss is prext u003d (V+/2) 2/Rexter. Example: Suppose Rext u003d 1M , V+u003d 5V, Prext u003d (2.5) 2/106 u003d 6.25/μW. This is about LTC1041 in V+u003d 5V and FS u003d 1 sample/second. When electricity is a premium, Rex should be as large as possible. Note that the power consumed by REXT is not a FS or CEXT function. If the high sampling rate and power consumption need to be the second important thing, the maximum possible sampling rate is to make Rext u003d 100K

CEXT u003d 0. The sampling rate is nominally ≈10kHz. Synchronize the sampling of the LTC1041 to the external frequency source, the OSC pin can be from the CMOS door. The CMOS door is necessary, because the trigger point of the input oscillator is close to the power rail and TTL does not have enough output width.For external drivers, the rising edge of OSC input will have a delay starting sampling cycle of about 5 μs.