feature

Signal recovery from +100 dB noise; 2 MHz channel bandwidth 45 V/s slew rate; –120 dB crosstalk @ 1 kHz; pin programmable closed-loop gains 1 and 2; 0.05% closed-loop gain accuracy and matching; 100 V channel Offset voltage ( AD630BD ); provides 350 kHz full power bandwidth chip.

Product Description

The AD630 is a high precision balanced modulator that combines a flexible commutation structure with the precision and temperature stability provided by laser wafer trimmed thin film resistors. Its signal processing applications include equalization modulation and demodulation, synchronization detection, phase detection, quadrature detection, phase sensitive detection, lock-in amplification, and square wave multiplication. The resistor network for automotive applications provides closed-loop gains of ±1 and ±2 with 0.05% accuracy (AD630B). These resistors can also be used to precisely configure the multiplexer gain of +1, +2, +3, or +4. Alternatively, external feedback can be used, enabling designers to implement their own high-gain or complex switching feedback topologies.

The AD630 can be thought of as a precision op amp with two independent differential input stages and a precision comparator for selecting an active front end. The fast response time of this comparator combined with the high slew rate and fast adjustment of the linear amplifier minimizes switching distortion. In addition, the AD630 has very low channel-to-channel crosstalk –100 dB at 10 kHz.

The AD630 is used in precision signal processing and instrumentation applications that require a wide dynamic range. When used as a synchronous demodulator in a lock-in amplifier configuration, it can recover small signals from 100 dB of interfering noise (see Lock-in Amplifier Applications). Although optimized to operate at frequencies up to 1 kHz, the circuit is useful for frequencies up to several hundred kHz.

Additional features of the AD630 include pin-programmable frequency compensation, selectable input bias current compensation resistors, common-mode and differential bias voltage adjustments, and a channel status output that indicates which of the two

Differential input active. This unit is now available on Standard Military Drawings (DESC) Nos. 5962-8980701RA and 5962-89807012A.

Product Highlights

1. The structure of the AD630 makes it ideal for signal processing applications such as balanced modulation and demodulation, lock-in amplification, phase detection, and square wave multiplication.

2. The application flexibility of AD630 makes it the best choice for many applications requiring precise fixed gain, switching gain, multiplexing, integrated switching function and high-speed precision amplification.

3. The AD630's 100dB dynamic range exceeds any hybrid or IC-balanced modulator/demodulator and is comparable to expensive signal processing instruments.

4. The operational amplifier format of AD630 ensures easy implementation of high gain or complex switching feedback functions. Application resistors help achieve the most common applications without the need for additional parts.

5. The AD630 can be used as a two-channel multiplexer with gains of +1, +2, +3, or +4. At 10 kHz, a channel spacing of 100 dB is close to the limit achievable with an empty IC package.

6. The AD630 has pin-bundled frequency compensation (no external capacitors required) for stable operation at unity gain without sacrificing dynamic performance at higher gains.

7. In most cases, the laser trimming of the comparator and the amplified channel offset limit the need for an external null.

Chip availability

The AD630 is available in laser trimmed, passivated chip form. This figure shows the AD630 metallization pattern, pads, and dimensions. AD630 chip is provided, please consult the factory for details.

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Typical performance characteristics

Settlement characteristic step response

Two Ways to Look at the AD630

The functional block diagram of the AD630 (see page 1) also shows the pin connections for the internal functions. Another architecture diagram is shown in Figure 10. In this figure, the individual A and B channel preamps, switches, and integrator output amplifiers are combined in a single op amp. This amplifier has two differential input channels, only one of which is active at a time.

How AD630 Works

The basic mode of operation of the AD630 can be more easily identified as two fixed gain stages that can be inserted into the signal path under the control of a sensitive voltage comparator. It provides basic modulation/demodulation functions as the circuit switches between inverting and non-inverting gain. The AD630 is unique in that it includes laser wafer trimmed thin-film feedback resistors on a single chip. The configuration shown in Figure 11 produces a gain of ±2 and can easily be changed to ±1 by moving RB from its ground connection to the output.

The comparator selects one of the two input stages to complete the operational feedback connection around the AD630. The deselected input is off and has a negligible effect on the operation.

When channel B is selected, resistors RA and RF are connected for inverse feedback as shown in the inverse gain configuration diagram in Figure 12. The amplifier has sufficient loop gain to reduce the loading effect of the virtual ground RB created by the feedback connection. When the sign of the comparator input is inverted, input B will be deselected and A will be selected. The new equivalent circuit will be the non-vertical gain configuration shown below. In this case, RA will appear at the op amp input terminals, but since the amplifier drives this differential voltage to zero, the closed loop gain is not affected.

When RF/RA=1+RF/RB, the amplitudes of the two closed-loop gains are equal, because RA is equal to RFRB/(RF+RB) the parallel equivalent resistance of RF and RB.

The 5k and two 10k resistors on the AD630 chip can be used to generate the two gains as shown. By paralleling 10k resistors to make RF equal to 5k and omitting RB, the circuit can be programmed to gain ±1 (as shown in Figure 18a). These and other configurations using on-chip resistors present an inverting input with a 2.5k source impedance. A more complete diagram of the AD630 shows that 2.5k resistors can be used for non-vertical inputs, which can be conveniently used to reduce errors caused by input bias currents.

Circuit Description

A simplified schematic of the AD630 is shown in Figure 14. It is divided into three main parts: a comparator, two input stages and an output integrator. The comparator consists of the front end formed by Q52 and Q53, the trigger load formed by Q3 and Q4, and two current control switching units Q28, Q29, Q30 and Q31. This structure is designed so that when the differential input voltage applied to the comparator input is greater than 1.5mv, a switch cell will be completely selected. The sign of this input voltage determines which switch cell is selected.

The collector of each switching cell is connected to the input transconductance stage. The selected cell delivers bias currents i22 and i23 to the input stage it controls, making it active. Deselected cells prevent offsets from their input stage, so the stage remains closed.

The structure of the transconductance stages is such that they present high impedance at the input and do not generate bias current when deselected. Deselected inputs do not interfere with the operation of the selected inputs to ensure maximum channel separation.

Another feature of the input structure is to increase the slew rate of the circuit. The current output of the active stage has a quasi-hyperbolic sinusoidal relationship with the differential input voltage. This means that the larger the input voltage, the harder this stage is to drive the output integrator, and therefore, the faster the output signal moves. This feature helps ensure fast, symmetrical problem resolution when switching between inverting and non-inverting closed-loop configurations.

The output section of the AD630 consists of a current mirror load (Q24 and Q25), an integrator voltage gain stage (Q32), and complementary output buffers (Q44 and Q74). The outputs of the two transconductance stages are connected in parallel with the current mirrors. Since the deselected input stage produces no output current and presents high impedance at its output, there is no conflict. The current mirror converts the differential output current from the active input transconductance amplifier to the single-ended form of the output integrator. The complementary output drivers then buffer the integrator output to produce a low impedance output.

Other gain configurations

Many applications require division by ±1 and ±2 provided by self-contained application resistors. The AD630 can be easily programmed with three external resistors over a wide range of positive and negative gains by selecting RB and RF to obtain a non-inverting gain of 1+RF/RB, followed by RA to provide the desired inverting gain. Note that when the inversion amplitude is equal to the non-inversion amplitude, the value of RA is RB RF/(RB+RF). That is, RA should be equal to the parallel combination of RB and RF to match positive and negative gains.

The feedback synthesis of the AD630 can also include reactive impedance. If the A impedance is equal to the parallel combination of the B and F impedances, the gain magnitude will match all frequencies. Basically, the same considerations apply to the AD630 as for traditional op amp feedback circuits. In fact, any function that can be implemented with simple non-switching "L network" feedback can be used with the AD630. Figure 15 shows a common configuration. The low frequency gain of this circuit is 10. The response has a pole (–3 dB) at frequency f 1/(2π100 kΩC) and a zero (3 dB from the high frequency asymptote) at 10 times that frequency. The 2k resistors in series with each capacitor mitigate the loading effects of the circuit driving this circuit, eliminating stability issues and having a slight effect on pole-zero locations.

As a result of reactive power feedback, the high frequency components of the binary input signal will be transmitted with unity gain.

The AD630 has external feedback, while low frequency components will be amplified. This configuration is useful in demodulators and lock-in amplifiers. It increases the circuit dynamic range when the modulation or interference is substantially larger than the desired signal amplitude. The output signal will contain the desired signal multiplied by the switching signal and the jammer's low frequency gain (for large feedback ratios, the low frequency gain can be several hundred -

Switch input impedance

The non-converting mode of operation is a high input impedance configuration, while the inverting mode is a low input impedance configuration. This means that when the gain is switched under the control of the comparator, the input impedance of the circuit changes abruptly. If the gain is switched while the input signal is not zero (as is the case in many practical cases), the transient will be transmitted to the circuit driving the AD630. In most applications, this will require the AD630 circuit to be driven by a low impedance source that remains "stiff" at high frequencies. Usually this is a wideband buffer amplifier.

frequency compensation

The AD630 combines the convenience of internal frequency compensation with the flexibility of external compensation through an optional self-contained compensation capacitor.

In an application with a gain of ±2, the noise gain that must be dealt with is actually 4 for stability. In this case, the phase margin of the loop will be around 60°, and there is no need to choose compensation. This condition provides the maximum bandwidth and slew rate for closed-loop gains above 2 μm.

When the AD630 is used as a multiplexer, or in other configurations where one or both inputs are connected for unity-gain feedback, the phase margin will be reduced to less than 20°. This is acceptable in applications where fast slewing is the priority, but the transient response is not optimal. For these applications, a self-contained compensation capacitor can be added by connecting pin 12 to pin 13. This connection reduces the closed-loop bandwidth to a certain extent and improves the phase margin.

For intermediate conditions, such as a gain of ±1 with loop attenuation of 2, the use of compensation should depend on whether bandwidth or stable response must be optimized. Optional compensation should also be used when the AD630 is driving capacitive loads or when conservative frequency compensation is required.

offset voltage zero

Both the input stage and comparator bias voltages are pre-tested, so external trimming is only required in the most demanding applications. The offset adjustment of the two input channels is done through differential and common mode schemes. This facilitates fine-tuning of system errors in switching gain applications. When the system input is connected to 0V and a switch or carrier waveform is applied to the comparator, a low-level square wave will appear at the output. A differential offset adjustment pot can be used to zero the amplitude of this square wave (pins 3 and 4). A common-mode offset adjustment can be used to zero out the remaining DC output voltage (pins 5 and 6). These functions should be implemented using a 10k trim pot with the wiper connected directly to pin 8 as shown in Figures 18a and 18b.

Channel status output

CHANNEL STATUS OUTPUT Pin 7 is an open collector output referenced to –VS and can be used to indicate which of the two input channels is active. When channel A is selected, the output will activate (pull low). This output can also be used to provide positive feedback around the comparator. This creates hysteresis, which improves noise immunity. Figure 16 shows an example of how hysteresis is implemented. Note that the feedback signal is applied to the inverting (–) terminal of the comparator for positive feedback. This is because the open collector channel status output reverses the meaning of the internal comparator output.

The channel status output can be interfaced with the TTL input, as shown in Figure 17. This circuit provides appropriate level shifting from the open collector AD630 channel status output to the TTL input.

Application: Balanced Modulator

Perhaps the most common configuration for the AD630 is a balanced modulator. Application resistors provide precise symmetrical gains of ±1 and ±2. Figure 18a shows a ±1 arrangement and Figure 18b shows a ±2 arrangement. These conditions differ only in the connection of the 10k feedback resistor (pin 14) and the compensation capacitor (pin 12). Note the use of 2.5 kΩ bias current compensation resistors in these examples. These resistors perform the same function in a gain of ±1. Figure 19 shows the performance of the AD630 when modulating a 100 kHz square wave carrier with a 10 kHz sine wave. The result is a double sideband suppressed carrier waveform.

These balanced modulator topologies accept two inputs, a signal (or modulation) input applied to the amplified channel and a reference (or carrier) input applied to the comparator.

Balanced demodulator

The balanced modulator topology described above will also act as a balanced demodulator if a double sideband suppressed carrier waveform is applied to the signal input and the carrier signal is applied to the reference input. The output in these cases will be a baseband modulated signal. Higher-order carrier components will also appear, which can be removed by a low-pass filter. Other names for this feature are synchronous demodulation and phase sensitive detection.

Precision Phase Comparator

The balanced modulator topology of Figures 18a and 18b can also be used as a precision phase comparator. In this case, an AC waveform of a specific frequency is applied to the signal input, and a waveform of the same frequency is applied to the reference input. The output DC level (obtained by low pass filtering) will be proportional to the signal amplitude and phase difference between the input signals. If the signal amplitude remains constant, the output can be used as a direct indication of phase. When these input signals are 90° out of phase, they are said to be in quadrature and the AD630 dc output will be zero.

Precision Rectifiers - Absolute

If the input signal is used as its own reference in a balanced modulator topology, the AD630 acts as a precision rectifier. High frequency performance will be better than diode feedback and op amps. There is no diode drop, the op amp has to "straddle" with the rectifying amp.

LVDT Signal Conditioners

Many sensors work by modulating an AC carrier. Linear Variable Differential Transformer (LVDT) is this type of sensor. The amplitude of the output signal corresponds to the core displacement. Figure 20 shows an accurate synchronous demodulation system that can be used to generate a DC voltage corresponding to the location of the LVDT core. The inherent accuracy and temperature stability of the AD630 reduce demodulator drift to a second-order effect.

AC bridge

Bridge circuits using DC excitation are often plagued by errors caused by thermocouple effects, 1/f noise, DC drift in the electronics, and line noise pickup. One way to solve these problems is to excite the bridge with an AC waveform, amplify the output of the bridge with an AC amplifier, and synchronously demodulate the resulting signal. At the output of the synchronous demodulator, the AC phase and amplitude information from the bridge is restored to a DC signal. Low-frequency system noise, DC drift, and demodulator noise all mix into the carrier frequency and can be removed by a low-pass filter. When choosing a filter, the dynamic response of the bridge must be weighed against the amount of attenuation required to adequately suppress these remaining carrier components.

Figure 21 is an example of an AC bridge system using the AD630 as a synchronous demodulator. The oscilloscope photo shows the result of a 0.05% bridge unbalance caused by a 1 megohm resistor in parallel with one leg of the bridge. The top trace represents the bridge excitation, the upper middle trace represents the amplified bridge output, the lower middle trace represents the synchronous demodulator output, and the bottom trace represents the filtered DC system output.

The system can easily account for 0.5ppm bridge impedance changes. This change will result in a 3.2mv change in the low pass filtered DC output, well above the RTO drift and noise.

Lock-in Amplifier Applications

Lock-in amplification is a technique for separating narrow-band small signals from interfering noise. A lock-in amplifier acts as a combination of detector and narrowband filter. When the frequency and phase of the desired signal are known, very small signals can be detected in the presence of a large amount of uncorrelated noise.

A lock-in amplifier is basically a synchronous demodulator followed by a low pass filter. An important indicator of lock-in amplifier performance is the dynamic range of the demodulator. Schematic of the demo circuit showing the dynamic range of the AD630

The lock-in amplifier is shown in Figure 23. Figure 24 is an oscilloscope photograph showing approximately 100,000 times the recovery of a 400 Hz modulated signal from a noisy signal; the dynamic range is 100 dB.

The test signal was generated by modulating a 400hz carrier with a 0.1hz sine wave. For example, signals produced by chopped radiation (infrared, optical, etc.) detectors may have similar low frequency components. Sinusoidal modulation is used in Figure 18b, as shown in the upper trace of Figure 24. It is attenuated by a factor of 100,000 and normalized to the output B of the summing amplifier. A noise signal, which may represent eg background noise and detector noise in the case of chopped radiation, is added to the modulated signal by a summing amplifier. This signal is simply band-limited white noise. Figure 24 shows the sum of the decaying signal and the noise in the center trace. The combined signal is synchronously demodulated using phase information from the modulator, and the result is low-pass filtered using a two-pole simple filter that also provides a gain of 100 to the output. This recovered signal is the lower trace of Figure 24.

The combined modulated signal and interfering noise used for this figure are similar to signals that typically require a lock-in amplifier for detection. The precise input performance of the AD630 provides a signal range in excess of 100 dB, and its dynamic response allows it to be used at carrier frequencies more than two orders of magnitude higher than in this example. A more complex low-pass output filter will help suppress wider bandwidth interference.