Fan 5090 Two-Phas...

  • 2022-09-23 11:14:06

Fan 5090 Two-Phase Interleaved Synchronous Buck Converter For VRM 9.x Applications

feature

Programmable output from 1.10V to 1.85V in 25mV steps Using integrated 5-bit DAC Maximum two interleaved synchronous phase performance 100nsec transient response time Built-in current sharing between phases Remote sensing Programmable active droop  ( Voltage positioning) Programmable switching frequency from 100KHz to 300KHz per phase Adaptive delay gate switch Integrated high current gate driver Integrated power good, OV, UV, enable/soft start

Function

Drives N-Channel MOSFETs for 12V Operation Optimized Operation Over Current Protection Using MOSFET Sensing 24-Pin TSSOP Package

application

Power supply for Pentium IV Athlon power supply  VRM programmable step-down power supply for Pentium IV processor

illustrate

The FAN5090 is a synchronous two-phase DC-DC controller that provides high precision, programmable output voltage for the integrated circuit VRM 9.x processor. Two interleaved synchronous buck regulator phases with built-in current sharing operate 180° out of phase to provide fast transient response required for high current applications minimizing external components. The FAN5090 features a programmable active droop function with minimal output capacitance transient response. It has integrated high-current gate drivers with adaptive delay gate switching and requires no external drive equipment. The FAN5090 uses a 5-bit D/A converter to pair output voltages from 1.10V to 1.85V in 25 mV steps with 1% accuracy. FAN5090 adopts a high level of integration, which can output a load current of over 50A from 12V with a power supply with minimal external circuits. The FAN5090 also offers integrated features including power good, output enable/soft-start, undervoltage lockout, overvoltage protection, and adjustable current limit with independent current sensing for each phase. It is available in a 24-pin TSSOP package.

Application Information: Operation FAN5090 Controller The FAN5090 is a programmable synchronous two-phase DC-DC controller IC. When designed with external components, the FAN5090 can be configured to output current greater than 50A, suitable for VRM 9.x applications. Fan 5090 acts as a fixed frequency pulse width modulated buck regulator. The main control loop of the FAN5090 consists of two interleaved synchronous buck converters, implemented by summing mode control. Each phase has its own current feedback, and voltage feedback. The two buck converters controlled by the FAN5090 are interleaved, that is, they run 180° out of phase. This will minimize the RMS input ripple current and minimize the number of input capacitors required. It also doubles the effective switching frequency, improving transient response. FAN5090 implements "summation mode control", which is different from traditional voltage mode and current mode control. It outperforms allowing over a wide range of output loads and external components. No external compensation is required. The control loop of the regulator consists of two main parts: the analog control block and the digital control block. This analog part consists of a signal conditioning amplifier to form an input comparator, which is a digital control block.

The signal conditioning section accepts the input of the current sensor and the voltage sensor. The voltage sensor is separated for each sensor that is common to both phases and current. The voltage sensor amplifies the difference between the VFB signal and the reference voltage from the DAC and presents the output separately to the comparator. The current control path of each stage When the low-side MOSFET is turned on, the signal to the voltage amplifier has a certain gain through the MOSFET and the resulting input current signal to the same input of its summing amplifier. These, therefore, add up the two signals. This sum is then presented to a comparator that observes the oscillator ramp, which provides the digital control with a master PWM control signal block. The oscillator is ramped with each other, so that the two phases are turned on alternately.

The digital control block accepts the analog comparator input to the HDRV and LDRV output pins to provide the appropriate pulses per phase. These outputs control external power mosfets. Response Time Fan 5090 uses leading edge, not trailing edge control. Conventional trailing edge control turns on the high-side MOSFET at the clock signal, then turns it off when the error amplifier output voltage equals the ramp voltage. Therefore, the response time of the inverter on the trailing edge can be as long as the disconnection time of the high voltage side, which is almost the entire switching cycle. The FAN5090 turns off at the clock signal when the error amplifier output voltage is equal to the ramp voltage. Therefore, when a transient occurs, the FAN5090 responds immediately by turning on the high-side MOSFET. Response time is delayed by internal propagation, typically 100nsec. Worst case case, response time by low side MOSFET, 330nsec. The operating frequency of the oscillator part of the oscillator FAN5090 is determined by the resistance between the RT pin and ground, according to the formula The oscillator generates two internal sawtooth ramps, each at half the oscillator frequency, that run 180 degrees to match each other. These ramps cause the two phases to be staged. Oscillator frequency The Fan 5090 has a programmable range of 200kHz to 600kHz, and each phase operates at a frequency of 100kHz to 300kHz, respectively. Frequency selection depends on various system performance criteria, with higher frequencies resulting in smaller components but less efficiency. The quiescent current (Icc) of the fan 5090 is also frequency dependent:

Remote Voltage Sensing The FAN5090 has true remote voltage sensing capability, eliminating errors due to tracking resistors. With remote sensing, the VFB and AGND pins should be connected as Kelvin tracking pairs to adjustment points such as processor pins. The converter keeps the voltage at that point. The layout of these fields requires care; see layout guidelines in this data sheet. High Current Output Drivers The FAN5090 contains four high current output drivers using mosfets in a push-pull configuration. For high-end mosfets, use the boot pin for input power and the switch pin for return. The low side driver mosfet uses the VCC pin for input power and the PGND return pin. Typically, the lead pins will use a charge pump as shown. Note that the Boot and VCC pins are separated from the chip's internal power and ground, bypass and AGND for switching noise immunity.

The adaptive delay gate driver FAN5090 features an advanced design that ensures minimal MOSFET transition time when eliminating the water flow. It senses the state of the mosfet and adaptively adjusts the door drivers to ensure they never open at the same time. When the high-side MOSFET turns off, the voltage on the power supply begins to drop. When the voltage reaches about 2.2V, the low-side MOSFET. Application gate drive. The voltage at the LDRV pin is detected when the low-side MOSFET is turned off. When it falls below about 1.2V, the gate driver of the high-side MOSFET is delayed by 50ns. Maximum Duty Cycle To ensure current sensing and charge pump operation, the fan 5090 guarantees that the low side MOSFET will be on for a specific part of each cycle. At low frequencies, this occurs as approximately 90% of the maximum duty cycle. Therefore, at 250KHz, 4 microsecond period, the low voltage side is at least 4 microseconds • 10% = 400 nanoseconds. At higher location frequencies, this time may drop so low as to be ineffective. Fan 5090 provides minimal low-side on time around duty cycle, regardless of duty cycle. Current Sensing The FAN5090 has two independent current sensors, one for each stage. Current sensing is done by measuring the source-drain voltage of the low-side MOSFET which is punctual. Each phase has its own power ground pin, allowing the phases to be placed in different locations affecting measurement accuracy. For best results, the PGND and SW pins of each phase must be connected as Kelvin trace pairs directly to the source and drain, respectively, of the appropriate low-side MOSFETs. Care needs to be taken in the layout of these fields; the two independent current sensors of the current sharing fan 5090 work and independent current control loops ensure that the two stages each provide half of the total output current. Only if there is a mismatch in the RDSon of the low-side mosfet. Short-Circuit Current Characteristics (ILIM Pin) The FAN5090 short-circuit current characteristics include the event of a short circuit in the function that protects the DC-DC converter from damage. The short circuit limit is set to the RS resistance as shown in the formula

PCB Layout Guidelines: The placement of the mosfet relative to the FAN5090 is key. Place the mosfet so that the HDRV and LDRV pins of the FAN5090 to the FET gate are minimized. Long lead lengths on these pins will cause a lot of ringing due to the inductance of the traces and gate capacitance of the FET. This noise radiates out across the board, and, since it's at a high voltage and high frequency, is difficult to suppress. In general, keep all noisy switch lines away from the quiet analog part of the fan 5090. That is, the traces connected to pins LDRV, HDRV, SW, the boot, and PGND should be connected away from pins 1 to 7 and pins 18-24. Place the decoupling capacitors as close to the FAN5090 pins as possible. The extra lead length reduces the ability to suppress noise. Each power and ground pin should have its own to appropriate. This helps in pins. Place the given mosfet, inductor and Schott as close as possible in the first bullet above for the same reason. Place the input bulk capacitor as close as possible to the drain of the high-side mosfet. Placing 1.0µF decoupling caps directly on each high-side MOSFET helps suppress high-frequency switching noise at the input of the DCDC converter. Placing the output bulk capacitors as close to the CPU as possible optimizes their immediate supply capability during current transients in the load current. The output capacitor and CPU will allow the parasitic resistance of the board traces to degrade the performance of the DC-DC converter under severe load transient conditions, resulting in higher voltage excursions. PC Board Example Layout and Gerber File A reference design for a board implementing the FAN5090 and PCAD layout Gerber files and silk screens are available through your local Fairchild representative. FAN5090 Evaluation Board Fairchild provides an evaluation board to verify the horizontal performance of the System Fan 5090. It is using externally provided components and PCB layout.