feature

High data rates: DC to 100 Mbps (NRZ); 3.3 V and 5.0 V operation/horizontal translation compatible; maximum operating temperature 125 degrees Celsius; low power operation; 5V operation; 1.0 mA max at 1 Mbps; 4.5 mA max at 25 Mbps 16.8 mA max at 100 Mbps; 3.3 V operation; 0.4 mA max at 1 Mbps; 3.5 mA max at 25 Mbps; 7.1 mA max at 50 Mbps; 8-lead SOIC package (lead-free version available); high Common Mode Transient Immunity: >25kv/s; UL Recognized for Safety and Regulatory Information; 2500 V rms, 1 minute per UL 1577; CSA Parts Acceptance Notice No. 5A; VDE Certificate of Conformity; German Industrial Standard EN 60747-5- 2 (VDE 0884 Part 2): 2003–01; German Industrial Standard EN 60950 (VDE 0805): 2001–12; European Industrial Standard EN 60950:2000; VIORM = 560 Volts peak.

application

Digital fieldbus isolation; opto-isolator replacement; computer peripheral interface; microprocessor system interface; general instrumentation and data acquisition.

General Instructions

The ADuM1100 is an analog device based digital isolator. ICouper technology. Combined with high-speed CMOS and monolithic air-core conversion technology, this isolation element offers advantages over alternatives such as optocoupler devices. For existing high-speed optocouplers, the ADuM1100 supports up to 25 Mbps and 100 Mbps. The ADuM1100 operates over a voltage range of 3.0V to 5.5V, delays propagation <18ns, edge asymmetry <2ns, and is temperature compatible up to 125.C. It operates at very low power with a quiescent current of less than 0.9 mA ( sum of both sides), and less than 160)} per Mbps data rate. Unlike other optocoupler alternatives, the ADuM1100 provides a patented refresh function that continuously updates the output signal for DC correctness. The ADuM1100 has three bars. The ADuM1100ARADuM1100BR can operate up to the maximum temperature supporting data rates up to 25 Mbps and 100 Mbps, respectively. The ADuM1100UR can operate up to 125.C and supports data rates up to 100 Mbps.

Typical performance characteristics

Application Information PC Board Layout

The ADuM1100 digital isolator does not require external interface circuitry for logic interfaces. Bypass capacitors are recommended at the input and output supply pins. The input bypass capacitor can be most conveniently connected between pins 3 and 4 (Figure 2). Alternatively, a bypass capacitor can be located between pins 1 and 4. An output bypass capacitor can be connected between pins 7 and 8 or between pins 5 and 8. The capacitor value should be between 0.01µF and 0.1µF. The total lead length between the ends of the capacitor and the power supply pins should not exceed 20 mm.

Propagation delay time describes the length of time it takes for a logic signal to propagate through a component. Propagation delay time for a logic low output and propagation delay time for a logic high output refer to the duration between the transition of the input signal and the transition of the corresponding output signal (Figure 3).

Pulse width distortion is the largest difference between TPLH and TPHL and provides an indication of how accurately the timing of the input signal is maintained in the component output signal. Propagation delay skew is the difference between the minimum and maximum propagation delay values between multiple ADUM1100 components with the same output load operating at the same operating temperature.

Depending on the input signal rise/fall time, the propagation delay measured based on the input 50% level can differ from the true propagation delay of the component (measured from its input switching threshold). This is because the input threshold, like a commonly used optocoupler, is at a different voltage level than the 50% point of a typical input signal. This propagation delay difference is given by:

Where: tPLH, tPHL = 50% level from input. t'PLH, t'PHL = Slave input switching threshold. tr, tf = Enter 10% to 90% rise/fall time. VI = Amplitude of the input signal (levels 0 to VI assumed). VITH(L–H), VITH(H–L) = input switching threshold.

The effect of slower input edge rates can also affect the measured pulse width distortion based on the input 50% level. This effect may increase or decrease apparent pulse width distortion depending on the relative magnitudes of tPHL, tPLH and PWD. The case of interest here is the condition that results in the greatest increase in pulse width distortion. The change in this case is made by:

in,

In Figure 7, the adjustment of pulse width distortion is plotted as a function of input rise/fall time.

How To, DC Correctness, and Magnetic Field Immunity

Referring to the functional block diagram, the two coils act as pulse transformers. Positive and negative logic transitions at the input of the isolator cause narrow pulses (2ns) to be sent through the transformer to the decoder. The decoder is bistable, so it can be set or reset by a pulse indicating a logical transition of the input. In the absence of more than 2µs logic transitions at the input, periodic update pulses of appropriate polarity are sent to ensure DC correctness at the output. If the decoder does not receive these update pulses for approximately 5µs, the input side is assumed to have no power or functionality, in which case the isolator output is forced to a logic high state by a watchdog timer circuit.

The limit on the magnetic field immunity of the ADuM1100 is set by the condition that the induced voltage in the transformer's receive coil is large enough to incorrectly set or reset the decoder. The analysis below defines the conditions under which this may occur. Check the 3.3V operating state of the ADuM1100 as it represents the most susceptible operating mode.

The pulse amplitude output by the transformer is greater than 1.0V. The decoder's sensing threshold is about 0.5v, so a 0.5v margin is established in which the induced voltage can be tolerated. The induced voltage induced by the receiving coil is given by:

Where: β = magnetic flux density (Gauss). N = the number of turns of the receiving coil. rn=radius (cm) of the nth turn of the receiving coil. Right n 2 Given the geometry of the receiver coil in the ADUM1100 and the imposed requirement that the induced voltage in the decoder is at most 0.5 V headroom, the maximum allowable magnetic field is calculated as shown in Figure 8.

For example, at a magnetic field frequency of 1 MHz, a maximum allowable magnetic field of 0.2 kGauss induces a voltage of 0.25 volts on the receiving coil. This is about 50% of the sensing threshold and will not cause false output transitions. Similarly, if such an event occurs during the transmit pulse (and has the worst polarity), reduce the received pulse from >1.0v to 0.75v - still well above the decoder's 0.5v sensing threshold.

The flux density values above correspond to specific current amplitudes at a given distance from the ADuM1100 transformer. Figure 9 presents these allowable current amplitudes as a function of frequency for selected distances. As shown, the ADuM1100 is extremely immune and can only be affected by high frequencies and very large currents very close to the components. For the 1 MHz example noted, the 0.5 kA 5 mm current must be placed away from the ADuM1100 to affect the operation of the component.

Note that under the combination of strong magnetic fields and high frequencies, any loops formed by the printed circuit board traces may generate enough error voltages to trigger the thresholds of subsequent circuits. Care should be taken to avoid this possibility when laying out such traces.