Features

● Low input noise voltage: 2.0NV/√Hz

● High -unit gain bandwidth: 500MHz

● High -gain bandwidth product: 240MHz

● High -output current: 90mA

● A single+5V to+12V operation

● Low power supply current: 4.8ma/ch

] ● XDSL differential line receiver

● High dynamic range ADC driver

● Low noise PLL integralor

I/Q amplifier

● Active filter

Instructions

OPA2822 provides very low 2.0NV/√Hz broadband input noise, unit gain stable, voltage feedback building. Interesting to the XDSL receiver application, OPA2822 also supports this low input noise and extremely low harmonic distortion, especially in differential configurations. Provide sufficient output current to drive the potential heavy load between the amplifier and the codec. The 2VPP differential output from+5V to+12V power supply at a harmonic distortion at 1MHz input frequency ≤ 100DBC. Working at the low 4.8mA/CH power supply current, OPA2822 can meet the requirements of all XDSL receivers, including various possible power voltage from a single+5V condition to ± 5V to single+12V design.

The general application on the single+5V power supply will benefit from the high input and output voltage on the reduced power supply voltage. Low -cost PLL precision integralizers will also benefit from low voltage noise and disorders. The baseband I/Q receiving machine channel can achieve almost perfect channel matching in terms of noise and distortion to support a signal with a 5MHz and dynamic range greater than 14 bits.

OPA2822 related products

Typical features: vs u003d ± 6V ta u003d+25 ° C, G u003d+ 2. RF u003d 402 , RL u003d 100 , unless there is another instructions.

Typical features: vs u003d ± 6V [ 123] TA u003d+25 ° C, differential gain u003d 2, RF u003d 604 , RL u003d 400 unless there is another explanation.

Typical features: vsu003d+5V

TA u003d+25 ° C, g u003d+2, RF u003d 402 , RL u003d 100 , unless otherwise explained.

Typical features: vs u003d+5V

ta u003d+25 ° C, differential gain u003d+2, RF u003d 604 , RL u003d 400 unless there are other instructions.

应用程序信息

宽带无反转操作

OPA2822提供了一个独特的功能组合，宽带双， The unit gain is stable and the voltage feedback amplifier is used to support the high dynamic range requirements of emerging communication technology. Combination -OPA2822 has a low 2NV/√Hz input voltage noise, and the harmonic distortion can exceed 100DBC SFDR through 2MHz, providing the highest dynamic range input interface for emerging high-speed 14-bit (and higher) converters. In order to achieve this level of performance, you need to pay close attention to circuit design and circuit board layout. FIG. 1 shows the +2 configuration gain as the basis of the electrical characteristic table, and most of the typical features of ± 6V. Although the use of separation ± 6V power supply provides characteristics, most electrical and typical features are also applicable to single power+12V design. Among them, the input and output working voltage is concentrated at the midpoint of+12V power supply. The operation at ± 5V will be very close to the ± 6V working point shown. Most reference curves are characterized by the signal source of 50 driving impedance and 50 load impedance measurement equipment. In FIG. 1, 50 parallel resistors at the VI terminal are matched with the source impedance of the test signal generator, while the VO terminal 50 the series resistor provides a matching resistor for the measuring device load. Generally speaking, the voltage swing specification of the data table is at the output pin (VO in Figure 1), and the output power (DBM) specification is under the matching of 50 The total 100 load of the output end, plus the total feedback network load of 804 in Figure 1, the effective output load of OPA2822 is 89 Although this is a good load value for frequency response measurement, the distortion will quickly improve with the lighter output load. For the distortion performance of the report in the electrical characteristics table, maintain the same feedback network and increase the load to 200 , which will cause the total load to be 160

In order to obtain a higher gain, the feedback resistance (RF) remained at 402 and the gain resistance (RG) was adjusted to form typical features.

Different from the current feedback design, the voltage feedback computing amplifier can use a wide range of resistance to set the gain. Low noise components like OPA2822 can only produce lower total output noise only when the resistance value is relatively low. In Figure 1, the input reference voltage noise component of the resistor is 1.8nv/√Hz, which is close to the value of 2NV/√Hz inherent in the inherent 2NV/√Hz. For a more complete description of the impact of the feedback network on the noise, please refer to the setting resistance value behind this data table to minimize the noise part. Generally speaking, the parallel combination of RF and RG should be less than 300 to maintain the low noise performance of OPA2822. However, setting these values u200bu200btoo low may damage distortion performance due to output load, as shown in distortion and load data in typical features.

Broadband inverter operation

There are several benefits to run OPA2822 as a inverter amplifier, especially suitable for mixed design in the XDSL receiver application. Figure 2 shows the inverter gain of the -1 circuit as a typical characteristic foundation of the inverter mode.

In the reverse situation, only the feedback network's RF component appeared as part of the total output load, and parallel to the actual load. For the 100 load used in typical features, the effective load in this reverse configuration is 86 The gain resistor RG is set to obtain the required inverter gain (in this example, the gain is 604 ). It is equal to the source. In this case, RM u003d 54.9 with 604 gain setting the resistor parallel to generate 50 match input impedance. Only when the input must be matched with the source impedance, RM is required, such as the characteristic test of the circuit in Figure 2.

In order to make full use of OPA2822's excellent DC input accuracy, it is necessary to match the total DC impedance of each input end to obtain offset current offset. For the circuit in FIG. 2, this requires a resistor at the non -switch to the input end 309 the resistor. The calculation of this resistance value assumes that DC coupling 50Ω source impedance and RG and RM. Although the resistor will eliminate the input bias current, it must be well decoupled (0.1 μF in Figure 2) to contribute the noise contribution of the input current noise input current noise in the filtering resistor and amplifier.

When the required RG resistance is close to 50 the bandwidth of the circuit in Figure 2 will far exceed the bandwidth at the same gain in Figure 1. This is because when the analysis includes 50 source impedance, the noise gain in Figure 2 circuit is lower. For example, at the signal gain to -12 (RG u003d 50 , RM u003d Open, RF u003d 604 u0026#8At the time of 486;), the noise gain of the circuit in Figure 2 will be 1+604 /(50 +50 u0026#8486) u003d 7, because the source is added to the noise gain equation. This will provide higher bandwidth than incompetent gain +12.

The single power supply without switching

OPA2822 can also support single+5V operations, its excellent input and output voltage swing capacity. Neither rail input and output are within 1.2V range. For a single amplifier channel, this provides a very clean 2VPP output capability on a single+5V power supply, or the 4VPP output capacity of the differential configuration of the two channels at the same time. Figure 3 shows the +2 AC coupling non -conversion gain as an electrical characteristic table, and most of the typical features of the operation of a single+5V power supply.

The key requirement for the running of the broadband single power supply is to keep the input and output signal swing in the available voltage range of input and output. The circuit in Figure 3 uses a simple resistor division of the+5V power supply (two 804 resistors) to establish an input midpoint bias. Choose these two resistors to provide DC bias current offset, because their parallel combination matches the DC impedance from the inverter node, that is, RF. The gain setting resistance is not part of the DC impedance from the inverter node, because the blocking capacitors connected with it. The input signal is then coupled to the midpoint voltage bias. Select the input impedance matching resistor (57.6 ) for testing to provide input matching (high frequency) of 50 when the parallel combination of the bias splitter network is included. The gain resistance (RG) is coupling, and the DC gain is +1. This also makes the output also biased (vs/2) in the input. When the circuit is displayed with a+5V power supply, the circuit can be used for single -power operations of high+12V.

Single power inverter operation

For those+5V typical features that need to be reversed to -1, use the test circuit in Figure 4.

Like the circuit in FIG. 2, the feedback resistance (RF) has increased to 604 to reduce the load effect of the actual load parallel with 100 The two 1.21k resistors using RB, non -conversion input bias to VS/2 (in this example is 2.5V). The parallel combination of these two resistors (605 ) provides input bias current offset by matching DC impedance outside the reverse input node. The use of 0.1 μF capacitors, non -reversible input bias also get well decoupled, thereby reducing the power noise of the power, but also reduced the resistance and bias current noise of the input terminal.

The gain resistance (RG) is set to equivalent to the feedback resistor (RF) to 604 , to realize the expected gain from VI to VO -1. DC closed lock capacitors are connected in series with RG to reduce the DC gains when the input bias and bias voltage remain unchanged to +1. This puts the VS/2 bias voltage to the output pin and reduces the output DC offset error item. Use the additional RM resistor setting to 54.9 to match the signal input impedance with 50 power supply. At a high frequency, the parallel combination of RM and RG provides a 50Ω input impedance matching. This is mainly used for testing and characteristic descriptions. System applications do not necessarily require this input impedance matching, especially when the source device is physically close to OPA2822 and/or does not require 50Ω input impedance matching. At a high gain, signal source impedance will begin to have a significant impact on OPA2822's epigenetic noise gain (therefore, bandwidth).

ADSL receiving amplifier

The main application of OPA2822 is as a low -power and low noise receiving amplifier in the design of the ADSL modem design. OPA2822 can well support the application of single+5V, ± 5V and single+12V power supply. For higher power, consider dual low noise THS6062 ADSL receiving amplifier, it can support up to up to ± 15V power. Figure 5 shows a typical ADSL receiver design, where OPA2822 is used as a reverse seeker and amplifier to provide the drive output signal to offset and receive channel gain. In FIG. 5's circuit, the driver differential output voltage is displayed as VD, and the receiver channel output is displayed as VR.

These two sets of resistors R1 and R2 are set to provide the required gain to the signal of the transformer to reach the transformer line side, and the export to the receiver output Drive output signal (VD) provides nominal offset. Generally, the two RS resistors are set to provide impedance matching through the transformer. This is achieved by setting RS u003d 0.5 u0026#8226; (RL/N2). Among them, N is the number ratio used in the line drive design. If RS is set in this way, and the actual twisted wire displays the expected RL impedance value, the voltage swing generated at the VD will be cut at half at the transformer input. In this case, setting R1 u003d 2 u0026#8226; R2 will cancel the driver output signal at the output of the receiver. Basically, the drive output voltage generates a current in R1, which is fully matched with the current in R2, which is due to the attenuation and reversal of the output signal of the transformer input terminal. In practical applications, R1 and R2 are usually RC networks to offset frequency changes in frequency changes.

With the changes of the number of turns to the transformer, to support the combination of different line drives and power supply voltage, the impact of the receiver-amplifier noise will also change. Typical, the DSL system contributes to the reference noise of the receiver. The contribution can be calculated for the circuit of Figure 5. For example, from the lineThe total gain of the road to the receiver is 1, and the input resistance R2 is selected. The remaining resistors will be set up by the drive and the gain requirements. By setting the resistance value, you can calculate the line reference noise contribution caused by OPA2822. R1 will be set to 2 times the R2 value, and the feedback resistance will be set to restore gain loss by the transformer. Table 1 shows the head office's reference noise lower limit (DBM/Hz), and three different R2 values u200bu200bare used within the range ratio of the transformer (the amplifier gain is adjusted under each turning ratio).

Table 1 shows that the lower number of transformers will reduce the reference noise, and the resistance noise will begin to reduce the noise at a higher value, especially from 500 u0026# 8486; to 1K . Generally speaking, if the performance of the ADSL modem is lower than -145DBM, the reference noise floor generated by the receiver channel will not limit the performance of the ADSL modem.

Active filter application

As a low -noise, low -income, and stable unit gain and stable voltage feedback amplifier, OPA2822 provides an ideal building block for high -performance active filters. Because there are two channels available, it can be used as a first -level -level -level active filter or differential filter. Figure 6 shows the 6 -order filter from the two second -order SALLEN key sections, transmitting zero -point filter and a passive rear filter consisting of Qualcomm and Low -pass. The first amplifier provides a second -order high -level, while the second -level amplifier provides a second -order low -level. Figure 7 shows the frequency response of this sample filter.

Differential source filters are shown in Figure 8. The circuit shows a single power supply, a second-order high-pass filter, which is set to the ADSL-CPE modem application to provide the required Qualcomm function. In order to use this circuit, the hybrid circuit will be realized at the input terminal of the filter as passive and non -passing circuit. For the+5V ADSL design, a part of the filtering is preferably before the amplifier, thereby restricting the amplitude of the unscrusable line drive signal. This type of receiving rating is usually driven by an ADC (analog to a digital converter) input signal before the compilation of the code. Figure 9 shows the frequency response of the Qualcomm circuit in Figure 8.

The high dynamic range ADC driver

In high -performance applications, there are many circuit methods to provide the last level amplification before ADC. For signal channels that can communicate with a very high dynamic range of coupling, the circuit shown in Figure 10 provides excellent performance. Most ultra -high performance ADC u0026 GT; 12 -bit performance requires differential inputs to achieve dynamic range. The circuit in Figure 10 converts the single -ended power supply to a differential transformer through a ratio of 1: 2 turns, and then drives the reverse gain setting the resistor (RG). These resistors are fixed at 100 to provide a transformerThe secondary 50 input of power matching. You can then adjust the gain by setting the feedback resistance value. In order to obtain the best performance, the circuit outputs the land on the ± 5V power supply, although the+12V power supply can also provide excellent results. Since most high -performance converters work on a+5V power supply, the output is replaced by the level input voltage (VCM) of the converter input through AC blocking the capacitor level. Pass filter. The circuit is used for input from 10kHz to 10MHz, so the output of the Qualcomm corner is set to 1.6kHz, and the low -pass deadline is set to 20MHz. These are examples of examples; actual filtering requirements will be set by specific applications.

1: 2 turns ratio transformer also provides improvement in the reference noise coefficient. Formula 1 shows the noise coefficient (NF) calculation of the circuit, where RG is limited to provide input matching with RS (via transformer), and then sets RF to obtain the required overall gain. Under these constraints (non -interconnected input is 0 ), the noise coefficient equation is greatly simplified.

In the formula: rg u003d 1/2 n2RS

n u003d transformer number ratio ratio

α u003d rf/rg en u003d operational operation The amplifier input voltage noise

in u003d reverse input current noise

kt u003d 4e-21j [t u003d 290 ° k]

gain (db) u003d 20 to number [ nα]

Design tool

Demonstration board

There are two PC boards that can be used for assistance Two encapsulation styles of OPA2822 are preliminary evaluation of circuit performance. Both of them are free, as a descriptive file provided by an unpopular personal computer board. The abstract information of these circuit boards is shown in Table 1.

Macro model and application support

Computer simulation using SPICE on the circuit performance is usually an analysis of OPA2822's fast performance in its expected application. method. This is especially true for video and RF amplifier circuits, because parasitic capacitors and inductors play a main role in the performance of the circuit. OPA2822's Spice model can be obtained through the TI website. These models can well predict small signal communication and transient performance under various operating conditions. They do not do well in predicting harmonic distortion. These models do not try to distinguish the encapsulation type in its small signal communication performance.

Operation suggestion

Set the resistance value to minimize noise

Make full use of OThe low input noise of PA2822 needs to pay close attention to external gain settings and DC bias networks. The feedback resistance is part of the entire output load (if it is set too low, it may begin to reduce distortion). Considering this, a good starting point for design is to choose as low as possible feedback resistors (consistent with the problem of load distortion), then continue to design, and set other resistors as needed. In order to maintain complete performance, the feedback resistance is set at the range of 200 to the range of 750 can provide a good start for the design. Figure 11 shows the complete output noise analysis model of any operational amplifier.

The total output spots noise voltage can be calculated as a square root of the sum of all square output noise voltage items. Formula 2 shows the general form of the output noise voltage expression, and uses the terms shown in Figure 11.

This expression will be removed by noise gain (ng u003d 1 u003d rf/rg) Point noise voltage, as shown in equivalent 3:

Insert high resistance value in Formula 3 can quickly control the total effect of the reference voltage noise. A 250 non -conversion input of source impedance will increase the same noise as the amplifier itself. If the non -switching input is the DC bias path (such as in the inverter or some single power supply), the key is to add noise diversion capacitors to the resistor to limit the impact of the additional noise of these resistors (see Figure 2 2 Example).

Frequency response control

Voltage feedback computing amplifier, such as OPA2822, with the increase of signal gain, the closed -loop bandwidth gradually decreases. Theoretically, the gain bandwidth (GBP) displayed in the electrical characteristics of this relationship is described. Ideally, in addition to GBP, in addition to the gain without reversing signal (also known as noise gain, NG) can predict the closed ring road bandwidth. In fact, this principle is only established when the phase margin is close to 90 °, just like in a high -gain configuration. Under low gains, most high -speed amplifiers will show a lower phase margin and higher bandwidth more complicated response than the GBP forecast. OPA2822 After compensation, a minor peak value frequency response is generated when the gain is +2 (see the circuit in Figure 1). When the gain is +2, the typical bandwidth of 200MHz far exceeds the bandwidth predicted by the GBP of 240MHz divided by 2. With the increase of gain, the bandwidth of GBP prediction is more accurate. As shown in typical features, when the gain is +10, the -3DB bandwidth of 24MHz is matched with the bandwidth of the 10 predicted bandwidth with GBP.

Reverse operation provides some interesting opportunities to increase available signal bandwidth. When the source impedance is matched with the gain resistance (for example, Figure 10), the signal gain is (1+RF/RG), and the noise gain is(1+RF/2RG). This reduces the noise gain almost half, extended the signal bandwidth and increase the loop gain. For example, set RF u003d 500 u0026#8486 in FIG. 10 will provide a signal gain of 5V/V for the amplifier. However, the source impedance, including 50 source impedance reflected by the 1: 2 transformer, will provide an additional 100 source impedance for the noise gain analysis of each amplifier. This reduces the noise gain to 1+500 /200 u003d 3.5V/V, and the amplifier bandwidth is at least 240MHz/3.5 u003d 68MHz.

Drive capacitance load

For the operational amplifier, the most demanding and most common load conditions are the capacitor load. Generally, the capacitance load is an input of ADC, including an additional external capacitance that can improve the linearity of ADC. When the capacitance load is directly applied to the output pin, a high -speed and high -open -ring gain amplifier like OPA2822 is easily affected by the decrease in stability and the peak response of the closed frequency response. Introduce an additional capacitance load in the ring, and you can consider introducing an additional capacitance load in the ring. Some people have proposed several external solutions to solve this problem. When the main consideration is low noise and low -disturbance frequency response flat degree, the simplest and most effective solution is to insert a series of isolation resistance between the amplifier output and the capacitance load. isolation. This did not eliminate the pole from the ring response, but shifted it and zero at a higher frequency. The effect of additional zero is to eliminate the phase lag of the container characteristics, thereby increasing the phase margin and improving the stability.

The typical feature shows the recommended RS and the frequency response generated by the RS and capacitance loads and the frequency generated under the load. For OPA2822 running at +2 gain, the frequency response at the output pins has a slight peak without a capacitance load, and a relatively high RS value is required to flatten the response under the flat load. One way to reduce the required RS value is to use the noise gain in Figure 12 to adjust the circuit.

The resistance RNG of the two input end can be used to increase noise gain and maintain the expected signal gain. This can be used to improve the flatness under low gain, and it can be used to reduce the RS value required in the capacitor load driver application. This circuit produces a flat degree curve under the adjustment of the typical characteristics by adjusting the RNG. As shown in the curve, when the RNG is 452 Ng is 3, and the frequency response flatness is provided at a signal gain to +2. Formula 4 gives calculations of RNG at a given target noise gain (NG) and signal gain (G):

In the formula: RS u003d non -conversion input total total input input Source impedance [25 ]

G u003d signal gain [1+ (RF/RG)]

Ng u003d noise gain target

Use this technology to obtain the initial frequency response flatness will significantly reduce it in the capacitance load. Response the required series resistance value. In the best situation, noise gain 3 and signal gain 2 can reduce the required RS, as shown in Figure 13. Here, the required RS and the capacitance load are re -filled with the data of typical characteristics. This shows that using RNG u003d 452 u0026#8486 at the input terminal can greatly reduce the required RS value required for a flat response.

distortion performance

The distortion of transmission signals through the frequency of 2825 MPA is very low. Although its main purpose is to provide very low noise and distortion through 1.1MHz's maximum ADSL frequency, the OPA2822 in the differential configuration can provide distortion below -85dBC under a 4VPP motion of 5MHz. For the need to achieve extremely low distortion applications through higher frequencies, consider higher conversion rate amplifiers, such as OPA687 or OPA2681.

Typical features show that before the base wave signal reaches a very high frequency or power level, the limit of the SFDR will be a second harmonic distortion, rather than the three harmonic components that can be ignored. Then focus on the second harmonic to increase the load impedance directly to improve the distortion. However, the differential operations have provided the most significant improvement in the even -order distortion items. For example, the electrical characteristics show that the single channel of OPA2822 transmits 2VPP to 200 loads at a frequency of 1MHz, which usually shows the second harmonic product when -92DBC, and three harmonics will appear when -102DBC. Change the configuration to the differential driver (each output is still driven 2VPP) to cause the 4VPP total differential output to 400 differential load, and provide each amplifier with the same single -end load 200 . This configuration reduces the second harmonic to -103DBC, and the three harmonics will be reduced to about -105DBC. The overall dynamic range is improved by more than 10DB.

For the analysis of general distortion, please remember that the total load on the amplifier includes the feedback network; in the non -reversal configuration, this is the sum of RF+RG, and in the reverse configuration, the additional load is just the only load. RF. Increasing output voltage swing directly increases the harmonic distortion. Increased output width of 6DB usually increases the second harmonic 12DB and the third harmonic 18DB. Increasing signal gain usually increases secondary harmonic and three harmonics, because the loop gain will be reduced when high gain. Similarly, an increase in voltage gain 6DB will increase the second harmonic distortion of about 6DB. OPA2822's distortion characteristic curve shows that three harmonic distortion has a small impact on gain. Finally, due to the attenuation of the frequency of the loop, the total distortion usually increases with the increase of the infrastructure. On the contrary, the distortion will improve to low frequency and decrease to contract50kHz's main opening pole. This will generate the level of harmonic distortion that is basically impossible to measure in the audio band.

OPA2822 has extremely low third -order harmonic distortion. This also provides a very good 2 -tone and 3 -order interconnection, as shown in typical features. When the resistance is matched by 50 matching the resistor, the cutting curve is defined as 50 The network will be attenuated by the voltage of the output to the load of 6DB. If OPA2822 is directly driven to the input terminal of high impedance devices (such as ADC), this 6DB attenuation will not occur. Under these conditions, an interception will increase at least 6DBM. The cutting distance is used to predict the interoperability of two close intervals. If the two test frequencies F1 and F2 are specified at the average frequency and Δ frequency fo u003d (F1+F2)/2 and u0026#8710; u003d | F2 – F1 | #8226; u0026#8710; The difference between the two equal testi