General Instructions
The W83627EHF /EHG/EF/EG is an evolution of Winbond's most popular I/O family. They have a brand new interface, the LPC (Low Pin Count) interface, which will be supported in the new generation of chipsets. As the name suggests, this interface provides an economical I/O interface implementation with a lower pin count and still maintains performance comparable to an ISA interface. Compared to the ISA implementation, about 40 PIN counts are kept in the LPC I/O. It's completely transparent in terms of software, which means that no BIOS or device driver updates are required other than chip-specific configuration.
The W83627EHF/EHG/EF/EG disk drive adapter features include an industry standard 82077/765 compliant floppy disk drive controller, data separator, write pre-compensation circuit, decode logic, data rate selection, clock generator, drive interface control logic , interrupt and DMA logic. The W83627EHF/EHG/EF/EG integrates multiple functions that greatly reduce the number of components required to interface with a floppy disk drive. The W83627EHF/EHG/EF/EG supports four 360K, 720K, 1.2M, 1.44M or 2.88M disk drives with data transfer rates of 250 Kb/s, 300 Kb/s, 500 Kb/s, 1 Mb/s and 2 Mb/s.
The W83627EHF/EHG/EF/EG provides two high-speed serial communication ports (uart), one of which supports serial infrared communication. Each UART includes a 16-byte transmit/receive FIFO, a programmable baud rate generator, full modem control capabilities, and a processor interrupt system. Both UARTs offer legacy speeds up to 115.2kbps , and premium speeds at 230k, 460k or 921k bps with support for high-speed modems. In addition, W83627EHF/EHG/EF/EG provides IR function: IrDA 1.0 (SIR is 1.152K bps).
The W83627EHF/EHG/EF/EG supports a PC-compatible printer port (SPP), bidirectional printer port (BPP), and enhanced parallel port (EPP) and extended capabilities port (ECP). The W83627EHF/EHG/EF/EG contains a game port and a MIDI port. The game port is designed to support 2 joysticks and can be used with all standard PC game control devices, which are very important for entertainment or consumer computers.
The W83627EHF/EHG/EF/EG provides a serial flash ROM interface. It can support serial flash ROM up to 8M bits.
The W83627 EHF/EHG/EF/EG provides system designers with flexible I/O control functions through a set of general-purpose I/O ports. These GPIO ports can be used as simple I/O or individually configured to provide predefined alternate functions.
The W83627EHF/EHG supports hardware status monitoring of personal computers. It can be used to monitor several key hardware parameters of the system, including power supply voltage, fan speed and temperature, which are very important for the stable and normal operation of high-end computer systems. In addition, W83627EHF/EHG supports intelligent fan control system including "thermal cruise etm" and "speed cruise etm" functions. Smart fans can make the system more stable and user-friendly.
The W83627EHF/EHG/EF/EG fully complies with Microsoft PC98 and PC99 hardware design guidelines and meets ACPI requirements. 
Configuration registers support mode selection, function enable/disable, and power-down function selection. In addition, the configurable PnP feature is compatible with the plug-and-play feature requirements of Windows 95/98TM, making system resource allocation more efficient. The Super I/O line is characterized by avoiding short circuits on the power rails. This is especially true for multi-supply systems, where power zoning is much more complex than single-supply systems. Special care may be taken during the layout stage or the IC will fail even if its intended function is viable.
2. Features General y conforms to LPC Specification 1.01
y Support LDRQ (LPC-DMA), SERIRQ (Serial IRQ) and integrated hardware monitoring function
y Compliant with Microsoft PC2000/PC2001 Hardware Design Guidelines y Supports DPM (Device Power Management), ACPI y Programmable configuration settings y Single 24 or 48 MHz clock input y It is 3.3V level, but supports 5V tolerance
--- Except LPC function pins (Pin21~Pin30) and H/W monitor analog pins (Pin95~Pin110)
The input level can be as high as 5V, and the maximum input level can reach 5V+10%.
FDC Corporation
y Compatible with IBM PCs on disk drive systems
y Variable write precompensation with track selectability y Vertical recording format support y DMA enable logic y 16-byte data FIFOs
y Supports floppy disk drives and tape drives y Detects all overflow and underrun conditions
y Built-in address mark detection circuit simplifies reading electronics
y FDD antivirus with software write protection and FDD write enable signal (write data signal is forcibly disabled)
y Supports up to four 3.5" or 5.25" floppy drives, fully compatible with industry standard 82077
y 360K/720K/1.2M/1.44M/2.88M format; 250K, 300K, 500K, 1M, 2M bps data transfer rate y Support 3-mode FDD and its Win95/98 driver Universal Asynchronous Transceiver
y Two high-speed 16550 compatible uarts with 16-byte transmit/receive FIFOs y MIDI compatible y Fully programmable serial interface Features:
--- 5, 6, 7 or 8 characters
--- Parity bit generation/detection
---1, 1.5 or 2 stop bit generation y Internal diagnostic capability:
---Loop control for communication link fault isolation
- Interrupt, Parity, Overload, Frame Error Analog Y Programmable Baud Rate Generator Allows 1.8461 MHz and 24 MHz for 1 to (216-1) Y Maximum baud rate up to 921K BPS for 14.769 MHz and 1.5 Mi BPS is 24 MHz infrared parallel port y supports IrDA version 1 SIR protocol, maximum baud rate up to 1152K BPS y supports BASIC ASK-IR protocol, maximum baud rate up to 57600 bPy, compatible with IBM parallel port
y Supports PS/2 compatible bidirectional parallel port
y Supports Enhanced Parallel Port (EPP) - Compatible with IEEE1284 Specification y Supports Extended Function Port (ECP) - Compatible with IEEE1284 Specification
y supports two axes (X, Y) and two buttons (A, B) per joystick controller Y baud rate 31.25 K baud 16 bytes input FIFO Y 16 bytes output FIFO Y 8042 based on AMIKKEYTM -2 optional F/W, Phoenix Multikey/42TM or keyboard controller with 2Kbytes programmable ROM for customer code and 256bytes RAM MIDI port
y Asynchronous access to two data registers and one status register y Software compatibility with 8042 y Supports PS/2 mouse y Supports port 92 compatibility
y Support interrupt and polling mode y Fast door A20 and hardware keyboard reset
y 8-bit timer/counter y Support binary and BCD arithmetic
y 6 MHz, 8 MHz, 12 MHz, or 16 MHz operating frequency y Supports up to 8 Mbits of Flash ROM y 48 programmable general-purpose I/O ports Serial Flash ROM interface General-purpose I/O ports
y GPIO ports 1 and 4 can be used not only as simple I/O ports, but also as watchdog timer outputs,
Power LED output, pause LED output in power-off mode y function (GP24~GP27, GPIO-3, GPIO-4, GPIO-5) y keyboard wake up via programmable key y mouse wake up via programmable button OnNow function
y Now wake up from all ACPI sleep states (S1-S5) y Smart fan control system supports Smart Fan TM I - "thermal cruise" and "speed hardware monitoring functions (W83627EHF/EHG only)
CruiseTM" mode, Smart FanTM III function y 3 thermal input from optional remote thermistor or entiumTM II/III/4 thermal diode output y 10 voltage input (CPUVCORE, VIN[0..4] and inherent 3VCC, AVCC, 3VSB, VBAT) y 5 Fan Speed Monitor Input y 4 Fan Speed Control
y Dual mode fan control (PWM and DC) y Built-in to prevent open circuit detection
y Programmable hysteresis and setpoint for all monitoring items y High temperature indication output
y Release of SMI, OVT to activate system protection and Winbond hardware DoctorTM support y 6 VID input/output
y Block diagram of I2C interface providing read/write registers

Pin Description Note: See Section 8.2 DC Characteristics for details.
Otter
- Analog output pin Ain
- Analog input pins inked
- CMOS level Schmitt trigger input pin interior view
-TTL level input pin international
- TTL level input pin integer with internal pull-down resistor
-TTL level Schmitt trigger input pin international standard 3
-3.3V TTL level Schmitt trigger input pin
INtu Corporation
- TTL level input pin input/output 8T with internal pull-up resistor
- TTL level bidirectional pin input/output 12T with 8mA source sink capability
-3.3V TTL level bidirectional pin with 12mA source-sink capability input/output 12TS
-3.3V TTL level bidirectional Schmitt trigger pin. Open-Drain Output Input/Output 16cs with 12mA Sink Capability
- CMOS grade Schmitt trigger bidirectional pin. Open-drain I/O 24T with 16 mA receive capability
-TTL level bidirectional pin. Open-drain output with 24 mA sink capability outputs 8
-TTL level output pins with 8mA source-sink capability to output 12
-3.3V TTL level output pin with 12mA source-sink capability out 24
-TTL level output pin with 24 mA source sink capability
OD8 system
- Open-drain output pin with 8mA sink capability
OD12 type
- Open drain output pin with 12mA sink capability
OD24
- Open-drain output pin with 24mA sink capability

Hardware Monitor Overview
The W83627EHF/EHG can be used to monitor several key hardware parameters of the system, including power supply voltage, fan speed and temperature, which are very important for the stability and normal operation of high-end computer systems. W83627EHF/EHG provides LPC interface to access hardware.
An 8-bit analog-to-digital converter (ADC) is built inside the W83627EHF/EHG. The W83627EHF/EHG can simultaneously monitor 6 analog voltage inputs (internal monitor VBAT, 3VSB, 3VCC, and AVCC power supply), 5 fan tachometer inputs, 3 remote temperatures, and 1 case open detection signal. Remote sensing can be done through a thermistor or directly from the IntelTM Deschutes CPU thermal diode output. In addition, the W83627EHF/EHG provides: 4 PWM (Pulse Width Modulation) outputs for fan speed control or 4 DCFAN outputs for fan speed control; beep output for warning; HM U SMIŠ (via SERIRQ or OVTŠpin ), OVTŠ signal of system protection event.
Through application software or BIOS, users can read all monitoring parameters of the system at any time. Pop-up warnings can also be activated when a monitored item is outside the appropriate/preset range. The application software can be Winbond's hardware DoctorTM or other management application software. The user can also set upper and lower limits (alarm thresholds) for these monitored parameters and activate a programmable and masked interrupt. An optional beep can be used as a warning signal when a monitored parameter is outside a preset range.
access interface
W83627EHF/EHG provides two interfaces for microprocessor to read and write hardware monitoring internal registers.
The first interface uses the LPC bus to access the low byte (bit2~bit0) ports defined in ports 5h and 6h, and the other high bits of these ports are set by the W83627EHF/EHG itself. The general decoding address is set to port 295h and port 296h. The two ports are described as follows:
Port 295h: Index port.
Port 296h: Data port.
The register structure is shown in the figure

Analog Input The maximum input voltage to the analog pins is 2.048 V because the 8-bit ADC has an 8MV LSB. In practice, PC-monitored applications are often connected to a power supplier. CPU Vcore voltage, battery (pin 74), 3VSB (pin 61), 3VCC (pin 12), AVCC (pin 114) voltages can be connected directly to these analog inputs. The +12V voltage input should be reduced by a factor with external resistors to obtain the input range.

Monitoring temperature from thermistor
The W83627EHF/EHG can connect three thermistors to measure three different ambient temperatures. The thermistor's specifications should consider (1) a beta value of 3435K and (2) a resistance value of 10K ohms at 25°C. In Figure 6.2, the thermistor is connected with a 10K ohm series resistor, then to VREF (pin 101).
Temperature monitoring from Pentium IITM/Pentium IIITM thermal diodes
The W83627EHF/EHG can replace the thermistor with a Pentium IITM/Pentium IIITM thermal diode, and the circuit connection is shown in Figure 6.3. The D- pin of the Pentium IITM/Pentium IIITM is connected to AGND (pin 117) and the pin D+ is connected to the temperature sensor pin in the W83627EHF/EHG. Resistor R=15K ohms should be connected to VREF to provide diode bias current and bypass capacitor C=2200pF should be added to filter high frequency noise.

Fan Tach Count and Fan Tach Control The Fan Tach Count input is used for signals from fans equipped with a tachometer output. The levels of these signals should be set to TTL levels and the maximum input voltage cannot exceed +3.3V. If the input signal from the tachometer output exceeds +3.3V, an external trim circuit should be added to reduce the voltage to obtain the input specification.
Determine the fan counters based on:
Count=Rotation speed 1.35××Divisor 106
In other words, the fan speed counter has been read from register bank 0 index 28h, 29h, 2Ah, 3Fh and bank 5 53h, the fan speed can be calculated by the following equation. No. 135. × 10 RPM = count × divisor 6
The default divisor is 2, which is defined in Bank0 Index 47h.bit7~4, Index 4Bh.bit7~6, Index 4Ch.bit7, Index 59h.bit7.bit3~2 and Index 5Dh.bit5~7, which are three digits of the divisor. It provides very low speed fan counters like power supply fans. The following table is an example of the relationship of the divisor, speed and count.

Thermal Cruise Mode In this mode there are 4 pairs of temperature/fan output controls: SysFANOUT for SysFANOUT, CPUN for CPUFANOUT0, AuxTin for AuxFANUDE and CPUFANUT1 for BAN0 index 4AH.
The W83627EHF/EHG provides an intelligent fan system that automatically controls the fan speed according to the current temperature to keep it within a certain range. First, the BIOS must set the desired temperature and time interval (e.g. 55°C ± 3°C), as long as the actual temperature is lower than the set value, the fan will turn off. Once the temperature exceeds the set upper limit temperature (58°C), the fan will turn on at a specific speed set by the BIOS (eg: 20% output) and automatically control its output as the temperature changes. Three situations may occur:
(1) If the temperature still exceeds the upper limit (eg: 58°C), the fan output will increase slowly. If the fan has been running at full speed but the temperature is still above the upper limit (eg: 58°C), a warning message will be issued to protect the system.
(2) If the temperature is lower than the upper limit (ex: 58°C), but higher than the lower limit (ex: 52°C), the fan speed will be fixed at the current speed because the temperature is in the target area (ex: 52°C~58°C) C).
(3) If the temperature is below the lower limit (eg: 52°C), the fan output will slowly drop to 0 until the temperature exceeds the lower limit.
In other words, if "current temperature" > "upper limit", increase the fan speed; if "current temperature" < "lower limit", decrease the fan speed; otherwise, keep the fan speed

Fan Speed Cruise Mode There are 4 pairs of fan input/fan output controls in this mode: SYSFANIN and SYSFANOUT,
CPUFANIN0 with CPUFANOUT0, AUXFANIN with AUXFANOUT, and CUFANOUT1. In this mode, the W83627EHF/EHG provides an intelligent fan system that automatically controls the fan speed according to the current fan speed to keep it within a specific range. The desired fan speed count and interval must be set by the BIOS (eg 160±10). As long as the fan tach count is within a certain range, the fan output will remain at its current value. If the current fan speed count is above the upper limit (eg 160+10), the fan output will increase to keep the count below the upper limit. Otherwise, if the current fan speed is below the low limit (eg 160-10), the fan output will be reduced to keep the count above the low limit.

Manual control mode The intelligent fan control system can be disabled, and the fan speed control algorithm can be programmed through BIOS or application software. The programming method must set the fan configuration at column 0 index 04h, bits 5-4 to column 1, bits 62h to bits 5~4 to column 1. Then, the current temperature and fan output value in smart fan I mode. Also, set the Smart Fan I Mode for Thermal Mode or Speed Cruise Mode

Relative Registers in Smart Fan III Control Mode
SMART-FAN III Mode Temperature Target Re-Tolerance (Output) Min Fan Value Stop Max Fan Output Stop Time
CPUFANOUT0 CR[06h]7cr[09h]CR[67h]CR[0Dh]CR[07h] bit 4-
CPUFANOUT1 CR[63h]3cr[64h]CR[69h]CR[66h]CR[62h] bit 0-
Smart Fan III Mode Output Buck Time Boost Time Maintain Minimum Fan Output Value
CPUFANOUT0 CR[68h]CR[0Eh]CR[0Fh]CR[12h] bit 4
CPUFANOUT1 CR[6Ah]CR[0Eh]CR[0Fh]CR[12h] bit 6
SMI# interrupt mode
The HM_SMI#/OVT# pin is a multi-function pin. This function is selected at Bit 6 of Configuration Register CR[29h].
Voltage SMI Mode
SMI# voltage interrupt is a two-interrupt mode. If the previous interrupt was reset by reading all interrupt status registers, a voltage exceeding the upper limit or falling below the lower limit will cause an interrupt.
Fan SMI Mode The fan's SMI interrupt is a two-interrupt mode. Fan count over limit or over then under limit will cause an interrupt if the previous interrupt was reset by reading all interrupt status registers.

TEMPERATURE SMI MODE There are 3 modes for temperature sensor 1 (SYSTIN) SMI interrupt (1) Comparator interrupt mode Set THYST (temperature hysteresis) limit to 127°C, set temperature sensor 1 SMI to comparator interrupt mode. Temperature exceeding (over temperature) limits will cause an interrupt, which will be reset by reading all interrupt status registers. Once an interrupt event occurs by exceeding TO, then reset, if the temperature remains above TO, the interrupt will occur again on the next conversion completion. If the interrupt event occurs by exceeding TO instead of reset, the interrupt will not occur again. The interruption will continue to occur in this manner until the temperature drops.
Setting THYST below will set the temperature sensor 1 SMI to interrupt mode. The following are two interrupt modes, selected by Bank0 Index 4Ch bit5:
(2) Two-interrupt mode If the previous interrupt is reset by reading all the interrupt status registers, the temperature exceeding THYST causes an interrupt, and then the temperature is lower than THYST also causes an interrupt. Once an interrupt event has occurred, then reset, if the temperature remains above THYST, the interrupt will not occur.
(3) An interrupt mode where the temperature exceeds the temperature will cause an interrupt, and then the temperature is lower than THYST will not cause an interrupt. Once an interrupt event occurs by exceeding TO and then falling below THYST, no further interrupt will occur until the temperature exceeds TO.

The temperature sensor 2 (CPUTIN) and sensor 3 (AUXTIN) SMI# interrupt has two modes It is programmed on Bank0 Index 4Ch.bit 6.
(1) Comparator interrupt mode over temperature causes an interrupt, which will be reset by reading all interrupt status registers. Once an interrupt event occurs, it exceeds and then resets, and if the temperature remains above THYST, the interrupt will reoccur when the next conversion is complete. If the interrupt event occurs by exceeding TO instead of reset, the interrupt will not occur again. Interruptions will continue to occur in this manner until the temperature falls below THYST.
(2) Two-interrupt mode If the previous interrupt is reset by reading all the interrupt status registers, the temperature exceeding THYST causes an interrupt, and then the temperature is lower than THYST also causes an interrupt. Once an interrupt event has occurred, then reset, if the temperature remains above THYST, the interrupt will not occur.

OVT# interrupt mode
The HMai SMIai/OVTai pin (pin 5) is a multi-function pin. This function is selected at Bit 6 of Configuration Register CR[29h]. The OVT mode selection bits are located in Bank0 Index18h bit4, Bank1 Index 52h bit1 and Bank2 Index 52h bit1.
(1) Comparator mode:
Exceeding the temperature will cause the OVT output to activate until the temperature falls below THYST.
(2) Interrupt Mode Over temperature will cause the OVT output to activate indefinitely until reset by reading the temperature sensor register. Temperatures above to, then OVT reset, then temperature below THYST also cause OVT to activate indefinitely until reset by reading the temperature sensor register. Once the OVT is activated by exceeding TO, then reset, if the temperature remains above THYST, the OVT will not activate again.