Treatment

L6591 is equipped with a comparative device, which has an external non -reversing input at the tube foot DIS (#2). When the voltage is 4.5 V, when the pins exceed the internal threshold, the integrated circuit immediately turn off the low value consumption. The information is locked, and it is necessary to make the voltage on the VCC pin below the reset and lock and restart the UVLO threshold of the IC. Keep the supply time inverter connected to the input power supply, and the high -voltage generator regularly start VCC to oscillate between the starting threshold VCCON and VCCON -1 V. Then you need to disconnect the connection between the converter and the input source to restart the IC. This action is shown in the timing diagram of Figure 12. To activate high -voltage power generation opportunities in this way, the power consumption is about 3 (compared with continuous situations and the peak silicon temperature is close to the average.

This function can pass the following functions that can be passed below. The method can easily realize the atresia overheating protector to biases from VREF, where the upper resistance is physical in a physics, such as MOSFET, secondary diodes or transformers. Voltage and transmission of voltage conditions through optocoupler.

oscillator and dead zone programming

oscillator uses resistance-capacitor network (RT, CT) to perform external programming from the pin OSC (# 电# 5) Connect to VREF (#6) and ground. Once you select the frequency of the oscillator and the required dead zone time, the value of RT and CT can be calculated formulas:

] After selecting the commercial value of RT and CT, the oscillator frequency (FOSC) can use the following formulas for good approximation:

The negative gradient of the jagged waves in the jagged waves During the process, the clock pulse was released. A T trigger, separated the strange clock pulse along the logical circuit. The incident is first of all. MOSFET closed (low -side MOSFET opens time TD after death) responding to the control circuit; the work of overloading for overload comparators or in the case of opening control Time. In this way, the maximum duty cycle will be limited to less than 50%, and the operating frequency of the inverter is an oscillator. To be precise, refer to the waveform in Figure 15, where the TSW u003d 2/FOSC can achieve maximum duty cycle ratio can be achieved For:

At the beginning, the first clock pulse will open the low -side MOSFET 10 oscillator cycle to charge the self -raising capacitor, and the high -voltage side MOSFET will be connected. IC resumes switches during the operation period, and the first clock pulse will be at a low endOpen the MOSFET to charge the self -raising capacitor first, and then the high -voltage side MOSFET will be connected after the second clock pulse. In this way, self -raising capacitors will always be charged to provide high -voltage side floating drives. The oscillator waveform is also as shown in Figure 15. The dead zone TD is equal to the duration of the negative slope of the oscillator wavetooth wave, plus the internal delay of 125ns; therefore it depends on the timing capacitor CT and resistor RT and the approximity relationship:

The smallest TD value has an internal limit of 325 nan seconds to ensure that there is no danger to generate shooting conditions, but it is recommended not to use the capacitor value below 220 PF.

Adaptive UVLO

Optimized converter to achieve the minimum empty load consumption time is that under these conditions, the voltage generated by the system itself will be Significantly decreased or even more than a few millia live loads. This usually leads to the decrease of the power voltage VCC of the IC and below the UVLO threshold of the controller, so that the operation becomes intermittent, which is unpopular. The lower UVLO threshold will be helpful, but it may also be closed with a sufficient grille driver voltage under large load. In order to help designers overcome this problem, in addition to reducing their own consumption during emergency mode operation, L6591 also has a proprietary adaptive UVLO function. It includes moving the UVLO threshold under the light load, that is, the voltage at the pin compensation is lower than the internal fixed threshold VCompl to provide a larger net empty. Prevent the UVLO threshold from minimum to maximum load (higher) UVLO threshold at the pin voltage of the pins exceeds VCompl (with some MV lags), and VCC has exceeded the normal value UVLO threshold (see Figure 16). Normal UVLO thresholds ensure that the heavy load condition MOSFET will be driven by proper gate voltage.

Line induction function

When the input voltage of the converter is lower than the specified range and let it restart, the voltage returns to this range. I feel that the voltage can be a rectifier and filtering voltage. In this case, the function will be used as a power -off protection, or in the system with the front end of the PFC pre -regulator, the output PFC -level volt This function will be sorted as power -powered and power -off. The shutdown of the L6591 input is through the internal comparator. As shown in Figure 17, the non -counter -phase input is used at the foot (#1). Internal reference of the comparator 1.25 V If the voltage on the line pins is lower than the internal reference voltage, IC will be disabled. In these cases, the soft start discharge, the pfC U stopped opening, and the amount of integrated circuit is reduced. When the voltage on the needle is higher than the reference. The comparator provides current lag, not more common voltage lag: as long as the line pin is lower than the reference value, if the voltage is highAt the reference value, it is disconnected.

This method provides additional freedom: you can choose the outer partition (see below) by proper selection. On the contrary, the fixed threshold is fixed automatically according to the built -in stagnation of the comparator. For Figure 17, you can establish the following relationship input voltage (VINON) and OFF (vinoff) threshold for ON:

When the circuit is not activated, start the generator to continue working to work , But there is no PWM activity, so the VCC voltage starts with the UVLO threshold, as shown in the timing diagram of FIG. 17. When the device is running, the line pins are a high impedance input that connects to the value resistance, so it is easy to pick up noise, which may change the reason why the closing threshold or IC is accidentally closed during the ESD test. Can bypass the pin with a small film capacitor (such as 1-10 NF) to prevent any such faults. If this function is not used, the pin must be connected to the VREF pin (#6) in the range of 10 to 100 k u0026#8486;
When the device starts, the capacitor (CSS) connected between the SS pin (#4) and the ground is the ISS1 of the internal current generator ISS1, from zero to about 2 volts. During this slope, the current setting point gradually increased from zero to the final value (0.8 V). The time required to reach the stable value of the current setting point is called the soft start time, which is about:

During the slope, the MOSFET duty cycle gradually increases , To control the starting flow. In addition, the function of all monitoring pin compensation voltage is disabled. When the control voltage is saturated, the soft starting pin is also called, which reveals the opening condition of the feedback system. This situation often occurs during startup, but it may also cause overload/short circuit caused by the control loop failure or converter. When the feedback circuit fails, the system must be quickly stopped to prevent the output voltage from reaching the high value, and the overload or short circuit will not occur. Generally, it takes such fast intervention to intervene Essence L6591 makes it easier to deal with such conditions: removing 2 V clamps on SS, and the second internal current generator ISS2 u003d ISS1/4 Continue to charge CSS. If the voltage reaches 5 V, the IC will be disabled (if allowed) to reach 2VBE exceeds 5V, and IC will be locked. In the previous case, the results will be the same as the short -circuit situation shown in Figure 11; in the latter case, the result will be the same as Figure 12. The delay before the overload stops is: If the overload disappears before the SS voltage reaches 5 V, the ISS2 generator will be turned off, and the voltage will gradually decrease.As low as 2V.A diode, anode and SS pin, and the cathode allowing designers to be connected to the VREF pin (#6) to select one of the automatic restart mode or lock mode behavior of one of them. If the converter also needs to be locking mode in short circuit, make sure that the power supply will never be lower than the UVLO threshold before activating the lock. Figure 18 shows the behavior of the soft starting pin under different operation conditions. FIG. 17 shows the use of L6563 PFC controller combined with the typical high -power adapter application of L6591. L6591 power management function overview It can be seen that the device has a variety of power management functions: different operating modes of load conditions, protection functions, and interaction with PFC pre -regulators. In order to help designers familiarize themselves with these functions, the results of all themes and their respective activation mechanisms and the most important feet are summarized below. This is not only useful for correct use but also for diagnosis: especially in the prototype/debugging phase, it is common to encounter some unnecessary functional activation. These tables can be used as a fast fault exclusion guide. 1. Use an external diode from SS (#14) to VREF (#10), cathode to VREF. 2. As long as the IC is powered on, the condition is locked; the high -voltage generator is not called. 3. Unless there are other regulations, all values u200bu200bare typical values. It is worth reminding that ""automatic restart"" means that the device will intermittent work as long as the intermittent work is not eliminated due to the condition that the function is activated, ""lock"" means that as long as the device is connected to the input power and device, the device will stop running and disconnect with the power supply. For a period of time, the device (and device) can be restarted.