L6591 ZVS Half ...

  • 2022-09-15 14:32:14

L6591 ZVS Half Bridge PWM Controller (1)

Features

Soft switch complementary PWM control

Able to program dead zone semi -bridge

The operating frequency is as high as 500 kHz

Vehicle high -voltage start

Advanced light load management

Adaptive UVLO

Pulse OCP

OLP (locking or automatic restart)

Transformer saturation test [123 ]

The interface of the PFC controller

The disabled input

Power -powered order or power off input

Protect

Able to soft start

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4%precision external reference

600 V -shaped rail compatible high -voltage side gate drive

Integrated self -lifting diode and high DV/DT

[ 123]SO16N包

应用

大功率AC-DC适配器/充电器

台式PC,入门级服务器

电信SMPS

[ 123]

Device description

L6591 is a two -terminal PWM controller topological structure dedicated to soft switch semi -bridge. It provides complementary PWM controls, where the high-voltage side switch is driven to the low-voltage side switch of the duty cycle D and the duty cycle to 1-D, and the D is 50%. The outside is turned off in one switch and the other guaranteed soft switch and high -frequency operation. In order to drive the high -voltage side switch by self -lifting method, the integrated circuit contains a high -voltage floating structure that can withstand a synchronous driver with a synchronous driver of more than 600 volts. The IC enables designers to program through an external programming oscillator: the maximum duty cycle is triggers, so that the operating frequency will be half of the oscillator. Under a very light load, the integrated circuit enters the controlling emergencies operation, and the built -in non -consuming high -voltage startup circuit and low static current will help maintain low power consumption and meet the recommendations of energy conservation. The two -stage power factor correction system meets these standards, providing an interface with the PFC controller, which can turn off the pre -regulator between a pulse and the next pulse. Innovative adaptive UVLO helps the self -powered voltage of the output load due to the parasitic of the transformer. The protection function of the integrated circuit includes: not locking input input, Brownout, OCP with a delayed shutdown function in the first level, the protection system conditions (can be automatically restarted or lock mode) and the second level OCP during overload and short circuit. When the transformer is saturated or one of the secondary diodes, the IC is locked. Finally, the lock -up disable function allows simple implementation of OTP or OVP. Current sensor input pin can be programmed softStart with the edge of the digital front edge to complete the integrated circuit.

Electric characteristics

(TJ u003d 0 to 105 ° C, vcc u003d 15 v, vBoot u003d 12 v, chvg u003d clvg u003d 1 nf; RT; RT u003d 22 k , CT u003d 330 PF; unless there are other regulations)

Electric characteristics (continued)

(tj u003d 0 to 105 ° C, VCC u003d 15 V, VBOOT u003d 12 V, CHVG u003d CLVG u003d 1 NF; RT u003d 22 K , CT u003d 330 PF; unless there are other regulations)

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[ 123] Electric characteristics (continued)

(TJ u003d 0 to 105 ° C, VCC u003d 15 V, vBoot u003d 12 V, chvg u003d clvg u003d 1 nf; RT u003d 22 k , CT u003d 330 pf; Unless there are other regulations)

1. The parameters when tracking each other

2. The parameters when tracking each other

3. 3. Design guarantee parameter

Application information

L6591 is an advanced current mode PWM controller, which is specially used in the ZVS semi -bridge converter dedicated to fixed frequency and peak current mode control. Among these converters, the switch (MOSFET) uses a complementary duty occupation ratio: high-sided MOSFET is driven to the duty ratio D, and the low-pressure side MOSFET is connected to ensure the maximum allowable to allow the maximum allowance to occupy the duty duty kitchen The ratio must be limited to less than 50%. The opening of an external programming dead zone TD switch between an external programmable dead area was inserted between a MOSFET off -cut off, which achieved high -frequency high -efficiency and low -electromagnetic interference emissions. For more information about how to program TD, see Page 19 Section 5.6: oscillator and dead zone time programming. This device can work in different modes (Figure 4), depending on the converter's

load conditions:

1. Fixed the frequency during heavy load. A relaxation oscillator, an external programmable capacitor and resistor generate jagged edge on the semi -decreased edge. In this area, the low -side MOSFET is opened by the clock signal and the high -side MOSFET's even pulse after delay; the high side MOSFET is closed. After the delay, the low side MOSFET is closed and opened to respond to the control loop.

2. There is no load or a very light load. When the load is very light or disconnected, the converter will enter the controlled open/off operation and have a fixed duty cycle. When a series of switching cycles are separated by a long cycle, MOSFET is in a closed state. ButLater, the decrease in load will be converted to a reduced frequency, and it can even be reduced to hundreds of Hertz, so that all loss -related losses are made, making it easier to meet the requirements of energy -saving requirements. Because the peak current is very low, noise will not occur.

High -voltage startup generator

FIG. 5 shows the internal schematic diagram of the high -voltage startup generator (high -voltage generator). It consists of a high -voltage N ditch effect transistor, and its gate consists of a 15mw -watt resistor bias, and the temperature compensation current generator is connected to the power supply. Referring to the timing chart in Figure 6, the voltage on the large -capacity capacitor (VIN) of the converter for the first time gradually increases. When the voltage reaches 80 V, the high -voltage generator can run Consumption is about 1 millimeter. Due to the decrease in the consumption of integrated circuits, the cross -road capacitor connected between the tube is charged VCC (9) grounding, making its voltage almost linearly increase. When the VCC voltage reaches the starting threshold (13.5 V typical values), IC starts to work, and the high -voltage generator is asserted to be cut off as a high -level VCC_OK signal. IC is energy stored in VCC capacitors until the self -supply circuit generates high voltage and sufficient surgery. The remaining consumption of this circuit is 15 mcwage resistance (about 10 mv under 400 volt voltage). Under the same conditions, it is usually 50-70 times lower. Essence

Once the input voltage is turned off, the system will lose the low peak current or maximum duty cycle limit limit. trigger. The VCC will then drop when the IC is lower than the UVLO threshold (10.5V typical value), and the IC activity is stopped. When the VCC_OK signal When the VCC voltage is lower than the threshold of about 5 V vcrest, the high -voltage generator can be canceled now. The machine is banned. This will prevent the converter from re -start and ensure that the output voltage is monotonous attenuation during power off. The low -resolution threshold VCREST ensures that during the short circuit, the repetition rate of trying L6591 is very low. As shown in the sequential diagram of Figure 7, the converter will work safely with extremely low power throughput. When calling IC to ensure that the real lock is closed. For more details, see the ""locking shutdown"" section.

FIG. 7. Show the timing chart of short -circuit behavior (stainless steel sales are below 5 V)

When the PWM control voltage is lower than the threshold of 1.75 V, the IC MOSFET on the high -voltage side and the low -voltage side MOSFET is kept by the disabled oscillator when the state is closedIt is a great reduction in static consumption to minimize VCC capacitors. Due to the feedback reaction of energy, the control voltage will now increase transmission stop. When the voltage exceeds 1.82 V, the IC will restart the switch. After a while, the control voltage will drop again to respond to the outbreak of energy explosion and stop integrated circuits. In this way, the converter will work in an emergency mode of almost constant peak current. Further load reduction will lead to a decrease in frequency, and it will even drop to less than 100 Hz, thereby minimizing all loss -related losses and making it easier to comply with energy -saving regulations. The timing diagram of FIG. 8 illustrates this situation and shows the most important signal. If it is necessary to reduce the intervention threshold of the emergencies operation, it can be shown in Figure 9 to add a small DC offset to the feet of the current influenza.

Note: The offset reduces the available dynamics of the current signal; therefore, when the value is determined, the offset must be considered when the sensing resistance is determined.

Even if the power factor correction can help the designer meet the energy conservation requirements. In the system, the PFC pre-adjustator is first in the DC-DC converter, L6591 allows this to allow this way like this The PFC pre -adjuser can be turned off during the operation of the emergency mode, thereby eliminating the empty load consumption (0.5 ÷ 1W) at this stage. This does not have compliance issues, because the provisions of the low -frequency harmonic launch in electromagnetic compatibility regulations refer to the rated load and do not restrict the concept of light load or empty load running. To this end, L6591 provides PFC_STOP (#8) pin: It is an open set output, often open. During the operation of the emergency mode, when IC is free, it is assertive to be low. This signal will be used to turn off the PFC controller and the pre -regulator AS as shown in Figure 10. When the L6591 is in UVLO, the pin is kept open to make the PFC controller start first.

PWM control block

This device is specifically used for secondary feedback. Generally speaking, there is a TL431 side and optocoupler on the secondary side, which transmits the output voltage information to the first side and passes through the isolation grid. PWM control input (pin 7, COMP) is driven directly by the collector electrode (emitted pole ground) of the photoelectric transistor to adjust the duty cycle. It is recommended to place a small filter capacitor between the pin and GND (#11), such as as much as possible to reduce the picker of the switching noise as much as possible, and set a pole point to control the transmission function at the output end.

PWM comparator, PWM locks and HICCUP mode OCP

PWM comparator detects the resistance (RS) and the voltage on the pins (#7) is exported The programming signal is compared to determine the exact time of the high -voltage side MOSFET. The pulse width tuning lock avoids fake switches caused by noise (""double pulse suppression""). The second comparative sensor sensor current influenza inputs is turned off and the IC is turned off. If the voltage at the pin of the pin exceeds 1.5 V,This abnormal situation is usually generated by a short -circuit or secondary winding short -circuit or saturated transformer in a secondary rectifier. As long as the IC power supply is powered, this situation will be locked; if the IC is powered by the external power supply, the power is required to restart the integrated circuit. In order to distinguish the actual failure and interference (for example, caused by the ESD test), the protective circuit entered the ""warning status"" when the comparator first tripped. If the next switching cycle comparator does not trip, it is assumed that temporary interference protection logic will be reset in a idle state; if the comparator jumps again, assuming the failure, L6591 will stop. If the device is self -powered, there is no energy from the self -power supply circuit, then the voltage on the VCC capacitor will be attenuated after a period of time and exceed the UVLO threshold to open the door. The internal startup of the generator is still closed, and then the VCC voltage still needs to be restarted below its restart voltage before the VCC capacitor and IC recharge. In the end, any of the above failures will lead to low -frequency intermittent operation (HICCUP mode operation), and the stress of the power circuit is extremely low. The timing chart in Figure 11 illustrates this operation.