The UC1842 /3/4/5 family of controls are optimized for off-line and DC-DC, providing the converter with the necessary features to implement off-line or DC-DC fixed frequency current mode control, low start-up current (<1mA) solution with a minimum number of external parts. Automatic feed-forward compensation Internally implemented circuitry includes undervoltage, pulse-by-pulse current limit lockout, start-up current less than 1 mA, fine-tuned accuracy on error, enhanced load response characteristics, amplifier input, logic to ensure lockout operation, a band A low-voltage lockout device for a hysteretic comparator that also provides current-limit control, double-pulse rejection, and a totem pole output stage for sourcing or sinking high peak currents. The output stage, suitable for high current totem pole outputs driving N-channel MOSFETs, is low in the off state. The in-band bandgap reference difference between this internal member is 500 kHz operation over the voltage lock threshold and the maximum duty cycle low RO error amplifier period. The UC1842 and UC1844 have UVLO thresholds of 16 VON and 10 VOFF, making them ideal for offline applications. The corresponding thresholds for UC1843 and UC1845 are 8.4 V and 7.6 V, respectively. The UC1842 and UC1843 can operate to a duty cycle close to 100 %. The UC1844 and UC1845 achieve a 0 to 50% range by adding an internal flip-flop that clears the output every other clock cycle.

The high peak currents associated with capacitive loads require careful grounding techniques. Timing and bypas capacitors should be connected to ground at a single point close to 5. A transistor and 5k potentiometer are used to sample the oscillator waveform and apply an adjustable ramp to battery 3.

Shutdown Technology

Shutdown of the UC1842 can be done in two ways: by raising pin 3 above 1V, or pulling pin 1 below ground by two diodes. Either method will cause the output of the PWM comparator to be too high (see block diagram). The PWM latch is in a reset dominant state, so the output will remain low until the next clock cycle after the shutdown condition at pins 1 and/or 3 is removed. In one example, an external lockout shutdown can be achieved by adding an SCR that will reset by cycling VCC below the UVLO threshold.

Offline Flyback Regulator

Input voltage 0.5VAC to 130VA (50 Hz/60 Hz)2. Line isolation: 3750 V 3. Switching frequency: 40 towers. The full load efficiency is 70%5. Output Voltage: a.+V,';a to 4A to 4A to Ripple Tear Resistance: 50 mP-PPPP.Max +V,'-11 11-1-1-1-1-1-1-1 -1-CCPPCPCP.
A small portion of the oscillator ramp can be resisted with a current signal to provide slope compensation for converters with a duty cycle greater than 50%.