feature

Single-chip solution with internal oscillator and voltage reference; no adjustment required; insensitive to sensor zero voltage; insensitive to primary to secondary phase shifts; DC output proportional to position; 20 Hz to 20 kHz frequency range; single Mains or dual supply operation; monopolar or bipolar output; will operate a remote LVDT at altitudes of 300 feet; position output can drive cables up to 1000 feet; will also connect to RVDTs; excellent performance; linearity: 0.05 of FS max %; Output Voltage: 11V min6; Gain Drift: 50 ppm/C FS max8; Offset Drift: 50 ppm/C FS max8.

Product Description

The AD598 is a complete monolithic linear variable differential transformer (LVDT) signal conditioning subsystem. It is used in conjunction with LVDTs to convert the mechanical position of the sensor to a unipolar or bipolar DC voltage with high accuracy and repeatability. All circuit functions are contained in the chip. By adding some external passive components to set the frequency and gain, the AD598 converts the raw LVDT secondary output to a scaled DC signal. The device can also be used with RVDT sensors.

The AD598 contains a low distortion sine wave oscillator to drive the LVDT main circuit. The LVDT secondary output consists of two sine waves that directly drive the AD598. The AD598 operates on these two signals, dividing their difference by their sum, producing a scaled unipolar or bipolar DC output.

The AD598 uses a unique ratiometric structure (patent pending) to eliminate some of the disadvantages associated with traditional LVDT interface methods. The advantages of this new circuit are: no adjustment required, zero voltage transformer and primary-to-secondary phase shift without affecting system accuracy, improved temperature stability, and improved sensor interchangeability.

The AD598 is available in two performance grades:

Also machined to MIL-STD-883B, military range -55°C to +125°C.

Product Highlights

1. AD598 provides a total solution to LVDT and rvdt signal conditioning problems; few additional passive components are required to complete the conversion from mechanical position to DC voltage, and no adjustment is required.

2. The AD598 can be used with many different types of LVTDs because the circuit can accommodate a wide range of input and output voltages and frequencies; the AD598 can drive LVDT primary circuits up to 24 V rms and accept secondary as low as 100 mV rms input level.

3. The LVDT excitation frequency from 20 Hz to 20 kHz is determined by an external capacitor. The AD598 input signal does not need to be synchronized with the LVDT master driver. This means that an external primary excitation can be used, such as a 400 Hz power supply in an aircraft.

4. The AD598 adopts a ratio decoding scheme, so that the first-to-second phase shift and sensor zero voltage have no effect on the overall circuit performance.

5. As long as the power consumption limit is not exceeded, one AD598 can drive multiple LVDTs, which can be plug-in or parallel. The excitation output is thermally protected.

6. The AD598 can be used in telemetry applications or in hostile environments where the interface electronics may be far from the LVDT. The AD598 can be at the end of 300 feet of cable because the circuit is not affected by phase shift or absolute signal volume. The position output can drive up to 1000 feet of cable.

7. AD598 can be used as loop integrator in simple electromechanical servo loop design.

AD598 – Typical Characteristics (at +25C and VS=15V unless otherwise noted)

theory of operation

Figure 5 shows the block diagram of the AD598 and the LVDT (Linear Variable Differential Transformer) connected to its input. LVDT is an electromechanical sensor whose input is the mechanical displacement of the magnetic core and the output is a pair of AC voltages proportional to the position of the magnetic core. The sensor consists of a primary winding consisting of an external sine wave reference source, two secondary windings connected in series, and a movable magnetic core that couples magnetic flux between the primary and secondary windings.

The AD598 energizes the LVDT primary side, senses the LVDT secondary side output voltage, and produces a DC output voltage proportional to the core position. The AD598 consists of a sine wave oscillator and power amplifier to drive the main circuit, a decoder to determine the ratio of the difference between the LVDT secondary voltages divided by their sum, a filter and an output amplifier.

The oscillator includes a multivibrator that produces a three-wave output. The three waves drive a sine shaper, producing a low distortion sine wave whose frequency is determined by a capacitor. The output frequency range is 20 Hz to 20 kHz and the amplitude range is 2 Vrms to 24 Vrms. Total harmonic distortion is typically -50dB.

The output on the secondary side of an LVDT consists of a pair of sine waves whose amplitude difference (VA–VB) is proportional to the core position. Previous LVDT regulators synchronously detected this amplitude difference and converted its absolute value into a voltage proportional to position. This technique uses the primary excitation voltage as the phase reference to determine the polarity of the output voltage. There are a number of issues associated with this technique, such as (1) generating a constant amplitude, constant frequency excitation signal, (2) compensating for LVDT primary to secondary phase shifts, and (3) compensating for these shifts as a function of temperature and frequency.

AD598 eliminates all these problems. The AD598 does not require constant amplitude because it operates on the ratio of the difference and sum of the LVDT output signals. A constant frequency signal is not required because the input is rectified and only the sine wave carrier amplitude is processed. Since synchronization detection is not used, the phase shift between the main excitation and the LVDT output is insensitive. The ratio principle on which the AD598 operates requires that the sum of the LVDT secondary voltages and the LVDT stroke length remain constant. While LVDT manufacturers generally do not specify the relationship between VA+VB and stroke length, it is recognized that some LVDTs do not meet this requirement. Nonlinearity arises in these cases. However, most of the available lvdts actually meet these requirements.

AD598 adopts special decoding circuit. Referring to the block diagram below and Figure 6, the loop is calculated using an implicit simulation. After correction, the A and B signals are multiplied by the complementary duty cycle signals d and (Id), respectively. These processed signals are integrated and sampled by comparators. The output of this comparator defines the original duty cycle d, which is fed back to the multiplier. As shown in Figure 6, the input to the integrator is [(A+B)d]B.

Since the integrator input is forced to 0, the duty cycle d=B/(A+B). The output comparator producing d=B/(A+B) also controls the output amplifier driven by the reference current. The duty cycle signals d and (1-d) modulate the reference current individually, as shown in Figure 6, and these modulations add up. The sum of the output currents is IREF×(1–2d).

Since d=B/(A+B), the output current by replacement is equal to IREF×(AB)/(A+B). This output current is then filtered and converted to a voltage as it is forced through scaling resistor R2, thus:

Connect AD598

As shown in Figures 7 and 12, the AD598 can be easily connected for dual-supply or single-supply operation. The following general design procedure demonstrates how to select external component values and can be used with any LVDT that meets the AD598 input/output criteria.

Parameters set by external passive components include: excitation frequency and amplitude, AD598 system bandwidth, and scale factor (V/inch). In addition, optional functions, offset zero adjustment, filtering, and signal integration are available by adding external components.

AD598 Design Program Dual Supply Operation

Figure 7 shows the connection method for dual ±15V supplies and a Schaevitz E100 LVDT. This design process can also be used to select component values for other lvdts. Steps 1 through 10 outline the process as follows:

1. Determine the mechanical bandwidth required by the LVD position measurement subsystem F subsystem. For this example, assume fSUBSYSTEM=250 Hz.

2. Select the minimum LVDT excitation frequency, approximately 10 × F subsystem. Therefore, let the excitation frequency = 2.5 kHz.

3. Choose a suitable LVDT, it will work at the excitation frequency of 2.5khz. For example, the Schaevitz E100 will operate in the 50 Hz to 10 kHz range and is a good candidate for this example.

4. Determine the sum of the LVDT secondary voltages VA and VB. Power up the LVDT at its typical driver stage VPRI as indicated on the manufacturer's datasheet (3 V rms for the E100). Set the core displacement to its center position, where VA=VB. Measure these values and calculate their sum VA+VB. For E100, VA+VB=2.70 V rms. This calculation will be used later when determining the AD598 output voltage.

5. Determine the optimal LVDT excitation voltage VEXC. When the LVDT is powered up at its typical drive level VPRI, set the core displacement to its mechanical full-scale position and measure the output VSEC of the secondary device producing the maximum signal. Calculate the LVDT voltage transformation ratio VTR. Vertical velocity = V pre/post sec, for E100, VSEC = 1.71 V rms for VPRI = 3 V rms. VTR=1.75.

The AD598 signal input, VSEC, should be in the range of 1 V rms to 3.5 V rms for maximum AD598 linearity and minimum noise sensitivity. Choose VSEC=3 Vrms. Therefore, the LVDT excitation voltage VEXC should be:

Check the supply voltage to verify that the peaks of VA and VB are at least 2.5 volts lower than the voltages at +VS and –VS.

6. Referring to Figure 7, for VS=±15v, select the value of the amplitude determination component R1 as shown in the curve in Figure 8.

7. Select the excitation frequency determination component C1.

8. C2, C3, and C4 are functions of the required bandwidth AD598 position measurement subsystem. They should be nominally equal.

C2 = C3 = C4 = 10–4 Farad Hz/fSUBSYSTEM (Hz)

If the desired system bandwidth is 250 Hz, then C2 = C3 = C4 = 10–4 Farad Hz/250 Hz = 0.4 μF For more information, see Figures 13, 14, and 15AD598 bandwidth and phase characteristics.

9. In order to calculate R2, which sets the gain or full-scale output range of the AD598, several pieces of information are required:

a. LVDT sensitivity;

b. Full-scale core displacement, d;

c. The ratio of the manufacturer's recommended primary drive level, calculated in step 4, from VPRI to (VA+VB).

LVDT sensitivity is listed in the LVDT manufacturer's catalog in units of millivolts per inch of input voltage output instead. The sensitivity of the E100 is 2.4 mV/V/mil.

If the LVDT sensitivity is not given by the manufacturer, it can be calculated. See the Determining LVDT Sensitivity section.

For a full-scale displacement of d inches, the voltage beyond the AD598 is calculated as:

VOUT is measured against the signal reference (pin 17 shown in Figure 7). Solving for R2,

Note that VPRI is the same signal level used to determine (VA+VB) in step 4.

For VOUT=20 V full-scale range (±10 V) and d=0.2 inch full-scale displacement (±0.1 inch),

In the above example, VOUT is a function of displacement, as shown in Figure 9.

10. Selection of R3 and R4 allows positive or negative output voltage offset adjustment.

*These values have a tolerance of ±20%.

For no offset adjustment, R3 and R4 should be left open.

To design a circuit that produces a 0 V to +10 V output with a displacement of ±0.1 inches, set VOUT to +10 V, d=0.2 inches, and solve equation (1) for R2. R2 = 37.6 kΩ

This will produce the response shown in Figure 10.

In equation (2), set VOS to 5v and solve for R3 and R4. Because a positive offset is required, leave R4 open.

Rearrange the solution of equation (2) and R3:

Figure 11 shows the desired response.

Design Program Single Supply Operation

Figure 12 shows the single-supply connection method.

For single-supply operation, repeat steps 1 through 10 of the dual-supply operation design procedure, then complete additional steps 11 through 14 below. R5, R6 and C5 are additional component values to be determined. VOUT is measured against the signal reference.

11. Calculate the maximum value of R5 and R6 based on the relationship, R5 + R6 ≤ VPS/100 μA

12. The voltage drop on R5 must be greater than

therefore

*These values have a tolerance of ±20%.

Based on the constraints of R5+R6 (step 11) and R5 (step 12), choose an intermediate value R6.

13. The load current through RL returns to the junction of R5 and R6 and flows back to VPS. At maximum load conditions, make sure to define the voltage drop across R5 in step 12. As a final check on the supply voltage, verify that the peak values of VA and VB are at least 2.5 volts lower than the voltages at +VS and –VS.

14. C5 is a bypass capacitor in the range of 0.1 to 1 μF.

Gain-Phase Characteristics

To use LVDTs in closed-loop mechanical servo applications, it is necessary to understand the dynamics of the sensor and interface components. The sensor itself responds very quickly once the core is moved. The kinetics mainly come from interface electronics. Figures 13, 14, and 15 show the frequency response of the AD598 LVDT signal conditioner. Note that Figure 14 and Figure 15 are essentially the same; the difference is the frequency range covered. Figure 14 shows a wider range of mechanical input frequencies at the expense of accuracy. Figure 15 shows a more limited frequency range and improved accuracy. These numbers are transfer functions, the input is seen as a sinusoidally varying mechanical position and the output is seen as a voltage from the AD598; the unit of the transfer function is volts per inch. The values of C2, C3 and C4 in Figure 7 are all equal and specified as parameters in the figure. The response is approximately that of two real poles. However, there is significant overphase at higher frequencies. An additional filter pole can be introduced through R2 via a parallel capacitor (see Figure 7); this also increases the phase lag.

There are tradeoffs when choosing the values of C2, C3, and C4 to set the bandwidth of the system. There is a ripple in the output voltage at the "DC" position, the magnitude of which is determined by the filter capacitor. In general, smaller capacitors will provide higher system bandwidth and more ripple. Figures 16 and 17 show the ripple magnitudes as a function of C2, C3 and C4, again all equal in value. Also note that the parallel capacitor on R2 is shown as a parameter (see Figure 7). The R2 value used was 81 kΩ, Schaevitz E100 LVDT.

Determination of LVDT sensitivity

LVDT sensitivity can be determined by measuring the LVDT secondary voltage as a function of primary driver and core position, and performing simple calculations.

Power up the LVDT at the recommended main drive level, VPRI (3v rms for the E100). Set the core to the midpoint of VA=VB. Set the core displacement to its mechanical full-scale position and measure the secondary voltages VA and VB.

From Figure 18,

Thermal Shutdown and Loading Considerations

The AD598 is protected by thermal overload circuitry. When the mold temperature reaches 165°C, the excitation amplitude of the sine wave gradually decreases, thereby reducing the internal power consumption and temperature.

Due to the ratiometric operation of the decoder circuit, only a small error comes from the reduction of the excitation amplitude. Under these conditions, the signal processing portion of the AD598 continues to meet its output specifications.

The thermal load depends on the voltage and current delivered to the load and the supply voltage. The LVDT primary winding will create an inductive load on the sine wave excitation. The phase angle between the excitation voltage and current must also be considered, complicating thermal calculations.

AD598 – Application

Calibration Ring Scale

Figure 20 shows that an elastic member (steel verification ring) combined with an LVDT provides a means of measuring very small loads. Figure 19 shows the details of the circuit.

The advantage of using a verification ring in conjunction with an LVDT is that no friction is involved between the LVDT's core and coil. This means that the measurement of weight is not confused with friction. This is especially important for very low full size weight applications.

Although it is recognized that this measurement system is best suited for weighing very small weights, this circuit is designed to provide a full-scale output of 10 V for a 500-pound weight using a Morehouse Instruments model 5BT test loop. The LVDT is a Schaevitz type HR050 (±50 mil full scale). Although this LVDT provides ±50 mil full scale, in step 9 of the design procedure, the value of R2 is calculated for d=±30 mil and VOUT equals 10 V.

A 1µF capacitor provides additional filtering, reducing noise caused by mechanical vibration. Other circuit values are calculated in the usual way using the design program.

The scale can be designed to measure tare weight by selecting R3 or R4 (as shown in Figure 7 and Figure 12) to input a bias voltage. The tare weight is the weight of a container, deducted from the gross weight to obtain the net weight.

The value of R3 or R4 can be calculated using one of two different methods. First, the potentiometer can be connected between pins 18 and 19 of the AD598, while the wiper is connected to the –v supply. This produces a small offset of any polarity; this value can be calculated using step 10 of the design procedure. For larger offsets in one direction, replace R3 or R4 with a potentiometer with the wiper connected to the –V supply.

Check the balance's resolution by placing a 100-gram weight on the balance and observing the AD598 output signal deflection on an oscilloscope. The deflection is 4.8mv.

The minimum signal deflection that can be measured on an oscilloscope is 450 microvolts, equivalent to a 10-gram weight. This 450 microvolt signal corresponds to an LVDT displacement of 1.32 microinches, which is one tenth the wavelength of blue light.

The test ring used in this circuit has a temperature coefficient of 250 ppm/°C due to the Young's modulus of steel. The scale can be temperature compensated by placing a resistor with a temperature coefficient of R2. Since the steel of the test ring softens at higher temperatures, the deflection for a given force is greater, so a resistor with a negative temperature coefficient is required.

Synchronous operation of multiple LVDTS

In many applications, such as multi-measurement measurements, a large number of LVDTs are used in close physical proximity. If these lvdts are operating at similar carrier frequencies, stray magnetic coupling may produce beat frequencies. The resulting beat notes interfere with the accuracy of measurements made under these conditions. To avoid this, all lvdts operate synchronously.

The circuit shown in Figure 21 has a master oscillator and any number of slave oscillators. The main AD598 oscillator uses steps 6 and 7 in the design process to program its frequency and amplitude through R1 and C2 in the usual way. Pins 6 and 7 of the slave AD598s are tied together to disable its internal oscillator. Pins 4 and 5 of each slave are connected to pins 2 and 3 of the master through a 15 kΩ resistor, thereby setting the slave's amplitude equal to that of the master. If a different amplitude is required, the 15 kΩ resistor value should be changed. Note that the amplitude scales linearly with the resistance value. The 15 kΩ value was chosen because it matches the nominal value of the resistors inside the circuit. There is a 20% tolerance between the slave amplitudes due to the different internal resistance values, but this does not affect the operation of the circuit.

Note that each LVDT main circuit is driven by its own power amplifier, so the thermal load is shared among the AD598s. Since each slave circuit provides a 30 kΩ load to the master AD598 power amplifier, there is virtually no limit to the number of slave circuits in this circuit. For a very large number of slaves (eg 100 or more), the maximum output current drawn from the master AD598 power amplifier may need to be considered.

High Resolution Position-Frequency Circuit

In the circuit shown in Figure 22, the AD598 is combined with the AD652 voltage-to-frequency (V/F) converter to produce an efficient, simple data converter capable of high-resolution measurements.

This circuit transfers the signal from the LVDT to the V/F converter in the form of a current, thereby eliminating the error usually caused by the bias voltage of the V/F converter. In such circuits, the bias voltage of the V/F converter is usually the largest source of error. Converts the analog input signal to the AD652 into a digital frequency output pulse that can be counted in a simple digital way.

This circuit is especially useful if the location to be measured has a large degree of mechanical vibration (hum). Hum can be completely rejected by counting digital frequency pulses over a gate time (fixed period) equal to a multiple of the hum period. To completely eliminate the effects of hum, the hum must be a periodic signal.

The V/F converter is currently set for unipolar operation. The AD652 datasheet explains how to set up bipolar operation. Note that when the LVDT core is centered, the output frequency is zero. When the LVDT core is off-center, on one side, the frequency increases to the full-scale value. To introduce bipolar operation into this circuit, an offset must be introduced at the LVDT, as shown in step 10 of the design procedure.

Low cost set point controller

A low-cost setpoint controller can be implemented using the circuit shown in Figure 23. Such circuits may be used in automotive fuel control systems. Potentiometer P1 is mounted on the accelerator pedal and LVDT is mounted on the butterfly valve of the fuel injection system or carburetor. The position of the butterfly valve is electronically controlled by the position of the accelerator pedal, eliminating the need for a mechanical linkage.

This circuit is a simple dual IC closed loop servo controller. It's simple because the LVDT circuit acts as a loop integrator. By placing a capacitor in the feedback path (usually occupied by R2), the output signal from the AD598 corresponds to the time-integrated position of the LVDT measurement. The LVDT position signal is summed with the offset signal introduced by potentiometer P1. Because this sum is integral, it must be forced to zero. Therefore, the LVDT position is forced to follow the value of the input potentiometer P1. The output signal from the AD598 drives the LM675 power amplifier, which in turn drives the solenoid valve.

The circuit has the dual advantages of low cost and high precision. The result of high accuracy is the avoidance of offset errors typically associated with converting an LVDT signal to a voltage, which is then integrated.

Mechanical follow-up servo loop

Figure 24 shows how two Schaevitz E100 LVDTs can be combined with two AD598s in a mechanical follower servo loop configuration. One of the LVDTs provides the mechanical input position signal, while the other LVDT simulates motion.

The signal from the input position circuit is fed to the output as a current, thus avoiding voltage offset errors. This current signal is summed with the signal from the output position LVDT; the summed signal is integrated so that the output position is now equal to the input position. This circuit is an efficient way to implement a mechanical servo loop since only three integrated circuits are required.

This circuit is similar to the previous circuit (Figure 23) with one exception: the previous circuit used a potentiometer instead of an LVDT to provide the input position signal. Replacing potentiometers with LVDTs has two advantages. First, in applications where the position input sensor is located in a harsh environment, the added reliability and robustness of the LVDT can be exploited. Second, the mechanical motion of the input and output LVDTs are guaranteed to be the same within the matching range of their respective scale factors. These unique advantages make this circuit an ideal application for hydraulic actuator controllers.

Differential measurement

LVDTs are often used in measurement systems. Two lvdts can be used to measure the thickness or taper of an object. To measure thickness, LVDTs are placed on both sides of the object being measured. LVDTs are positioned so that there is a known maximum distance between fully retracted positions.

This circuit is simple and cheap. It has the advantage that two LVDTs can be driven from one AD598, but the disadvantage is that the scale factors of each LVDT may not match exactly. This causes the workpiece thickness measurement to vary based on its absolute position in the differential probe.

The circuit is designed to produce a ±10v signal output swing consisting of the sum of two independent ±5v swings for each LVDT. The output voltage swing is set to an 80.9 kΩ resistor. The output voltage VOUT of this circuit is given by:

Precision Differential Measurement

The circuit shown in Figure 26 is functionally similar to the differential measurement circuit shown in Figure 25. Contrary to Figure 25, it provides a way to adjust the scale factor of each LVDT independently so that the two scale factors can match.

The two LVDTs are driven in a master-slave configuration, where the output signal from the slave LVDT is the same as the output signal from the master LVDT. The scale factor of the slave LVDT is adjusted with R1 and R2 only. The total scale factor of the master and slave LVDTs is adjusted with R3.

R1 and R2 were chosen as 80.9kΩ resistors to provide a ±10v full-scale output signal for a single Schaevitz E100 LVDT. R3 was chosen to be 40.2 kΩ to provide a ±10 V output signal when the two E100 LVDT output signals are summed. The output voltage of this circuit is given by:

Operation of Half-Bridge Sensors

Although the AD598 is not intended to be used with half-bridge sensors, it can work with degraded performance.

A half-bridge transducer is a commonly used transducer. It works similarly to an LVDT, with two coils wound around a movable magnetic core, and the inductance of each coil is a function of the position of the core.

In the circuit shown in Figure 27, the VA and VB input voltages are developed as two resistor-inductor dividers. If the inductances are equal (ie, the core is centered), the VA and VB input voltages to the AD598 are equal, and the output voltage VOUT is zero. When the core is off-center, the inductances are not equal, resulting in the output voltage VOUT.

The linearity of this circuit depends on the value of the resistors in the resistor-inductor divider. The optimum value may depend on the sensor, so must be chosen by trial and error. The 300Ω resistor in this circuit optimizes the non-linearity of the transfer function to within a few tenths of 1%. This circuit uses the Sangamo AGH1 half-bridge sensor. The 1µF capacitor blocks the DC offset of the excitation output signal. The 4NF capacitor sets the sensor excitation frequency to 10kHz as recommended by the manufacturer.

Alternate Half-Bridge Sensor Circuit

This circuit has similar accuracy issues as the one mentioned in the previous circuit description. In this circuit, the VA signal input to the AD598 is actually a linear function of the core position, while the input signal VB is half the excitation voltage level. However, the aB/a+B transfer function introduces nonlinearity.

The 500Ω resistors in this circuit were chosen to minimize errors caused by the DC bias currents from the VA and VB inputs. Note that in the previous circuit, these bias currents see a very low resistance path to ground through the coil.