feature

Low Noise: 0.2 MV PP 0.1 Hz to 10 Hz; Low Gain TC: 5 ppm max; Low Nonlinearity: 0.001%Max (=G= 1-200 ); High CMRR: 130 DB min ((G= 500 to 1000 ); low input offset voltage: 25mW, maximum input offset voltage; low input offset voltage drive: 0.25mv//8c maximum input offset voltage drive; gain bandwidth product: 25MHz; PIN programmable gain 1, 100, 200, 500, 1000; no external components required; internal compensation.

Product Description

624 -ic/" title="AD624 Product Parameters, Documentation and Source Information" target="_blank">AD624 is a high precision, low noise instrumentation amplifier designed primarily for low level sensors, including load cells, Strain gauge and pressure sensor. A low noise, high gain accuracy, low gain temperature coefficient and high linearity make the AD624 suitable for high resolution data acquisition systems. The AD624C has an input offset voltage drift of less than 0.25 μV/degree Celsius, and an output offset voltage Drift less than 10 µV/°C, unity gain (130 dB at G = 500) and CMRR greater than 80 dB at a maximum nonlinearity of 0.001% at g = 1. In addition to outstanding DC specifications, the AD624 shows Outstanding AC performance too. The 25 MHz gain bandwidth product, 5 V/µs slew rate and 15 µs settling time allow use of the AD624 in high-speed data acquisition applications.

The AD624 does not require any external components to achieve pre-breakline gains of 1100, 200, 500, and 1000. Additional gains such as 250 and 333 can be programmed within 1% with external jumper accuracy. A single external resistor can also be used to set the gain of the 624 to any value in the range of 1 to 10000.

Product Highlights

1. AD624 has excellent noise performance. With an input at 1kHz, the noise is typically less than 4nV/√Hz.

2. AD624 is a full-featured instrument amplifier. Pin programmable gains of 1100, 200, 500 and 1000 are available on-chip. Other gain is through the use of a single external resistor.

3. Offset voltage, offset voltage drift, gain accuracy, and gain temperature coefficient are guaranteed to apply to all preprocessing margins.

4. The AD624 provides completely independent input and output offset zero terminals for high precision applications. This minimizes the effect of bias voltage on the gain range of the application.

5. Provide a sensing terminal that enables the user to pass errors caused by long wires. The reference terminal also allows level shifting at the output.

AD624 – Typical Characteristics

theory of operation

The AD624 is a monolithic instrumentation amplifier that is an improvement over the traditional three-op-amp instrumentation amplifier. Monolithic structures and laser wafer trimming allow for tight matching and tracking of circuit elements, and the level of high performance that can be achieved with this circuit structure.

The preamp section (Q1-Q4) exploits the programmed gain by using the feedback concept. Feedback from the outputs of A1 and A2 forces the collector currents of Q1-Q4 to remain constant, affecting the input voltage of RG.

The gain is set by choosing the value of RG from the equation,

The value of RG also sets the transconductance - as RG is decreased for greater gain, the ance of the input preamp stage gradually increases to the transconductance of the input transistor. This has three important advantages. First, this approach allows the circuit to achieve a very high open-loop gain of 3×108 with a programmed gain of 1000, thereby reducing gain-related errors to a negligible 3ppm. Second, the gain-bandwidth product determined by C3 or C4 and the input transconductance reaches 25MHz. Third, for an RTI noise of 4nv, the input voltage noise is reduced to a value determined by the collector current of the input transistor/√Hz at G ≥ 500.

Enter Notes

Under input overload conditions, the user will see two diode drops (~1.2 V) between RG+100Ω and the positive and negative inputs, in either direction. If the safe overload current is assumed to be 10 mA under all conditions, the maximum overload voltage is ±2.5 V. While the AD624 can withstand this duration, transient overloads of ±10 V will not damage the device. On the other hand, the input must not exceed the supply voltage.

In applications where protection against severe input overload is required, the AD524 should be considered. If this is not possible, an external protection resistor can be added in series with the input of the AD624 to add an internal (50Ω) protection resistor. This will seriously degrade noise performance. For this reason, the values of these resistors should be chosen to be as low as possible and still provide a current limit of 10mA under maximum sustained overload conditions. When choosing the values of these resistors, consider the internal gain setting resistors and the 1.2 volt drop. For example, to protect the device from a continuous differential overload of 20 V at a gain of 100, a 1.9 kΩ resistor is required. The internal gain resistor is 404Ω; the internal protection resistor is 100Ω. As shown in Figure 27, D1 or D2 and Q1 and Q3 or Q2 and Q4 have a 1.2 V drop across the base-emitter junction, requiring an external 1400Ω resistor (700Ω in series with each input). In this case, the RTI noise is:

Input Offset and Output Offset

Voltage offset specifications are often considered an advantage of instrumentation amplifiers. While the initial offset can be adjusted to zero, the shift in the offset voltage due to temperature changes will cause errors. Intelligent systems can usually correct for this factor with an auto-zero cycle, but there are many small-signal high-gain applications that do not have this capability.

Voltage offset and offset drift each have two components: input and output. The input offset is the offset component proportional to the gain, that is, the input offset measured at the output at G=100 is 100 times greater than at G=1. The output ␣ offset is gain independent. At low gains, the output offset drift dominates, and at high gains, the input offset drift dominates. Therefore, the output bias voltage drift is usually specified as the drift at G=1 (input effect is not significant), while the input bias voltage drift is given by the drift specification at high gain (output bias effect is negligible). All ␣ numbers on the input refer to the input (RTI), which means that the ␣ effect on the output is times "G". Voltage offset and power are also specified in one or more gain settings, also RTI.

By separating these errors, the total error can be estimated independently of the gain setting used. In a given gain configuration, the two errors can be combined to give the total error with respect to the input (RTI) or output (RTO) by:

As an illustration, a typical AD624 can have +250µV output ␣ offset and -50µV input offset. In unity gain configuration, ␣ total output bias is 200µV or both. ␣ At a gain of 100, the output offset is -4.75 mV or: +250 μV + 100 (–50 μV) = –4.75 mV.

The AD624 provides input and output offset adjustment. ␣ This optimizes the null in very high precision applications and minimizes the effect of offset voltage in switching gain applications. In this application, the input offset is adjusted first at the highest programmed gain, and then the output offset is adjusted at G=1.

get

The AD624 includes high precision pre-edge internal gain resistors. These allow single-connection programming ␣ gains of 1100, 200 and 500. Additionally, various gains, including a pre-calibrated gain of 1000, can be achieved through a series-parallel combination of internal resistors. Table I␣ shows the available gains and appropriate pin connections␣ and gain temperature coefficient.

The gain value obtained by combining the internal resistors is very useful. The temperature coefficient of gain depends primarily on the temperature coefficient mismatch of the various internal resistors. The tracking of these resistors is very tight, resulting in the low-gain TCs shown in Table 1.

If the desired gain value cannot be achieved using the internal ␣ resistors, a single external resistor can be used to achieve any ␣ gain between 1 and 10000.

This resistor is connected at pins 3 and 16 to program the gain according to the formula: (See Figure 29). For best results, RG should be a precision resistor with a low temperature coefficient. It affects gain accuracy and gain drift due to the mismatch between the external RG and the internal thin film resistors R56 and R57. Gain accuracy is determined by the tolerance of the external RG and the absolute accuracy (±20%) of the internal resistor. Gain drift is determined by the mismatch between the temperature coefficient of RG and the temperature coefficient of the internal resistors (-15ppm/°C typical) and the temperature coefficient of the internal interconnects.

The AD624 can also be configured to provide gain in the output stage. Figure 30 shows the H-pad attenuator connected to the reference and sense lines of the AD624. The values of R1, R2 and R3 should be as low as possible to minimize gain variation and CMRR

noise

The AD624 is designed to operate on a theoretical noise floor. This is a very important criterion for designing an instrumentation amplifier front-end noise is the limit of the data acquisition resolution of the system it is being used in. There are two sources of noise in instrumentation amplifiers, the input noise is mainly generated by the differential input stage and the output noise is generated by the output amplifier. Both of these components exist at the input (and output) of the instrumentation amplifier. At the input, the input noise will appear constant; the output noise will pass through the closed-loop gain (at the output, the output noise is unchanged and the input noise is amplified by the closed-loop gain. Those two noise sources must be the sum square root to determine the desired total Noise Level Input (or output). Low frequency (0.1 Hz to 10 Hz) voltage noise output stage is 10 μV pp, input stage contribution is 0.2 μV pp. At gain of 10, RTI voltage noise is 1 μV pp, . RTO voltage noise . These calculations apply to applications using internal or external gain resistors.

Input bias current

The input bias current is the current necessary to bias the input transistors of the DC amplifier. Bias current is another source of input error and must be considered in the overall error budget. When multiplied by the source resistance imbalance, the bias current appears as an additional bias voltage. (The changes in the bias current relative to the signal voltage and temperature are taken into account when calculating the bias current error.) The input bias current is the difference between the two input bias currents. The effect of the bias current is the input bias voltage, which is the bias current multiplied by the source resistance.

Although in-amps have differential inputs, there must be a return path for the bias current. If this is not done, these currents will charge up stray capacitances, causing the output to drift uncontrollably or saturate. Therefore, when amplifying "floating" input sources such as transformers and thermocouples, as well as AC-coupled sources, there must be a DC path from each input to ground (see Figure 31).

Common Mode Rejection

Common-mode rejection is a measure of the change in output voltage when the two inputs change by an equal amount. These specifications are usually given for full range input voltage variation and specified power supply imbalance. "Common Mode Rejection Ratio" (CMRR) is a ratio expression and "Common Mode Rejection" (CMR) is the logarithm of that ratio. For example, a CMRR of 10000 corresponds to a CMR of 80db.

In an instrumentation amplifier, AC common mode rejection is only as good as differential phase shift. The degradation of AC common mode rejection is caused by uneven drop in resistance of different rails and phase differences caused by differences in stray capacitance or cable capacitance. In many applications, shielded cables are used to reduce noise. Unless the shield is driven correctly, this technique produces common-mode rejection errors. Figures 32 and 33 show an active data protection device configured to minimize differential phase shift by "bootstrapping" the capacitance of the input cable to improve AC common-mode rejection.

ground

Many data acquisition parts have two or more ground pins that are not connected together within the device. These grounds must be connected together at one point, usually at the system power ground. Ideally, a single solid ground is desirable. However, due to the electrical current flowing through the ground wires and the circuit card's etched stripes, and because these paths have resistance and inductance, hundreds of millivolts can develop between the system ground and the data acquisition components. A separate ground return should be provided to minimize current flow in the path from the most sensitive point to the system ground point. This way, the supply current and the logic gate return current do not sum in the same return path as the analog signal, causing measurement errors (see Figure 34).

Since the output voltage is determined from the potential at the reference terminal, instrumentation amplifiers can solve many grounding problems.

Sensing terminal

The sense terminal is the feedback point for the in-amp output amplifier. Usually it is connected to the output of the instrumentation amplifier. If heavy load currents are to be drawn through long leads, the voltage drop due to the current flowing through the lead resistance may cause errors. The sense terminal can be connected to an instrumentation amplifier while under load, thereby bringing IxR down "in the loop", effectively eliminating this source of error.

Typically, IC instrumentation amplifiers are rated for full ±10 volts at 2 kΩ. However, in some applications more current needs to be driven into heavier loads. Figure 35 shows how a current booster can be connected “inside the loop” of an instrumentation amplifier to provide the required current without significantly degrading the overall performance. The loop gain of the IA output amplifier reduces the effects of buffer nonlinearity, offset, and gain errors. The offset drift of the buffer is also reduced.

Reference terminal

The reference terminal can be used to offset the output voltage up to ±10 V. This is useful when the load is "floating" or does not share ground with the rest of the system. It also provides a way to inject precise offsets directly. It must be remembered that the total output swing is ±10 volts, shared between the signal and reference offset when grounded.

When the IA is configured for three amplifiers, it is necessary to provide almost zero impedance to the reference terminal. Any significant resistance, including those caused by PC layout or other connection techniques, that appears between the reference pin and ground will increase the gain of the non-vertical signal path, disrupting the IA's common-mode rejection. Accidental thermocouple connections made in the sensor and reference lines should also be avoided as they will directly affect the output bias voltage and output bias voltage drift.

In the AD624, the reference source resistor will unbalance the CMR trim by a ratio of 10 kΩ/RREF. For example, if the reference source impedance is 1Ω, the CMR will be reduced to 80 dB (10 kΩ/1Ω = 80 dB). An op amp can be used to provide a low impedance reference point as shown in Figure 36. The input bias voltage characteristics of this amplifier will directly increase the output bias voltage performance of the instrumentation amplifier.

Using the sense and reference terminals shown in Figure 37, the instrumentation amplifier can be converted into a voltage-to-current converter.

By establishing a reference on the "low" side of a current setting resistor, the output current can be defined as a function of input voltage, gain, and the value of that resistor. Since only a small current is required at the input of the buffer amplifier A2, the forced current IL will flow through the load in large quantities. The offset and drift specifications of A2 must be added to the output offset and drift specifications of the IA.

Programmable gain

Figure 38 shows the AD624 used as a software programmable gain amplifier. Gain switching can be accomplished with mechanical switches such as DIP switches or reed relays. It should be noted that the "on" resistance of the switch in series with the internal gain resistor becomes part of the gain equation and will have an effect on the gain accuracy.

A significant advantage of using internal gain resistors in a programmable gain configuration is the minimization of thermocouple signals often found in multiplexed data acquisition systems.

If the full performance of the AD624 is to be achieved, the user must take great care in designing and laying out the circuit to minimize the residual thermocouple signal.

AD624 can also be connected at the output stage for gain. Figure 39 shows the AD547 used as an active attenuator in the feedback loop of the output amplifier. The active attenuation has a low impedance to the feedback resistor, so the degradation of the common-mode rejection ratio is minimal.

Another way to develop an exchange scheme is to use a DAC. The AD7528 dual DAC basically acts as a pair of switched resistor attenuators with high analog linearity and symmetrical bipolar transmission, ideal in this application. The advantage of a multiplying DAC is that it can handle polar or zero inputs without affecting the programmed gain. The circuit shown uses the AD7528 to set gain (DAC A) and perform trimming (DAC B).

Auto-zero circuit

In many applications, very accurate data in high gain configurations must be provided. Using the offset spinner at room temperature offsets the effect to zero. Beyond that, however, zero offset over the operating temperature range becomes a problem. The circuit in Figure 41 shows a CMOS DAC operating in bipolar mode and connected to the reference terminal providing software-controlled offset adjustment.

In many applications, sophisticated auto-zero software algorithm applications are not available. For these applications, Figure 42 provides a hardware solution.

The microprocessor-controlled data acquisition system shown in Figure 43 includes auto-zero and auto-gain functions. By specifying two differential inputs, one grounded and one A/D reference, the correct program calibration cycle can eliminate initial accuracy error and accuracy temperature error. The autozero loop, in this application, converts a number that appears to be grounded and then writes the same number (8 bits) as the AD624, which removes the zero error because its output has an inverse scale. The automatic gain loop converts the A/D reference and compares it to full scale. A multiplicative correction factor is then calculated and applied to subsequent readings.

scales

Figure 44 shows an example of how the AD624 can be used to regulate the differential output voltage from a load cell. A 10% reference voltage adjustment range is required to accommodate the 10% sensor sensitivity tolerance. The high linearity and low noise of the AD624 make it ideal for use in this type of application, especially when small changes in weight relative to absolute values need to be measured. Adding an auto-gain/auto-recovery cycle will allow the system to remove offset, gain error, and drift for true 14-bit performance.

AC bridge

Bridge circuits using DC excitation are often plagued by errors due to thermocouple effects, l/f noise, DC drift in electronics, and line noise pickup. One way to solve these problems is to excite the bridge with an AC waveform, amplify the output of the bridge with an AC amplifier, and synchronously demodulate the resulting signal. At the output of the synchronous demodulator, the AC phase and amplitude information from the bridge is restored to a DC signal. Low-frequency system noise, DC drift, and demodulator noise all mix into the carrier frequency and can be removed by a low-pass filter. When choosing a filter, the dynamic response of the bridge must be weighed against the amount of attenuation required to adequately suppress these remaining carrier components.

Figure 45 is an example of an AC bridge system using the AD630 as a synchronous demodulator. The oscilloscope photo shows the result of a 0.05% bridge unbalance caused by a 1 megohm resistor in parallel with one leg of the bridge. The top trace represents the bridge excitation, the upper middle trace represents the amplified bridge output, the lower middle trace represents the synchronous demodulator output, and the bottom trace represents the filtered DC system output.

The system can easily account for 0.5ppm bridge impedance changes. This change will produce a 6.3 mV change in the low-pass filtered DC output, well above the RTO drift and noise.

The AC-CMRR of the AD624 decreases with the frequency of the input signal. This is primarily due to the package pin capacitance associated with the AD624's internal gain resistors. If the AC-CMRR is not sufficient for a given application, it can be trimmed using a variable capacitor connected to the RG2 pin of the amplifier, as shown in Figure 45.

Error Budget Analysis

To illustrate how instrumentation amplifier specifications apply, we will now examine a typical situation where the AD624 is required to amplify the output of an unbalanced sensor. Figure 47 shows a differential sensor with an unbalance of ≈5Ω providing a 0 to 20 mV signal to the AD624C. The output of the IA provides an input voltage range of 0 to 2 volts for a 14-bit A-to-D converter. The operating temperature range is -25°C to +85°C. Therefore, the maximum temperature change in the operating range is from ambient to +85°C (85°C to 25°C = 60°C).

In many applications, differential linearity and resolution are the most important. This is the case in situations where the change in the absolute value ratio of the variable is not significant. In these applications, only the irreducible error (20ppm = 0.002%) is significant. Additionally, if the system has an intelligent processor that monitors the A to D outputs, adding the auto gain/auto zero period will remove all reducible errors and possibly eliminate the need for an initial calibration. This also reduces the error rate to 0.002%.