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2022-09-23 11:22:38
UCC3808A dual output driver stage arranged in push-pull configuration
Dual output driver stages in push-pull configuration current sense discharge transistors for improved dynamic response 130 -µA typical start-up current 1-mA typical run current operation to 1 MHz internal soft-start On-chip error amplifier with 2-MHz gain bandwidth Integrated on-chip VDD Clamped output driver stage capable of sourcing 500 mA peak, 1-A peak current Description The UCC3808A is a family of BiCMOS push-pull, high speed, low power, pulse width modulators. The UCC3808A contains all the control and drive circuitry required for an off-line or DC-DC fixed frequency current mode switching power supply with a minimum number of external parts.
The UCC3808A dual output driver stage is arranged in a push-pull configuration. Both outputs are switched at half the oscillator frequency using flip-flops. The dead time between the two outputs is typically 60 ns to 200 ns depending on the timing capacitor and resistor values, thus limiting the duty cycle of each output stage to less than 50%.
pin assignment
COMP: COMP is the output of the error amplifier and the input of the PWM comparator. The error amplifier in the UCC3808A is a true low output impedance, 2 MHz op amp. Therefore, the COMP pin can either source or sink current. However, the internal current of the error amplifier is limited, so zero duty cycle can be forced externally by pulling COMP to GND.
The UCC3808A series has a built-in full-cycle soft-start function. Soft-start is implemented as a clamping of the maximum COMP voltage.
CS: Input to PWM, peak current and overcurrent comparators. The overcurrent comparator is used for fault detection only. Exceeding the overcurrent threshold will cause a soft-start cycle. Internal MOSFET discharge current sense filter capacitors to improve the dynamic performance of the power converter.
FB: Inverting input of the error amplifier. For best stability, keep the FB lead length as short as possible and keep the FB stray capacitance as small as possible.
GND: Reference ground and power ground for all functions. Due to the high current and high frequency operation of the UCC3808A, a low impedance board ground plane is strongly recommended.
OUTA and OUTB: AC high current output stage. Both stages can drive the gate of the power MOSFET. Each stage is capable of producing 500mA of peak source current and 1A of peak sink current.
In a push-pull configuration, the output stage switches at half the oscillator frequency. When the voltage on the RC pin rises, one of the two outputs is high, but during the fall, both outputs are off. The dead time between these two outputs, as well as the output rise time which is slower than the fall time, ensures that both outputs cannot be turned on at the same time. This dead time is typically 60 ns to 200 ns, depending on the values of the timing capacitors and resistors.
The high-current output driver consists of a MOSFET output device that transitions from VDD to GND. Each output stage also provides a very low impedance for overshoot and undershoot. This means that in many cases, external Schottky clamp diodes are not required.
RC: Oscillator programming pin. The oscillator of the UCC3808A tracks VDD and GND internally, so changes in the power rails have minimal effect on frequency stability. Figure 1 shows the oscillator block diagram.
Only two parts are required to program the oscillator: a resistor (connected to VDD and RC) and a capacitor (connected to RC and GND). The approximate oscillator frequency is determined by the simple formula:
f-type oscillator
1.41 Reinforced concrete where the unit of frequency is Hertz, the unit of resistance is ohm, and the unit of capacitance is Farad. The recommended timing resistor range is between 10 kΩ and 200 kΩ, and the timing capacitor range is between 100 pF and 1000 pF. Timing resistors smaller than 10 kΩ should be avoided.
For best performance, the timing capacitor leads should be connected as short as possible to GND, the timing resistor leads from VDD should be connected to VDD, and the leads between the timing element and RC should be connected to RC. Separate ground and VDD traces for external timing networks are encouraged.
Oscillator Block Diagram Note A: The oscillator generates a sawtooth wave on RC. During the RC rise time, the output internships alternate on time, but during the RC fall time, both internships are closed. The output stage switches 1/2 the oscillator frequency, and the guaranteed duty cycle of both outputs is less than 50%.
VDD: The power input connection for this device. Although the quiescent VDD current is low, the total supply current will be higher, depending on the OUTA and OUTB currents and the programmed oscillator frequency. The total VDD current is the sum of the quiescent VDD current and the average output current. Knowing the operating frequency and the MOSFET gate charge (Qg), the average output current can be calculated from:
Qg F, where F is the frequency To prevent noise problems, bypass VDD to GND, use ceramic and electrolytic capacitors as close to the chip as possible. A 1-MF decoupling capacitor is recommended.
Application Information The 200kHz push-pull application circuit with full-wave rectifier is shown in Figure 2. The output, VO, provides 5v at 50w max and is galvanically isolated from the input. Since the UCC3808A is a peak current mode controller, the 2N2907 emitter follower amplifier (buffered CT waveform) provides the slope compensation required for duty cycles greater than 50%. Capacitive decoupling is very important for single ground IC controllers and it is recommended to be as close as possible to 1mm from the IC. The controller power supply is a series RC for startup in parallel with the bias winding on the output inductor used in steady state operation.
Isolation is provided by an optocoupler, regulated on the secondary side using a TL431 adjustable precision shunt regulator. Small-signal compensation and tight voltage regulation are achieved using this part on the secondary side. There are many options for output inductors depending on cost, size, and mechanical strength. Several design options are iron powder, molybdenum alloy (MPP) or ferrite core with air gap as shown. The main power transformer has a Magnetics ER28 sized core made of P material and operates efficiently at this frequency and temperature. The input voltage can be between 36 VDC and 72 VDC.
application information
Typical Application Diagram: 48-V In, 5-V, 50-W Output