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2022-09-23 11:22:38
ZA3020 2A Step-Down, PWM, Switch-Mode DC-DC Regulator
General Description The ZA3020 is a monolithic step-down switch-mode converter with built-in power MOSFETs. It achieves 2A continuous output current over a wide input supply range with good load and line regulation.
Current-mode operation provides fast transient response and simplifies loop stabilization. Fault state protection includes cycle-by-cycle current limiting and thermal shutdown. In shutdown mode, the regulator draws 23 microamps of supply current.
The ZA3020 requires a minimum number of off-the-shelf standard external components. A sync pin can drive the part to 600KHz.
Packaging temperature ZA3020DS SOIC8-40 to +125 °C. For tape and reel, use suffix -Z (e.g. ZA3020DS-Z) with 2A output current 0.18 525 ; internal power MOSFET switch, stable, with low ESR output ceramic capacitors, up to 95% efficiency, 20µA shutdown mode, fixed 380kHz frequency, Thermal Shutdown Cycling, Cyclic Overcurrent Protection, Wide 4.75 to 25V Operating Input Range, Output Adjustable from 1.22 to 21V Programmable Undervoltage Lockout Frequency Synchronous Input Available in 8-Pin SO Package The battery charger pre-regulator
Typical Application Circuit
Absolute Maximum Ratings (Note 1) Recommended Operating Conditions (Note 2) Supply Voltage (VIN) 28V Input Voltage (VIN) 4.75V to 25V Switching Voltage (VSW) -1V to VIN +1V Operating Temperature - 40 to +125° C Boost Voltage VSW + 6V Feedback Voltage (VFB) - 0.3 to 6V Enable / UVLO Voltage (VEN) - 0.3 to 6V COMP Voltage (VCOMP) - 0.3 to 6V Sync Voltage (VSYNC) - 0.3 to 6V Package Thermal Characteristics Junction Temperature 150°C Thermal Resistance șJA (SOIC8) 105°C/W Lead Temperature 260°C Storage Temperature -65 to +150°C Electrical Characteristics (VIN=12V, TEM=25C unless otherwise specified) Parameters
Functional block diagram
Functional Description ZA3020 is a current mode regulator. That is, the compensation pin voltage is proportional to the current delivered to the load.
At the beginning of a cycle: upper transistor M1 is turned off; lower transistor M2 is turned on; COMP pin voltage is higher than the current sense amplifier output; the current comparator output is low. The rising edge of the 380KHz CLK signal sets the RS flip-flop. Its output turns off M2 and M1, thereby connecting the switch pins and inductor to the input power supply. The current sense amplifier detects and amplifies the increase in inductor current. The slope compensation is summed to the current sense amplifier output and compared to the error amplifier output of the current comparator. When the current detection amplifier plus the slope compensation signal exceeds the Comp pin voltage, the RS flip-flop is reset and the chip returns to its initial M1 off, M2 on state.
If the current sense amplifier plus slope compensation signal does not exceed the COMP voltage, the falling edge of CLK resets the flip-flop. The output of the error amplifier integrates the voltage difference between the feedback and the 1.22V bandgap reference. The polarity is such that the FEEDBACK pin voltage below 1.22V increases the COMP pin voltage. Since the voltage of the COMP pin is proportional to the peak value of the inductor current, an increase in its voltage will increase the output current. The lower 10ȍ switch ensures that the bootstrap capacitor voltage is charged under light load conditions. External Schottky diode D1 carries most of the inductor current.
ZA3020 type
Pin 1: BS-Bootstrap-C5 This capacitor is required to drive the gate of the power switch higher than the supply voltage. It is connected between the SW and Bootstrap pins for floating power on the power switch driver. The voltage across C5 is about 5V, and when the SW pin voltage is low, it is powered by the internal +5V power supply.
Pin 2: The ZA3020 operates from +4.75V to +25V unregulated input at supply voltage. C1 is needed to prevent large voltage spikes at the input.
Pin 3: SW - switch, connect the sensor to IN via M1 or to GND via M2.
Pin 4: GND - Ground This pin is the reference voltage for the regulation voltage. Therefore, care must be taken when laying out. This node should be placed outside the DSCH to C1 ground path to prevent switching current spikes from causing voltage noise to enter the part.
Pin 5: FB - Feedback an external resistor divider from the output voltage to GND, the wiper to the FB pin sets the output voltage. To prevent runaway current limit during short-circuit faults, the frequency folding comparator reduces the oscillation frequency when the FB voltage is below 650mV.
Pin 6: Compensation This node is the output of the transconductance error amplifier and the input of the current comparator. This node is frequency compensated by grounding the series RC. See the Compensation section for details.
Pin 7: EN-Enable/UVLO voltage greater than 2.495V enables operation. If not in use, leave the input unconnected. Undervoltage lockout (UVLO) function can be achieved by adding a resistor divider between VIN and GND. For full low current shutdown it needs to be less than 0.7V.
Pin 8: Sync - Sync Input This pin is used to synchronize the internal oscillator frequency to an external source. There is an internal 11Kȍ pull-down resistor to ground, so if not used, leave the input unconnected.
Sync Pin Operation The Sync pin drive waveform should be a square wave with a rise time less than 20ns. The minimum high voltage level is 2.7V. Low level is less than 0.8V. The frequency of the external sync signal needs to be greater than 445 KHz.
A rising edge on the sync pin forces the oscillator to reset. If the upper DMO is not already closed, it will be closed immediately. After 250nS, the upper layer DMO opens the connection between the switch and the vehicle identification number.
Application Information Bootstrap Capacitor - C6
This will bypass the upper switch gate driver. Its value should be greater than 4.7nF. For design simplicity, the value of this capacitor can be the same as the compensation cap C3.
Compensation Capacitor - C3
This is the upper limit of system compensation in series with R3. Using a ceramic 10nF, 50V, X7R capacitor, it matches C5.
Auxiliary compensation capacitor C6
This is the system compensation cap connecting the COMP and GND pins. This capacitor removes high frequency noise and gain, which can cause duty cycle jitter. On a well laid out board, the use of low ESR output capacitors (C2) C6 may not be necessary. It – 3DB frequency set to 1/ʌ (R3 X C6). For R3=10Kȍ and C6=100pF, the cutoff frequency is 159KHz, which can filter out 400KHz switching noise, but is higher than the GBW target of 10KHz to 80KHz, using ceramic 100pF, 50V, X7 capacitor.
Compensation Resistor – R3
The loop compensation gain is proportional to the value of R3. The higher its value, the higher the gain. The calculation of its value is discussed in detail in the Loop Compensation section. See Table 4 for recommended values for surface mount ceramic and specialty polymer output capacitors.
Feedback divider resistors – R2, R1
The output voltage is set by R2 and R3: VOUT=1.22V[1+(R2/R1)] The maximum recommended value for R1 is 100K. Too high impedance can make the feedback node prone to noise injection, especially if unshielded inductors are used. 10Kȍ is a good standard value.
Input Bypass Capacitor - C1
C1 is a large-capacity power supply capacitor, and its value should be ≥10uF. Capacitors can be electrolytic, tantalum or ceramic. However, since it draws the input switch current, a sufficient ripple current rating is required. Its RMS current rating should be greater than approximately 1/2 of the output current.
To ensure stable operation, C1 should be as close as possible to the IC. Alternatively, a smaller, high-quality ceramic 0.1µF capacitor can be placed closer to the IC and the bulk C1 further away. However, with this technique, caution is required if bulk C1 is also a high quality ceramic capacitor. The resonant energy oscillation between the two can lead to a large voltage excursion.
Schottky Capture Diode - D1
When VSW is low, D1 supplies most of the current to inductor L1. The lower the forward Schottky voltage drop (VSCH), the more efficient the regulator.
Table 2 provides Schottky part numbers based on maximum input voltage and current rating. Table 3 lists the manufacturer's website.
The maximum reverse voltage rating of D1 should be greater than the maximum input voltage VIN (max).
The average rated current of the diode must be higher than the average load current: idode(average)=ILOAD X[VIN–(VOUT+VSCH)]/VIN
example:
VIN=12V, output voltage=3.3V, input voltage=1.2A, voltage synchronization value=0.5V.
IDIODE(average)=1.2AX[12-(3.3+0.5)]/12V=0.82A In this case, a 1A diode can be used.