Features: Power Factor Correction Ready Signal Missing Vehicle Identification Number Detection Maximum SW Itching Frequency Limiting Internal Soft Start and No Overshoot Start Internal Total Harmonic Distortion (THD) Optimizer Precisely Adjustable Output Over Voltage Protection Open Feedback Protection and Disable Function None Current Detector (ZCD) 150 μs Internal Startup Timer Transistor Over Current Protection (OCP) Under Voltage Lockout with 3.5 V Hysteresis Start and Run Current Low Totem Pole Output with High State Clip + 500 /- 800 mA Peak Gate Drive Current 8-pin, Small Outline Package (SOP) Applications: Adapter Ballast LCD TV, CRT TV

Description: The FA N7930C is an efficient power factor correction (PFC) controller for running boost PFC applications in critical conduction mode (CRM). It uses a voltage mode pulse width modulation that compares the internal ramp signal with the generated MOSFET turn-off The error amplifier output signal because the voltage-mode CRM PFC controller does not need to correct the C-line voltage information, it saves the power loss of the input voltage sensing network necessary for the current-mode CRM PFC controller. FA N7930C provides over voltage protection (OV P), open feedback protection, over current protection (OCP), missing input voltage detection and under voltage lockout protection (UVLO) PFC ready pin can be used to trigger other power stage output voltage to reach proper hysteresis Level. If the INV pin voltage is lower than 0.45v, the operating current is reduced to a very low level. Using the new variable real-time control method, total harmonic distortion (THD) facilitates PFC ICs compared to traditional CRM.

Application information upon startup: Normally, the supply voltage (VCC) block of the PFC is powered by an additional power supply, which can be called a backup power supply. Without this backup power supply, auxiliary current detection can be used for zero current detection as a supply source once the PFC's Supply voltage blocks above 12 V and internal operation is enabled until the voltage drops to 8.5 V. If VCC exceeds VZ, the 20mA VCC current is dropping.

2.INV Block: The scaled down voltage of the output is the input of the INV pin. Many functions are embedded based on the INV pin: transconductance amplifier, output OVP comparator, disable comparator, output UVLO comparator. For output voltage control, transconductance amplifiers are used instead of traditional voltage amplifiers. Transconductance amplifiers (voltage controlled current sources) contribute to OVP and disable functions. The effect of power factor correction and the effective control of the response of the PFC block should be higher than the line frequency and the response of the transient controller. Two pole-zero compensation can satisfy both requirements. OV P comparator shuts down the output driver block with 0.175V hysteresis when INV pin voltage is above 2.675 V Comparator disabled when the inverting input voltage is below 0.35v with 100mv hysteresis An external small signal MOSFET can be used to disable the IC , as shown by n in the figure, the IC operating current if the IC is disabled. The figure is the internal rated power factor correction. The output voltage of the circuit near the input pin is 390 VDC, and the VCC supply voltage is 15 volts.

3.RDY output: When the INV voltage is higher than 2.24 V, the RDY output is triggered high and continues until the input AC, the inverter voltage is lower than 2.051 V and the voltage is high, such as 240V AC, the power factor correction output voltage is always high At the RDY threshold, regardless of the boost converter operation, in this case, INV is above 2.24 volts before PFC-VCC touches VSTART; however, the RDY output will not be triggered until VCC hits VSTART for the boost converter After the device operation stops, RDY is not pulled low because the INV voltage is above the RDY threshold. When the VCC power factor correction voltage is below 5V, RDY is pulled low although the output voltage of the PFC is above the threshold. This RDY pin output is an open drain pole, so an external pull-up resistor is required to provide the correct power. The RDY pin output remains floating until VCC is higher than 2V.

4. Control range compensation: Timing control via output voltage compensator with fan 7930 C. When the input voltage is high and the load is light, the control range is narrowed compared with the input voltage, and the reduction of the control range is inversely proportional to the square of the input voltage. Therefore, accidental blasting is easy to occur at the high end and light load. Boosters may sound an inductor or inductor at the input filter. Unlike other converters, burst operation in the PFC block is not because the PFC block itself is usually disabled in standby mode to reduce accidental light-load blasting operations, internally The control range realizes the compensation function and displays the serial number. It runs continuously to 5% load under the high voltage line. 5 Zero Current Detects: Zero Current Detect (ZCD) generates the turn-on signal of the MOSFET when the boost inductor current reaches zero, using the auxiliary input to couple to the inductor. When the power switch is turned on, a positive voltage (see Equation 2) is induced at the auxiliary input due to the opposite direction (see Equation 1) when the power switch is turned off.

W: VAUX is the auxiliary input voltage; TIND is the boost inductor turns; auxiliary auxiliary input turns; VAC is the input voltage of the PFC converter; VOUT_PFC is the output voltage from the PFC converter.

Because the auxiliary input voltage can vary from negative to positive voltage, the internal block pins in the ZCD have positive and negative voltage clamping circuits. When the auxiliary voltage is negative, the internal circuit clamps the negative voltage at zero current density by supplying the serial number Current, creation of 0.65 V around pin ZCD pin and auxiliary resistor When the auxiliary voltage is higher than 6.5 V, current flows through auxiliary input to ZCD pin.

Auxiliary input voltage is used to check boost. Inductor Current Zero Example When the boost inductor current becomes zero, the boost inductor at the MOSFET drain and all capacitor pins: including the COSS of the MOSFET; external capacitor at the DS pin to reduce the voltage rise and MOSFET fall slope ; Parasitic Capacitance Inductors; etc. to improve performance The voltage of the resonance is reflected into the auxiliary input and can be the valley position of the zero current MOSFET voltage stress used to detect the boost inductor Small delay for the valley detection, resistors and capacitors Need. The capacitor raises the ZCD pin If the ZCD voltage is above 1.5 V, the internal ZCD comparator output falls below the 1.4 V comparator output on the falling edge of ZCD and the internal logic turns on the MOSFET

Because the turn-on of the MOSFET is dependent on the ZCD input, the sw itch frequency may increase to several MHz above that due to false triggering or noise turn-on near the ZCD pin if the sw itch frequency is higher than required for critical conduction mode (CRM) operation Mode transitions to Continuous Conduction Mode (CCM) In CCM, unlike CRM, the boost inductor here resets to zero the next time the switch is turned on; the inductor current accumulates at each switch itch cycle and can rise to over High current ratings of power switches or diodes This can really damage the power switch. To avoid this, a maximum switch frequency limit is embedded. If ZCD applies the signal again after the previous 3.3µs rising edge of the gate signal, ignore this signal internally and FA N7930C w waiting for another ZCD signal. This slightly reduces power factor performance for light loads and high input voltages.

PCB Layout Guidelines PFC blocks typically handle high switch currents and voltages. Low energy signal paths are subject to high energy paths. Careful PCB layout is mandatory for stable operation. 1. The gate drive path should be as short as possible. A closed loop system starting from the gate driver, MOSFET gate and MOSFET source to ground PFC controller should be as close to this as possible. This is also the power ground and the power ground path on the signal ground bridge. The diodes to the output bulk capacitors should be shorted as well as between I pow The shared ground and signal grounds should only be in one location to avoid ground loop noise. The signal path to the PFC controller should be short for external components to be contacted.

2. The power factor correction output voltage sense resistor normally reduces the current consumption. This path can be affected by external noise to reduce the noise at the potential of the INV pin. A shorter output path is recommended for sensing. If a shorter path is not possible, in PFC output and INV pin - much better close to the INV pin Relatively high voltage close to the INV pin would help.

3. The ZCD path is recommended to be close to the auxiliary from the boost to the ZCD pin. If it is difficult, put a small capacitor (50 pF below) to reduce noise.

4. The sw-itching current sense path should not be shared with another path to avoid interference. Some additional components may be required to reduce the noise level applied to the CS pin.

5. It is recommended to use stabilizing capacitors for VCC as close as possible to the VCC and ground pins. If it is difficult, place the chip capacitors as far as possible using the corresponding pins.