feature

AD5200-256 -position; AD5201-33-position; 10 km, 50 km; 3-wire SPI compatible serial data input; single supply 2.7 V to 5.5 V or dual 2.7 V supply for AC or bipolar operation; midscale built-in power supply.

application

Replacement of mechanical potentiometers; instrumentation: gain, offset adjustment; programmable voltage to current conversion; programmable filters, delays, time constants; line impedance matching.

General Instructions

The AD5200 and AD5201 are programmable resistance devices with 256 and 33 positions, respectively, that can be digitally controlled through a 3-wire SPI serial interface. The terms programmable resistor, variable resistor (vr), and rdac are often used to refer to digital potentiometers. These devices perform the same electronic adjustment function as potentiometers or variable resistors. Both the AD5200/AD5201 contain a variable resistor in a compact MSOP package. Each unit has a fixed wiper resistor on the wiper contact that taps the programmable resistor at a point determined by the digital code. The code is loaded into the serial input register. The resistance between the wiper and either endpoint of the programmable resistor varies linearly with the digital code transferred into the VR latch. Each variable resistor provides a fully programmable resistance value between the A terminal and the wiper or between the B terminal and the wiper. Fixed A to B terminal resistance of 10 kΩ or 50 kΩ has a nominal temperature coefficient of 500 ppm/°C. VR has a VR latch that holds its programmed resistance value The VR latch is an SPI-compatible serial-to-parallel shift register loaded from a standard 3-wire serial input digital interface The eight data bits of the AD5200 and AD5201 are updated The six data bits make up the data word that goes into the serial input register. The internal preset forces the wiper to the mid-scale position by loading 80 hours and 10 hours into the AD5200 and AD5201 VR latches, respectively. The SHDN pin forces the resistor to an end-to-end open state at the A terminal and shorts the wiper to the B terminal for a microwatt power-off state. When SHDN returns to logic high, the previous latch setting puts the wiper in the pre-shutdown state. in the same resistor settings. The digital interface is still active during shutdown, so code changes can be made to generate new wiper positions when the device returns from shutdown.

All parts are guaranteed to operate over the extended industrial temperature range of -40°C to +85°C.

AD5200/AD5201 – Typical Performance Characteristics

operate

The AD5200/AD5201 provide 255- and 33-bit digitally controlled variable resistor (VR) devices. Changes to programmed VR settings are done by inputting the AD5200's 8-bit serial data word and the AD5201's 6-bit serial data word into the SDI (serial data input) pins. Table 1 provides the serial register data word format. The AD5200/AD5201 are internally preset to mid-scale in the power-on state. Additionally, the AD5200/AD5201 contain power-down pins that put the RDAC in a zero-power state. In this state, The direct switch next to terminals a and B is open while the wiper W is connected to terminal B, resulting in only leakage current consumption in the VR configuration. During shutdown, when the RDAC is inactive, the VR latch contents are maintained. The stored VR settings are applied to the RDAC when the part is returned from the closed state.

Variable Resistor Rheostat Operation Programming

The nominal resistance values of the RDAC between terminals A and B are 10 kΩ and 50 kΩ. The last two digits of the part number determine the nominal resistance value, for example 10 kΩ = 10 and 50 kΩ = 50 The nominal resistance (RAB) of the AD5200 has 256 contacts that can be accessed through the wiper terminals into the RDAC latch of the AD5200 The 8-bit data word is decoded to select one of 256 possible settings. In both parts, the first connection of the wiper starts at the b terminal of data 00h. As long as valid vdd/vss is applied, the wiper contact resistance connected to this b terminal is 50Ω regardless of the nominal resistance. For the 10 kΩ section, the second connection to the AD5200 is the first tap point for data 01h, 89Ω [rwb=rab/255+rw=39Ω+50Ω]. For data 02h, the third connection is the next tap point representing 78+50=128Ω. Due to its unique internal structure, the AD5201 has 5-bit +1 resolution, but requires a 6-bit data word to achieve the full 33-step resolution. Decode the 6-bit data word in the rdac latch to select one of 33 possible settings. Data 34 to 63 will automatically equal position 33. The wiper 00H connection of the AD5201 provides 50Ω. Likewise, for the 10 kΩ part, the first tap of the AD5201 produces 363Ω for data 01h and 675Ω for data 02h. For the AD5200 and AD5201, the wiper moves up the resistor ladder for each additional LSB data value until the last tap point is reached. Figures 2a and 2b show simplified diagrams of the equivalent rdac circuit.

The general equation for determining the digitally programmed output resistance between W and B is:

where: d is the latch contained in the RDAC. rab is the nominal end-to-end resistance. rw is the wiper resistance internal switch contributed by the on resistance.

Note: For 256 positions, D in AD5200 is between 0 and 255. On the other hand, D in AD5201 is between 0 and 32, so 33 positions can be achieved due to small differences in internal structure, as shown in Figure 2b Show.

Likewise, if RAB = 10 kΩ, and one terminal can be open or connected to W, the following output resistances from W to B will be set for the following RDAC latch code:

Note that there is a finite wiper resistance of 50Ω in the zero-scale condition. In this state, care should be taken to limit the current between W and B to no more than ±20mA to avoid degradation or possible damage to the internal switch contacts.

Like the mechanical potentiometer that the RDAC replaces, it is completely symmetrical. The resistance between wiper W and terminal A also creates a digitally controlled resistance RWA. When using these terminals, the B terminal should be tied to the wiper. The resistance value of RWA is set starting at the maximum value of the resistance and increasing with The value of the loaded data increases and decreases. The general equation for this operation is:

Similarly, d in the AD5200 is between 0 and 255, while d in the AD5201 is between 0 and 32.

If RAB = 10 kΩ, and the B terminal is open or connected to wiper W, the following output resistances between W and A will be set to the following RDAC latch codes:

Due to process batch dependency, the tolerance of nominal resistance can be ±30%. If the user is using the RDAC in rheostat (variable resistance) mode, they should be aware of this tolerance specification. RAB has a temperature coefficient of 500 ppm/°C as a function of temperature.

Programming the Potentiometer Divider Voltage Output Operation The digital potentiometer easily produces an output voltage at wiper-to-B and wiper-to-A proportional to the input voltage at A to B.

Unlike the polarity of VDD–VSS, which must be positive, the voltages between A–B, W–A, and W–B can be in either polarity.

If the approximate effect of the wiper resistance is ignored, connecting the terminals to 5 V and the B terminal to ground produces an output voltage across the wiper, which can be anywhere from almost zero to almost full scale, and is determined by Small deviations contributed by the wiper resistance. Each voltage LSB is equal to the voltage applied to terminal AB divided by the 2N-1 and 2N positional resolution of the potentiometer divider of the AD5200 and AD5201. For any valid input voltage applied to terminals A and B, the output voltage is defined relative to The general equation for grounding is:

Among them, d in AD5200 is between 0 and 255, and d in AD5201 is between 0 and 32. For a more precise calculation, including the effect of wiper resistance, VW can be found as:

where RWB(D) and RWA(D) can be obtained from Equations 1 to 4.

The operation of the digital potentiometer in voltage divider mode allows for more precise operation when the temperature is too high. Here, the output voltage depends on the ratio of the internal resistance, not the absolute value; therefore, the drift is reduced to 15ppm/°C.

digital interface

The AD5200/AD5201 contain a standard three-wire serial input control interface. The three inputs are clock (CLK), CS, and serial data input (SDI). The positive edge sensitive CLK input requires clean transitions to avoid clocking incorrect data into the serial input registers. The standard logic family works well. If a mechanical switch is used for product evaluation, it should be de-noised using a flip-flop or other suitable method. Figure 3 shows more details of the internal digital circuitry. When CS is low, the clock loads data into the serial register on each positive clock edge.

Note: P=positive side, X=don't care, SR=shift register.

All digital inputs are protected with series input resistors and parallel Zener ESD structures as shown in Figure 4 for digital input pins CS, SDI, SHDN, CLK.

test circuit

Figures 6 to 14 define the test conditions used in the product specification sheet.