VND810MSP dual...

  • 2022-09-23 11:26:54

VND810MSP dual-channel high-side driver

DESCRIPTION The VND810MSP is a monolithic device designed with STMicroelectronics ViPower M0-3 technology to drive any type of load with one side grounded. Active VCC pin voltage clamp protects device from low energy peaks (see ISO7637 Transient Compatibility Table) Active current limit combined with thermal shutdown and auto-restart protects the device against overload Current limit thresholds are designed to align the 21W/ 12V standard Lamp detection is an overload fault The device detects load conditions in both on and off states. Output shorted to VCC detected in off state. When the ground pin is disconnected, the unit automatically shuts down.

Current and Voltage Conventions

Switching time waveform

Application diagram

Anti-Battery Ground Protection Network Solution 1: Resistor in Ground Wire (RGND Only) This can be used for any type of load. Here are instructions on how to size the RGND resistors 1) RGND is less than 600MV/IS(ON) max 2) RGND±(VCC)/(-IGND), where -IGND is the DC reverse ground pin current and can found in the Absolute Maximum Ratings section of the device's data sheet. The power dissipation in RGND (when VCC<0: in reverse battery case) is: PD=(-VCC)2/RGND This resistor can be shared between several different HSDs Please note that this resistor value should be used with Equation (1) is calculated, where (on)max becomes the sum of the maximum on-state currents of the different devices. Note that if the microprocessor ground is not shared with the device ground, then RGND will have a shift in the input threshold and state output value (is(on) maxRGND) This shift will vary depending on where multiple high-side drivers are shared How many devices are open for the same rgnd. ST recommends solution 2 if the calculated power dissipation results in a large resistor or multiple devices must share the same resistor. Solution 2: Diode in Ground (DGND) If the device will drive an inductive load, a resistor (rgnd = 1kΩ) should be inserted in parallel with dgnd. This small-signal diode can be safely shared among several different high-speed drivers. Also in this case, if the microprocessor ground is not shared with the device ground, the presence of the ground network will create a shift (j600mv) in the input threshold and state output values. If multiple HSDs share the same diode/resistor network, this offset does not change the series resistance in the input and status lines and also needs to prevent current exceeding the absolute maximum rating during battery voltage transients. For unused input and status pins, the safest configuration is to leave them unconnected.

If the load dump peak voltage exceeds the VCC maximum DC rating, a load dump protection Dld (voltage transient suppressor) is required if the device is exposed to transients on the VCC line greater than those shown in the ISO T/R 7637/1 table Transient, the same applies.
μC I/O Protection: If a ground protection network is used and there is a negative transient on the VCC line, the control pin will be pulled negative. ST recommends inserting a resistor (RPROT) in the line to prevent the μC I/O pins from locking up. The value of these resistors is a compromise between the leakage current of the µC and the current required by the HSD I/OS (input level compatibility) (the latch is limited to the µC I/OS). -vcpeak/ilatchup≤rprot≤(vohμc-vih-vgnd)/iihmax calculation example: for vcpeak=-100v and ilatchup≥20ma; vohμc≥4.5v 5kΩ≤rprot≤65kΩ. The recommended rprot value is 10kΩ.

Disconnected load detection In the disconnected state, disconnected load detection requires an external pull-up resistor (RPU) connected between the output pin and the positive supply voltage (VPU), such as the +5V line used to power the microprocessor. The external resistor must be selected according to the following requirements: 1) No false open load indication when connecting the load: In this case, we must avoid VOUT being higher than VOLmin; this will result in the following condition VOUT=(VPU/(RL+RPU))RL