Features: Trifault Detect 8482 ; UL1950 compliant and enhanced safety for ultra-fast pfc response Low power: 200µA starting current, 5.5mA operation now low THD, high power factor average current, continuous boost leading edge power factor correction Current Feedback Gain Modulator for Improved Noise Immunity Overvoltage and Browning Protection, UVLO and Soft-Start Synchronized Clock Output

General Description: FAN4810 is a power factor correction controller, switching power supply. The FAN4810 includes circuit current to achieve leading edge average, "boost" type power factor correction fully compliant with IEC1000-3-2 specification power supply-cation. It also includes a TriFault Detect™ feature to help ensure no component failure performance in a single pfc gate driver with 1a minimizes the need for external drive circuitry. Low power consumption requires increased efficiency and reduced component cost. Power factor correction also includes peak current limiting, input voltage overvoltage protection, and overvoltage comparators that shut down the pfc in the event of a sudden drop in partial load. The punch signal can be used to synchronize downstream pulse width modulation stages in order to reduce system noise.

Power Factor Correction Power factor correction makes a non-linear load look like a resistive load on an AC line. For resistors, the current is synchronized with the line and the voltage is proportional to the line, so the power factor is 1. Normal class non-linear loads are the input to most power supplies where bridge rectifiers and capacitive input filters are used. Peak charging effects occur at the input filter capacitors in these power supplies, resulting in brief high amplitude current pulses flowing from the power line. , rather than sinusoidal currents that are in phase with the line voltage so that the power-to-line power factor is less than 1 (that is, they cause significant current harmonics of the power to appear at the input line frequency). If the input current through this supply (or any other non-linear load) can track the input voltage with an instantaneous magnitude, it has resistance to the AC line and unity power factor will be achieved. To keep the input current draw of the device pulling the power source proportional to the in-phase AC line voltage of the input, a way must be found to prevent loading the line, but not with the instantaneous line voltage. The PFC of the Fan 4810 uses a boost mode DC-DC converter to achieve this. The input to the frequency converter is full wave rectified AC line voltage. No bulk filtering is applied after the bridge rectifier, so the input boost converter ranges the voltage (frequency on both lines) from zero volts to the peak of the AC input back to zero by forcing the boost converter to satisfy two simultaneous conditions, The current drawn from the power line and the input line voltage can be guaranteed. One of the conditions is that the voltage of the boost converter must be set higher than the peak line voltage. A common value is 385Vdc, allowing 270Vacrms of high line voltage. The other condition is that at any given instantaneous voltage must be proportional to the line voltage.

Building a suitable voltage control loop turns driving the current error amplifier and switching output drivers to meet the first of these requirements. The second time uses rectified AC line voltage to regulate the output of the voltage control loop. Such modulation allows the current error amplifier to command the power stage current to vary directly with the input voltage. To prevent ripple, which must appear at the output of the boost circuit (usually 10V AC at about 385V DC level), starting from the introduction of distortion through the voltage error amplifier, the bandwidth of the voltage loop is deliberately kept low The final improvement adjusts the overall gain of the pfc It is a system when the AC input voltage is changed in proportion to 1/vin2.

Because the boost converter topology in the fan4810 pfc is in the current averaging type, no slope compensation is required. The PFC circuit block Gain Modulator diagram shows the block diagram of the FAN4810 The gain modulator is the heart of the PFC as it is the circuit block that controls the current loop response to the line voltage waveform and frequency, rms line voltage and pfc output voltage. The gain modulator has three inputs. These are: 1. The current (amplitude and waveform) representing the instantaneous input voltage to the pfc. The rectified ac input sine wave is converted into a proportional current through a resistor, and the current is then sampled at the Ike ground in such a way to minimize noise, which is required in high power switching power conversion environments. The gain modulator responds linearly to this current. 2. A voltage proportional to the long-term rms AC line, derived from the rectified line voltage. Scaling and filtering this signal is presented to a modulator of gain VRMS The output of the gain modulator is inversely proportional to VRMS 2. (exception Except for special gain profiles where low values of vrms take over to limit the circuit's power dissipation in severe oil starvation conditions) this relationship between vrms and gain is called k and is described in Typical Performance Characteristics. 3. The output of the voltage error amplifier, veao. The gain modulator responds linearly to this change in voltage. The output of the gain modulator is a current signal at twice the frequency of a straight line full-wave rectified sine wave that is applied to the virtual ground at the (negative) input of the current error amplifier. In this way the gain modulator forms the reference loop for the current error and ultimately controls the instantaneous current consumption from the PFC of the power line The general form of the gain modulator output is:

More precisely, the output current of the gain modulator is:

Current Error Amplifier The output of the current error amplifier controls the pfc duty cycle to maintain a linear function of the average current through the boost inductor Line voltage at the inverting input of the current error amplifier, the gain of the output of the current modulator and the current at the ISENSE pin Apply a negative voltage to it. A negative voltage on this ISENSE means the sum of all currents flowing in the pfc circuit, usually from a current sense resistor in series with the negative terminal, into the bridge rectifier. In high power applications, current transformers are sometimes used, one to monitor the id of the boost mosfet and one to monitor the boost diode. As mentioned above the current error amplifier is a virtual ground. Given this fact, and the arrangement of duty cycle modulator polarity inside the pfc, a positive current from the gain modulator will cause the output stage to increase the duty cycle until the voltage on ISENSE is negative enough to cancel the increased current. Likewise, if the output of the gain modulator is lowered, the output duty cycle will be lowered to lower the negative voltage on the ISENSE pin. Cycle-by-cycle current limiter As part of the current feedback loop, the ISENSE pin is a direct cycle current input to the pfc segment limiter. The input voltage at this time is always greater than -1V if the negative voltage of the pin is always greater than -1V, i.e. the output of the PFC will be disabled until the protection flip-flop is reset by the clock pulse at the beginning of the next power factor correction power cycle.

Triple fault detection improves power supply reliability, reduces system component count, and simplifies compliance with UL 1950 safety standards, the FAN4810 includes triple fault detection. This function monitors VFB (pin 15) for certain PFC fault conditions. In the event of a feedback path failure, the output of the pfc may be outside the safe operating range. Failing this way, the VFB will exceed its normal working area. Should VFB be too low, too high, or open, triple fault detection senses the error and terminates the pfc output driver. Triple fault detection is a completely internal circuit. It does not require external parts for protection. Over voltage protection OVP comparator is used to protect the power supply circuit if the load changes suddenly the DC output of the high voltage resistive divider pfc is fed to vfb. When VFB exceeds 2.75V when the voltage is turned on, the PFC output driver is turned off. The OVP comparator has a 250mV hysteresis and the PFC will not restart until the VFB voltage drops below 2.50V. VFB should be set on the active and passive external power components and the fan 4810 at their safe operating voltages, but not so low as to interfere with the boost voltage regulation loop.

The error amplifier compensates for the output of the PFC and is usually loaded by PWM to generate low voltage and high current converters required at the output of the smps. The PWM load pfc can be modeled as a negative resistance; increasing the input voltage to the PWM causes the input to decrease current. This response requires two transconductance error amplifiers. The figure shows the most common types of compensation networks for voltage and current error amplifiers, and their respective return points. The current loop is compensated to return to VREF to produce a differential voltage on IEAO when the reference voltage rises from zero volts to prevent the pfc from not immediately requiring it to have a full duty cycle boost converter. When Compensating Voltage Loop Error Amplifiers; Stability and Transient Response. Optimizing transient interaction response and stability requires that the error amplifier open loop crossover frequency should be 1/2 the line frequency, or 23Hz for a 47Hz line (minimum expected international mains frequency) gain versus input voltage The voltage error amplifier of the FAN4810 has a The special form of nonlinearity makes the transconductance of the conditional error amplifier at a local minimum during steady-state operation. Fast perturbations in line or load conditions will cause the input of the voltage error amplifier (VFB) to deviate from its 2.5V (nominal) value If this occurs, the transfer conductance of the voltage error amplifier will increase significantly, as shown in the typical performance characteristics. This improves the traditional linear gain characteristic of the voltage loop, resulting in a faster voltage loop response to such disturbances.

The compensation of the current amplifier is the same as that of the voltage error amplifier, except for the crossover frequency. The current crossover frequency amplifier should be at least 10 times the voltage amplifier to prevent interaction with the voltage loop. It should also be limited to the switching frequency, eg 100kHz switching is 16.7kHz frequency. There is a modest gain profile applied to the transfer characteristics of the current error amplifier to improve the speed of response to current loop disturbances. However, the boost inductor is usually the dominant overall current loop response factor, so this profile is significantly smaller than the voltage error amplifier. This is in typical performance characteristics. See application note AN42045 for compensating current and voltage control loops. Application Note 42030 also contains valuable information on the design of such PFCs.