Low -power consumption (ROM temperature at lt; 100μA; 130 ° C at 130 ° C at a standby state (150 μA)

Two 3A loaded semi -bridge (RDSON u003d 0.25 Type; TJ u003d 25 ° C)

Two half bridge for 0.5A load (RDSON u003d 2.5 type; TJ u003d 25 ° C)

2.5A load high -voltage side drive (RDSON u003d 0.45 Type; TJ u003d 25 ° C)

Direct control (multi -way) system by μC)

Diagnosis of high/low level

Passing Display and diagnosis of current

The diagnosis temperature before turning off is too high

Opening load diagnosis

Instructions

L9947 is a bus -controlled power interface, using it with In multi -power BCD60II technology. A maximum of 3 DC electric motors and one ground resistance load can be four -semi -bridge and a high -side drive power output microcomputer compatible bidirectional parallel bus that allows multiple interfaces to connect to the same bus (multi -road reuse system). Complete diagnostic information can be in a bus.

Electrical characteristics (vs u003d 8 ~ 16V; VCC u003d 4.5 ~ 5.5V; TJ u003d -40 ~ 150 ° C; unless there are other regulations; when the current is an inflow pipeline Foot.)

Lowing circuit application

Table 1: Recommended application circuit

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Functional description

L9947 is a designed power interface circuit for multi -way reuse system buses controlled by parallel μC. The bus consists of four two-way data composition of the wire D0-D3 and three control wires read/write (R/WN), mode (Mode) and chip selection (CSN). This device requires two power supply voltage. The first voltage supply, high -voltage side drive, and its driver. The second is 5V stable power. The function of the device in the typical operation mode is as described below.

Note: When CSN u003d 0, the device is transparent (for T ≤ 100 μs). In this case, any change in data D0 and D3 will lead to appropriateness Output response. The cancellation of the selection circuit (CSN) will store the final programming status

diagnosis/read. Table 2: In the reading mode, the port D0 and D3 are used as an output to display the previous detection.

System startup (Figure 2)

Before VCC, VS did not require VS to appear. With VCC, the internal logic will be reset and the system is input control. If CSN u003d 0 exceeds VCC, 100 μs spare mode is activated. When CSN and VCC will also be very high. When CSN u003d 0 and VCC rises, the device is not controlled by bus. The output is kept at 100 μA-low-low-signal of the sad CSN cable must control the output. No UND implementation VS. VCC should be provided from the same voltage source D0-D3 pens (eg, μC) from the same driver. Data transmission and output activation (Figure 3) The half bridge of OUT1, OUT2 and OUT3 can be used to drive the motor configured with three two -way full bridge with OUT4. The same engine shown in the middle can only drive a engine time. μC is written to the corresponding word on the bus 1 to 10, and locks it on the upper pulse of L9947 with a low level. So the motor started. It is useful to stop the motor insertion and brake device (status 9). In the case of the brake state where the low -end vehicle tube is located in this case, the anti -stimulus current flows through the low -side switch, not the Intrin SIC diode of the semi -bridge. After that, the half bridge can be switched under three -state (T). High -sided driver, only half -bridge is in a three -state state 10. μC always works in the main control mode, and L9947 has always been so power interface as a slave. In other words, C itself and communication began in the case of low power. CSN u003d 0, R/Wn u003d 0 L9947 Read data to run Command on the bus and execute commands, as shown in Tables 1, 3, 4 (writing mode). Gaopo CSN stores the last command and further executes it. If CSN u003d 1, all inputs are disabled. So the bus can be used for another device. The diagnostic status on the parallel bus is written with CSN u003d 0 and R/Wn u003d 1, L9947, until CSN becomes high (Table 2; Status μ+15) (read mode). The power output remains the same as before.

Figure 3: The sequence of the signal is transmitted to the right side of the switch M1, read the output state, and the brake motor starts standby mode.

The bus timing (Figure 4) The bus signal must be defined as t3 u003d 1 μSCSN lower. R/wn when CSN u003d 0 is allowed. Other signals may change. To store the command, the positive edge of the CSN before the D0-D3 and mode signal T9 u003d 1 μs must be fixed. OUT1-OUT5 over current: output current of OUT1-OUT5 is internal restrictions. This is implemented through the following ways: when the output current reaches a certain level, the grid source voltage is clamped to a lower level. The output current is limited now and follows the output ID, Uds Char Acteritic for this Gate-Source Voltage. When the output voltage drops,Internal timers start (leakage source) increased to more than 0.4 after 100 μs. The output is closed, and the corresponding over current (OVC1 may set OVC2). You can activate the output and enter the next data word again.

T1 and T5 exported by the frequency of the internal oscillator

T7 changes with the power supply voltage vs, which is related to the output voltage slope limit

For for T1 GT; 100 μs, due to clearance (status 20), locking data will be reset

diagnosis (Table 2; Status 11-15): Diagnosis provides information on the output end output voltage state (height or low) information OUT1 OUT1 -OUT5, overcurrent, too high pressure stop temperature. The output voltage detection is locked by the threshold (OVC) information of 0.4VS and 0.6 VS. over -current, which is locked until the new or repeatedly receives the writing command. OVC1 is set to output in any half bridge. OVC2 error bits will be set to over -current at OUT5. Before the power supply voltage VS exceeds the overvoltage threshold of 20V type, the overvoltage (OVV) is very high. If the temperature at the connector is too high than the typical value. 30 Kevin below the heat stop pile temperature (TJSD).

Load interrupt detection

(Table 3): Output OUT1-OUT4 is used by the app. The output output 4 can be switched to a current source or current source. 140mA current capacity (status 16+17). This if the output current is less than 1mA current IOUT4 u003d 0 (Status 17). Diagnostic output voltage transmission information or more semi -bridge to VS or ground or motor connection interruption. Output Out1-OUT3 switching current in Status 18), OUT4 and OUT5 AS current source (OUT4140MA, OUT5 10MA). Under this current, the impact of leakage current eliminates oxidative contact.

Spare items! ; Status 2): When all other inputs are low, the L9947 is set to a spare mode, the positive edge of CSN. All lock data will be cleared, and the input and output are sad. The total current consumption is less than 100 μA. CSN u003d 0 exit the standby. All locking data becomes clear.

Clear (Table 4: Status 20): If the chip selection is lower than the TCLR u003d 100 μs, the internal locking data will be cleared and the output becomes sad. Repeatability-low-edge activation input again. It also broken due to the internal drop -down resistor at the CSN input. After understanding, L9947 saw the negative edge of the CSN when he woke up.

Heat shutdown: When the knot temperature rises to the turnover power DMOS transistor%1 (%2) until the knot temperature drops to TJSD-TJHYST.

Piece current with power output: For the output voltage 10V or more, the clamp current is aboutEssence 50 μA will output the inflow power due to the internal grid source limit, when the device is not standing standby.

Overvoltage stop: When the power supply voltage VS exceeds the overvoltage threshold vsqvt, type. 20V, output OUT1- with a sad mood. If the power supply voltage is lower than the voltage of the overvoltage, the state is the same as before the voltage occurs.

IOU: In the voltage range 2V LT; VCC LT; 4V logic reset, all output enters three state. So the ground peak on VCC reset the logic. After that, the internal reset of the logic, L9947 is controlled again by the input.

Ground interrupt: L9947 has defense interrupt protection. This output OUT5 is closed during ground interruption. The output OUT1-OUT4 is shown in the application as the application. There is no path there through load or directly to another ground. This protects the equipment.

VCC interrupt

If there is a power supply voltage VS, and VCC is in D; interrupt or unpaid power supply, there can be two different situations: 1. Data pin D0 D0 -D3 can't help but drive μC or they are low. So the output is 1-out5 and D0-D3 is sad.

2. A D0-D3 was driven to high μC. The pins pass through the drain diode of the P-channel MOS (Figure 5). Depending on the CSN, some functions that cannot be ignored in R/WN and Mode in PUTs.