Device Description The znbg series devices are designed to meet the bias requirements of gaas and hemt FETs commonly used in satellite receivers LNBS, PMRs, mobile phones, etc., at least for external components.
Together with two capacitors and a resistor, the device provides the drain voltage and current to control three external grounded source FETs, producing the regulated negative rail bias required for FET gate operation during single-supply operation. This negative bias, at -2.8 volts, can also be used to provide other external circuits.
The znbg 3115/16 includes bias circuits for driving three external FETs. The device's control input selects one of the two FETs as operable and the third FET is permanently active. This function is commonly used as an LNB polarization switch. Also specific to general purpose LNB applications is a 22kHz tone detection and logic output feature used to enable high and low frequency switching.
The znbg3115/16 are designed to handle Diseqc 8482 ; ready set-top boxes and reject all channel switching transients.
The drain current setting of the znbg3115/16 is user selectable from 0 to 15 mA, up to the addition of a resistor. The series also offers a choice of FET drain voltage. The 3115 provides 2.2 volts of current, while the 3116 provides 2 volts of current.
These devices are unconditionally stable throughout the operating temperature with the FET in place, depending on including recommended gate and drain capacitors. Ensure RF stability and minimal injected noise.
The device used may be less than the full FET bias control, and the unused drain and gate supplemental connections can be left open without affecting the operation of the remaining bias circuit.
To protect the external FET circuit designed to ensure that under any conditions, including power rise/fall transients, the gate drive from the bias circuit cannot exceed the range of -3.5V to 1V.
Additionally, each stage has its own current limiter. Also, if the negative rail encounters a fault condition, such as an overload or a short circuit, the FET's drain will close to avoid excessive current flow.
znbg3115/16 offers the smallest device size among qsop16 and qsop20. The device operates from -40 to 80°C for ambient conditions.

Features • Provides bias for gaas and hemt FETs • Drives up to three FETs
• Dynamic FET protection • Drain current set by external resistors • Negative rail generator regulation only required
2 External Capacitors • Selection of Drain Voltage • Wide Supply Voltage Range • Polarization Switch for LNBS • 22kHz Tone Detection for Band Switching • Tone Detector Ignores Unwanted Signals Receiver Device • Compliant with Astra Control Specifications • QSOP 16 and 20 Surface Mount Package Applications • Satellite Receiver LNB
• Private Mobile Radio (PMR)
• Cellular phone

Test circuit 1
Note: The circuit used for the Qsop16 option is the same but with adjusted pins.

Chart function

Function description
The znbg device provides all the biasing requirements for the external FET, including the power supply needed to generate the gate bias generated by the negative single supply voltage. The picture above shows the znbg series. znbg3115/16 contains three stages. Negative rail generators are common equipment for both sides.
The drain voltage of the external FET qn is set by the znbg device to its normal operating voltage. This is determined by the znbg3115's board vd setting benchmark, which is nominally 2.2 volts, while the znbg3116 provides a nominal 2 volts.
The current leakage of the FET is monitored by a low value resistor ID sensor. The amplifier that drives the gate adjusts the voltage gate of qn so that the leakage current is related to the external RCAL resistor.
Since FETs are depletion-mode transistors, it is often necessary to drive their gate and cathode to ground to obtain the desired drain current. To provide this ability to be powered by a positive supply, the device includes a low current negative supply generator. This generator uses an internal oscillator and two external oscillator capacitors, CNB and CSUB.

The schematic below shows the functionality of the vpol input.

The two numbers Q1 and q2 are energized at any time and their selection is controlled by the input vpol. This input is designed to be wired through a high value ( 10K ) resistor to the LNB's power supply. FET Q2 is enabled when the input voltage of the LNB is set at or below 14V. FET Q1 is enabled when the input voltage is 15.5V or above. Failed FET gate drive is low and its drain terminal switch is open. Allows connection of drain pin D1 and D2 together if required by the application circuit; this is done internally in the QSOP16 version. FET number Q3 is always active regardless of the voltage applied to vpol.

For many lnb applications, tone detection for band switching is required. The znbg3115/16 includes the circuitry required to detect the presence of a modulated 22kHz tone on the LNB's power input. The main detector elements include op amps, rectifiers/smoothers, and comparators. The op amp has a preset internal feedback resistor that enables a simple RC network to be connected to the input, providing user-defined gain and low frequency cut-off filter characteristics. The rc network component also serves two purposes. Resistors provide overvoltage protection on the vpol pin and capacitors minimize tonal disturbances at the vpol threshold. The high frequency attenuation of this op amp has been set internally above 100kHz to allow the use of the amplifier with other common audio switching frequencies.
The rectifier/smoother/comparator functionality is provided by a complex dedicated circuit that allows the ZNBG3115 /16 to reliably detect the desired tone while ignoring the low frequency square wave switch box signal, common when using DISSEQC-2™ off-the-shelf set-top boxes DISSEQC™ pulses and power switching transients. This is all achieved without the need for any further external components. The comparator's threshold is powered. Therefore, the gain of the preceding op amp must be adjusted according to the supply voltage. Looking at the table below for recommended values for 22kHz detection gives a range of power supply recommendations.

Application Circuit The diagram below shows a portion of the application circuit for the znbg series, showing that all external components need to be properly biased. The bias circuit unconditionally stabilizes the associated FET and gate-to-drain capacitors in the circuit over temperature.
To minimize board space, the znbg3115/3116 are packaged in a qsop16. Decrease pin count Drain 1 Drain 2 already connected internally. This is possible because only one of the two biasing stages can be biased once. Compared with the qsop20 version, the size of qsop16 is reduced by 40%. Capacitors C2 and C4 ensure that residual power and baseboard generator noise are not affected by other external circuits that may be sensitive to RFI. They also suppress any potential RF feed between stages through the znbg device. These capacitors are required for all stages of use. Values of 10nF and 4.7nF respectively are recommended but this is design dependent and any value between 1nF can be used with 100nF.
Capacitors CNB and CSUB are integral parts of the znbgs negative to provide generators. Negative bias voltage is used on the chip using the internal oscillator. The CNB and CSUB of the required value capacitors are 47nF. This generator produces a power supply with a small current of about 3 volts.
Although this generator is purely for biasing external FETs, it can be used to power other external circuits via the CSUB pin. Resistor RCAL sets the drain current so that all external FETs are operated. If no bias control circuits are required, the associated drain and gate connections may cause open circuits affecting the remaining bias circuits. znbg devices have been designed to protect external FETs under harsh operating conditions.
The gate output voltage of the JFET circuit connected to any biased circuit must not exceed the range -3.0V to 1V under any conditions, including power-up and power-down transients. All bias stages including leakage current limiting work independently at each stage. Should the negative bias generator be shorted or overloaded so that the drain current of the external FET can no longer be controlled, the drain supply to the FET is turned off to avoid damaging the FET with excessive drain current.

The following block diagram shows the main parts of the LNB designed for use with the Astra series of satellites. The znbg3115/16 is the core bias and control element of this circuit. znbg provides negative rail, fet bias control, polarization switch control, tone detection and minimal external band switching components. Compared to other discrete component solutions, znbg circuits reduce component count and overall size requirements.

Single Generic LNB Block Diagram

Provides tone detection and band switching on znbg3115/16 devices.
The diagram below describes how this function operates in the LNB and the required external components. 22kHz is there tone applied to the pin fin to make one of two outputs, LB and Hb. Toned makes hemoglobin and untoned makes lb.lb and hb outputs designed to be compatible with mmic and discrete (bipolar or fet) local oscillator applications, selected by pin lov. Referring to Figure 1, grounding the line pin lov will force lb and hb to switch between -2.6V (disabled) and 0V (enabled). Referring to Figures 2 and 3, connecting pin LOV to a positive voltage supply (such as a voltage divider on VCC and ground set to the desired oscillator supply voltage) will force the LB and HB outputs to provide the desired oscillator supply, enabling VOSC when disabled, 0V when disabled.