General Instructions
W83792AD /AG and W8392D/G are two parts that support single-CPU and dual-CPU applications, the former is for single-CPU applications, providing 1 set of thermal trip and 1 set of VID control; the latter is used for dual-CPU applications, providing dual-CPU VID control and 2 sets of thermal trips. Except thermal trip and VID control number, other functions are the same, no difference.
The W83792D/G is an upgraded version of the W83791D, Winbond's most popular hardware condition monitoring IC. In addition to the regular functions of W83791D, W83792D/G also provides some unique innovative functions, such as supporting dual CPU video control, supporting VRM9.0 and VRD10.0 specifications, compliant with ASF 2.0 specifications, compatible with SMBus 2.0 ARP commands, 2 groups of thermal Trip, 12 video controls, 6 groups of smart fans TM, video table selection trap. Traditionally, W83792D/G can be used to monitor several key hardware parameters of the system, including power supply voltage, fan speed and temperature, which are very important for high-end computer systems such as servers and workstations, and work very stably and efficiently.
The W83792D/G has a built-in 10-bit analog-to-digital converter (ADC), and the W83792D/G can simultaneously monitor 9 analog voltage inputs (including power supply VDD/5VSB monitoring), 6 fan tachometer inputs, 3 remote temperature and watchdog timing device function. Remote temperature sensing can be performed by a thermistor or directly from an inteltm cpu with thermal diode output. W83792D/G provides 6 PWM/DC fan output modes for smart fan control - S Thermal CruiseTM T-mode and S Smart FantM II T-mode. In S-thermal CruiseTM T mode, under hardware control, the temperature of the CPU and system can be maintained within a specific programmable range. Smart Fan TM II provides 4 sets of temperature points, each temperature point can control the duty cycle of the fan, so the fan can run at the lowest speed possible, thus avoiding noise. In terms of alarm mechanism, w83792d/g provides smi, ovt and irq signals for system protection events.
In addition, 12 vid inputs are provided for reading vids of 2 sets of cpus (ie pentiumtm iii/4). These vid inputs provide the vcore voltage information expected by the cpu. The W83792D/G also has 2 specific pins that provide optional address settings for applications with multiple devices (up to 4 devices) connected via the I2C interface.
w83792d/g can uniquely act as an asf sensor, responding to the request of the asf host to implement network management in the absence of os. With the w83792d/g compliant with the asf2.0 sensor specification, the web server is able to monitor each os is not The state of the environment for the stateful client. In addition, w83792d/g supports smbus 2.0arp command, after w83792d/g's udid is sent, dynamically assigns a new unique address to w83792d/g asf function to solve address conflict problem.
Through application software or bios, users can read all monitoring parameters of the system at any time. A popup warning can also be activated when a monitored item is outside the correct/preset range. The application software can be winbond's hardware doctor, intel ldcm (landesk client management) or other management application software. In addition, the user can set upper and lower limits (alarm thresholds) for these monitored parameters and activate a programmable and maskable interrupt. Trademark and Trademark Characteristic Ore Monitoring Project
y supports dual CPU video reading. Compliant with Y VRM9.0/VRD10.0 standard, it can monitor dual CPU voltage. Y 2 sets of thermal trip latch mechanism to protect the CPU from overheating.
Monitoring items
y Monitors 9 voltage inputs.
y 6 DC/PWM fan outputs for fan speed control and 6 fan speed inputs for monitoring - a total of 6 sets of fan speed monitoring
y 3 temperature inputs from remote thermistor and PentiumTM II/III/4 (Deschutes) thermal diode outputs
y 6 smart fansTM can automatically control the most suitable speed according to the temperature.
y out-of-box detection input
y 2 sets of CPU thermal management: 2 thermal trip signals latch and generate VRM_en signal to PWM to remove CPU power. y Programmable hysteresis and set points (alarm thresholds) for all monitored items
Address Resolution Protocol (ARP) and Alerting Standard Format (ASF 2.0)
y Support System Management Bus (SMBus) version 2.0 specification /Off remote control, monitoring fan speed, voltage, temperature, thermal trip and case open)
y Supports a subset of remote controls: remote on/off/reset.
Action enablement
y emit smi, ovt, irq signals to activate system protection in the application y warning signal popup.
General
y I2C serial bus interface
y Supports 2 groups of 6-bit video monitoring for dual-processor applications, with pins: reset, watchdog timer function of sysrst_in.
y 2 pins (a0, a1) with optional address settings for applications with multiple devices (up to 4 devices) connected via i2c interface
y Winbond hardware monitoring application software (Hardware DoctorTM) support
Windows 95/98/ 2000 /XP and Windows NT 4.0/5.0/2000 Y 5V VSB operation

Pin configuration

General Instructions
The w83792d/g provides 9 analog voltage inputs, 7 fan speed inputs and output controls, supports pwm (pulse width modulation) control and DC (DC) fan control, all implemented with smart fantm i and smart fantm ii. The W83792D/G also supports 3 sets of thermal inputs for remote thermistor or PentiumTM 4 thermal diode outputs, and out-of-box detection. In addition, W83792D/G also provides some innovative and practical functions to make the whole system management more efficient and more in line with the trend of future network management. If ASF2.0 sensors are compatible, the power control system can be remotely turned on/off, reporting the status of thermal trips, fans and temperature limits. Also, it is compatible with smbus 2.0arp commands. The VID table can be selected according to the hardware trap of VRM9.0 and VRD 10 specifications. Dual processor 2 sets of 6-bit VID input/output control, disable VRM module 2 sets of thermal trip input, and, once the monitoring function of the W83792D/G is enabled, the watchdog will monitor each function and store the value into the register for Compare with preset range. If the monitoring value exceeds the limit value, the interrupt status will be set to 1, if not masked, the w83792d/g will send out interrupt signals such as smi and irq. The W83792D/G also provides software and hardware watchdog timers to avoid system hangs. Access interface W83792D/G provides I2C serial bus for microprocessor to read/write internal registers. In w83792d/g, there are three serial bus addresses. The first serial bus address through the FIw83792d/g has two hardware set bits set by pins 15-16. The address is 01011[pin15][pin16]x, so if pin15=1 and pin16=0, the content of cr[48h] is 00101110. CPUT1/CPUT2 temperature sensor registers can be read/written via the second address (defined at CR[4AH] bits 2-010011[ia1][ia0]x) and the third address (defined at CR[4AH] bits 6- 410010[ia1][ia0]x) to implement. At the first address defined at CR[48h], all registers can be read/written.

Introduction to Address Resolution Protocol (ARP) Since the W792D2/G is a slave device that exists on the system management bus, it must have a unique address to prevent itself from conflicting with other devices that exist on the same bus. To solve the address conflict problem, smbus version 2.0 introduced the concept of dynamically assigning addresses, called the Address Resolution Protocol (arp). Through this mechanism, each device that exists on the SMBus will have a unique slave address if it is an ARP capable device. Therefore, in order to meet the new specification, w83792d/g uniquely provides arp compatible function to obtain unique slave address.
The typical process of arp includes steps such as preparing arp, resetting the device, obtaining udid, and assigning an address. When the slave device accepts the command from the arp host, it must reply to the arp host, so that the arp host can proceed to the next step. In order to provide a device isolation mechanism for address assignment, each device must implement a unique device identifier (udid). udid is a 128-bit number consisting of several fields including device capability, version revision, vendor id, device id, interface, subsystem vendor id, subsystem device id, and vendor specific id. After the udid of the device is sent to the arp host, the arp host will assign an address that is not in the used address pool to the device.
Generally speaking, there are eleven possible commands to read/write data from smbus devices, and slave devices can communicate using any or all of the eleven protocols. These protocols are quick command, send byte, receive byte, write byte, write word, read byte, read word, process call, block write, and block write block read process call. The w83792d/g natively supports the block write block read process using pec to communicate with the arp host. The following are descriptions of the smbus packet protocol diagram element keys. Not all protocol elements will appear in every command, that is, not all packets need to contain packet error codes.
Introduction to ASF (Alarm Standard Format) In order to implement network management in the absent operating system, w83792d/g provides asf response registers that meet the asf sensor specification, so the network server can monitor the absent operation through the pet frame value returned by w83792d/g Multiple environmental states for clients in the system, including temperature, voltage, fan speed, and chassis open. Below is the ASF diagram:

Platform Event Trap (PET)
pet is the asf transport protocol used to provide common fields for traps regardless of the source of the trap. The variable binding fields in the pet frame contain the system and sensor information of the event, such as event sensor type, event type, event offset, event source type, sensor device, sensor number, entity ID, entity instance, event state index, event Status and event severity. Each field has its definition and is described in the table below.

Analog Input The maximum input voltage to the analog pins is 4.096V because the 10-bit ADC has a 4MV LSB. In fact, PC monitoring applications are usually connected to the power supply. The CPU V-core voltage, +3.3V and battery voltage can be connected directly to these analog inputs. The -5V, -12V, and +12V inputs should be reduced by a factor with external resistors to meet input range requirements.

PS: VCore channel resolution=2mV VIN0-4 channel resolution=4MV

Fan speed control
W83792D/G provides 6 groups of PWM and DC modes for fan speed control. The duty cycle of the pwm can be programmed by the 4-bit registers defined in bank0 cr[81], cr[83], cr[94], cr[a3], cr[a4] and cr[a5]. The default duty cycle is set to 100%, that is, the default 4-bit register is set to 0x8FH.

The application circuit is shown in the figure below

Care must be taken when choosing op amps and transistors. The op amp is used to amplify the 5V range of the DC output to 12V. The transistors should have an appropriate beta value to avoid their base current pulling down the op amp's output and get a common current that keeps the fan running at full speed. (For more cost and work efficiency solutions, please refer to W8339TS/QS - this is a DC fan pre-driver which can provide gate voltage up to 24V for external N-channel mosfet with lower cost and better performance)
Smart Fan I Control
W83792D/G supports two smart fan functions, which are mapped to temp1 (fan1, pwmout1), temp2 (fan2, pwmout2), temp3 (fan3, pwmout3). The smart fan control provides two mechanisms. One is thermal cruise mode and the other is Smart Fan II mode.
Temperature Cruise Mode In this mode, the W83792D/G provides an intelligent fan system that automatically controls the fan speed to keep the temperature of the CPU and system within a specific range. First, the bios has to set the desired temperature and time interval (eg 55°C ± 3°C), the fan speed will be reduced as long as the current temperature remains below the set value. Once the temperature exceeds the upper limit (58°C), the fan will turn on at a specific speed set by the BIOS (eg: 80% duty cycle) and automatically control its PWM duty cycle as the temperature changes. Three situations may occur:
(1) If the temperature still exceeds the upper limit (eg: 58°C), the PWM duty cycle will slowly increase. If the fan has been running at full speed but the temperature still exceeds the upper limit (eg: 58°C), a warning message will be issued to protect the system.
(2) If the temperature is lower than the upper limit (Ex: 58°C), but still higher than the lower limit (Ex: 52°C), the fan speed will be fixed at the current speed because the temperature is within the target range (Ex: 52°C~ 58°C).
(3) If the temperature is below the lower limit (eg: 52°C), the PWM duty cycle will slowly decrease to 0 or the preset stop value until the temperature exceeds the lower limit.

Monitoring temperature from thermistor:
The W83792D/G can connect three thermistors to measure three different ambient temperatures. The thermistor's specifications should consider (1) a beta value of 3435K and (2) a resistance value of 10K ohms at 25°C. In Figure 11, the thermistor is connected by a 10K ohm (1% error) series resistor to VREF (pin 37).
Monitor temperature from Pentium IVTM thermal diode or bipolar transistor 2N3904
The W83792D/G can replace the thermistor with a Pentium IVTM thermal diode interface or a transistor 2N3904, the circuit connection is shown in Figure 11. The D- pin of the Pentium IVTM is connected to the power ground (GND) and the pin D+ is connected to the pin VTINX in the W83792D/G. Resistor R=30K ohms should be connected to VREF to provide diode bias current and bypass capacitor C=3300pF should be added to filter high frequency noise. The transistor 2N3904 should be connected with a diode, i.e. the base (B) and collector (C) in the 2N3904 should be connected together to act as a thermal diode.

SMI interrupt for W83792D/G voltage
The SMI voltage interrupt is a two-interrupt mode. If the previous interrupt was reset by reading all interrupt status registers, a voltage exceeding the upper limit or falling below the lower limit will cause an interrupt
SMI Interrupt for W83792D/G Fans The SMI Interrupt for fans is a two-interrupt mode. Fan count over limit or over then under limit will cause an interrupt if the previous interrupt was reset by reading all interrupt status registers.

W83792D/G Temperature Sensor 1/2/3 SMI Interrupt(1) Comparator Interrupt Mode Over temperature causes an interrupt which will be reset by reading all interrupt status registers. Once an interrupt event occurs, it exceeds, then resets, and if the temperature remains above thyst, the interrupt will reoccur when the next conversion is complete. If an interrupt event occurs for more than to, but has not been reset, the interrupt will not occur again. The interruption will continue to occur in this manner until the temperature falls below thyst.
(2) Two-interrupt mode If the previous interrupt is reset by reading all the interrupt status registers, the temperature exceeding thyst will cause an interrupt, and then the temperature below thyst will also cause an interrupt. Once an interrupt event occurs over, then reset, if the temperature remains above thyst, the interrupt will not occur.
(3) One-time interrupt mode temperature exceeding thyst will cause interrupt, then temperature lower than thyst will not cause interrupt. Once an interrupt event occurs by exceeding to and then falling below thyst, no further interrupt will occur until the temperature exceeds to.

W83792D temperature sensor 1/2/3 temperature is too high (ovt)
Comparator Mode:
Exceeding the temperature will cause the ovt output to activate until the temperature falls below thyst.
Interrupt Mode:
Excessive temperature causes the ovt output to activate indefinitely until reset by reading the temperature sensor 1 or sensor 2 or sensor 3 registers. Temperature over thyst, then ovt reset, then temp below thyst also causes ovt to activate indefinitely until reset by reading the temperature sensor 1 or sensor 2 or sensor 3 registers. Once the ovt is activated by exceeding to, and then reset, the ovt will not activate again if the temperature remains above thyst.
ACPI Mode In this mode, the temperature exceeds a temperature separation level, starting at 0 degrees, causing the ovt output to activate. Once the temperature exceeds the next level, the ovt will be activated again. When the temperature drops, the output will work the same way.

The W83792D also provides a special mode for fans. This is called Smart Fan II mode. In this mode, W83792D will output a fixed period when the relevant temperature sensor detects the temperature in the preset temperature area. Their relationship is shown in the figure below.
5FH specifies a temperature point above which all fans will be pushed to full speed if any temperature sensor is sensed above that point. The default value is 127 degrees, that is, this is disabled because the temperature in w83792d cannot be higher than 127 degrees.
In register e0h, ebh defines the relationship between temperature and duty cycle. The previous target temperature and no-stop duty cycle are also used as temperature point 1 and minimum duty cycle.
To prevent the fan duty cycle from throttling at temperature points, a hysteresis mechanism is provided using a temperature tolerance (87h, 97h). As the temperature rises (blue line), the duty cycle changes only when the temperature reaches the temperature point + tolerance. Conversely, when the temperature gets lower (green line), the duty cycle changes only when the sensor temperature drops to the temperature point-tolerance.