Features

Single power supply 5V Run

Turn off the power supply (LTC1297)

Each conversion

60kHz the largest maximum maximum Volver (LTC1292)

Direct 3 -wire interface of most MPU serial ports

All MPU parallel ports

Simulation input co -mode power rail

Main specifications

Resolution: 12 bits

Quick conversion time: 12 μs maximum temperature

low power supply current: 6.0ma

Turn off the power supply current: 5μAAAAA: 5μAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAOOOROROAOOOAOOOAOOOAOAOAOAAOAAAAAAEOREAularularularularularularularularularularularularularularularularularularularular (LTC1297)

Instructions

LTC #174; 1292/LTC1297 is the data collection system contains 12 -bit switch capacitors to continuously approach A/D, differential input, sample and (+) input and string Line I/O. When LTC1297 is free, it will automatically shut down and reduce it, and the power current is 5 μA. LTC1292 can be used for DSP applications with excellent communication characteristics at a rate of digital signals of 60kHz. All these functions are encapsulated in 8 -pin DIP to use the LTCMostM switch capacitor technology. The serial I/O design does not require communication hardware to most MPU serial ports and all MPU parallel I/O ports allowed data to be transmitted through three lines. Because of their accuracy, ease of use and small packaging dimensions, these devices are very suitable for digital simulation signal interconnection and power consumption in remote applications

For over -pressure protection The input current is limited to 15mA to fix the input end to VCC and GND through the 1N4148 diode. When any input is overwrite, the conversion result is invalid (vin lt; gnd or vin gt; vcc). See the application information of the overvoltage protection part.

Major value

Power voltage (VCC) ground 12 volts

Voltage

Simulation and reference

Input - 0.3V to VCC+0.3V

Digital input -0.3 volts to 12 volts

Digital output -0.3v to VCC+0.3V

Power consumption 500 MW [ 123]

Work temperature range

LTC1292/LTC1297BC, LTC1292/LTC1297CC,

LTC1292/LTC1297DC 0 ° C to 70 ° C

[]123] LTC1292BI, LTC1292CI,

LTC1292DI – 40 ° C to 85 ° C

Storage temperature range –65 ° C to 150 ° C

lead temperature (welding, 10, 10 2) 300 degrees Celsius

The characteristics of the converter and multi -road relics

indicate that the specifications are suitable for the entire working temperature range, otherwise the specifications are TA u003d 25 ° C. (Note 3)

Exchange features

indicate the specifications suitable for the entire working temperature range, otherwise the specifications are TA u003d 25 ° C. (Note 3)

Digital DC special feature

indicates that the specifications are suitable for the entire working temperature range, otherwise the specifications are TA u003d 25 ° C. (Note 3)

Note 1: The absolute maximum rated value means that the value device that exceeds life may be damaged.

Note 2: All voltage values u200bu200bare related to grounding (unless there are other regulations).

Note 3: VCC u003d 5V, VREF u003d 5V, CLK u003d 1.0MHz, unless there are other regulations.

Note 4: A LSB is equal to VREF division 4096. For example, when VREF u003d 5V, 1LSB u003d 5V/4096 u003d 1.22MV.

Note 5: Linear error refers to the A/D conversion curve. From the central measurement deviation quantum band.

Note 6: Recommended operation conditions.

Note 7: The diode connects to each reference and analog input on the two films. It will transmit a diode as a reference or analog input voltage below GND or lower than VCC. Be careful of VCC levels (4.5V) at low voltage. As a high -level reference or analog input (5V), it can cause the transmission of this input diode, especially at high temperatures, and cause inputs close to the full standard. mistake. This specification allows 50mv positive bias to be at any diode. This means that as long as the reference or simulation input does not exceed 50mV of the power supply voltage, the output code is right. Therefore, the input voltage range with an absolute 0 to 5 volts requires minimum power supply voltage exceeding the initial tolerance of 4.950V, and temperature changes and loads.

Note 8: The channel leakage current is measured after the channel is selected.

Note 9: The increase in leakage current at high temperature leads to S/H speed reduction. Therefore, it is recommended that at 125 ° C, FCLK ≥125kHz, 85 ° C at 85 ° C, FCLK ≥ 31kHz, and at 25 ° C. ]

Typical performance features

When the CLK frequency decreases from 1MHz, the smallest CLK frequency ( #8710; error ≤0.1LSB) indicates the first detection of any code conversion from its 1MHz value to 0.1LSB 0.1LSB Frequency (Note 9).

1. The maximum CLK frequency represents the CLK frequency of 0.1LSB offset from the first detection of 1MHz value.

2. The maximum filter represents the resistance value full margin error when the filter 0.1LSB changes. First, the filter u003d 0

pin function

cs (pin 1): chip selection input. The logic of this input enables LTC1292/LTC1297. When the CS becomes high, the power supply on the LTC1297 is turned off.

+in, --in (pin 2, 3): Simulation input. These inputs must be no noise.

GND (pin 4): Sims ground. GND should be tightened to simulate the ground plane.

VREF (pin 5): Reference input. Refer to the input definition D/A converter must maintain the noise of freedom relative to GND.

DOUT (pin 6): digital data output. The A/D conversion results will be moved out of this output.

CLK (pin 7): shift clock. This clock synchronizes serial data transmission.

VCC (pin 8): Positive power supply. This batch of goods must be available for free to eliminate noise and ripple ground plane by directly bypass to the simulation circuit.

Note 1: Polka 1 for output for internal conditions, unless the output control is disabled, the output is high level.

Note 2: Polka 2 is used for low output output as follows in internal conditions, unless the output control is disabled.

LTC1292/LTC1297是数据采集组件包含以下功能块：

1.2位连续近似电容式A/D转换器

2.差分输入

[123 ] 3. Sample and maintenance (s/h)

4. Synchronous, half -dual serial interface

5. Control and time logic

Digital considerations Consider serial interface interfaces

LTC1292/LTC1297 communicates with microprocessors and other external circuits through synchronous half -work three -line serial interface (see the operation sequence). The clock (CLK) synchronizes data transmission at the edge of the clock. LTC1292/LTC1297 does not need to be configured input words, no DIN pinEssence They are permanently configured to have a single differential input and form a single pole conversion. The decreased CS starts data transfer. To restore the LTC1297 to the power supply shutdown mode, Tsucs must be satisfied. Then the first CLK pulse enables DOUT. After an empty level, the A/D conversion result is output with the first sequence of the MSB on the DOUT row and then the first sequence of LSB. Use the half -work serial interface data from the current converter. This provides a simple interface for MSB-FIRST or LSB-FIRST

ATIO application

serial port. Make CS high -reset LTC1292/LTC1297 for the next data exchange and turn the LTC1297 power supply.

Table 1. Micro -processor with hardware serial interface compatible with LTC1292/LTC1297*

Micro processor interface

LTC1292/ LTC1297 can directly interface (no external hardware) to the most popular microprocessor (MPU) synchronous serial format (see Table 1). If you use a microprocessor without a dedicated serial port, and then the parallel port of the MPU can be programmed as a serial link with LTC1292/LTC1297. Including a serial interface here and an example parallel port programming to form a serial interface.

Motorola SPI (MC68HC11)

MC68HC11 is selected as a microprocessor. This microprocessor transmits data MSB to increase with 8 bits. Send to the data register to start the SPI process. There are two 8 -bit transmission, and A/D results are read into a microprocessor (Figure 1). For the first 8 -bit transmission clock B11 to B8 of the LTC1292, the A/D conversion result is input the processor. In the second 8 -bit transmission, the remaining B7 to B0 clock input

MPU. The data is right in the two memory (Figure 2). This is the decline of the CS that delayed continues until the second CLK. The first byte of stability with 0FFHEX is removed. This operation is not included in the code. It can insert data collection in the cycle or outside the cycle when the data is processed for the LTC1297 (Figure 3). The TSUCS data word is sent to the data register before adjusting the setting time of the dummy. For the first time, the clock B11 to the B6 processor from the transformation result of the A/D conversion. The second 8 -bit transmission will be kept B5 to B0 in MPU. Note B1 and B2 Start with LSB, the first data word is also recorded in the case

123] The data rotates right to the right at the right side of the two memory positions (Figure 4). The first byte and 0FHEX are cleared four highest effective positions. This operation is not included in the code. It can insert the data in the data as the processing. The interface of parallel ports with the Intel 8051 series selected Intel 8051 to display the microprocessor between the interface between the LTC1292/LTC1297 and the parallel port. The signal CS and CLK are on the two port lines, and the DOUT signal is read on the third port. After falling the edge of the CLK, each data bit is loaded to the place, and then rotates into the accumulator. Once the first 8 MSB is transferred to the accumulator and loaded to the register R2. The last four were shifted into the register R3 in the same way. The output data is aligned in the register R2 and R3 (Figure 5). For LTC1297, the code after four NOPCS needs to be inserted in 8051 lower to allow LTC1297 to wake up the power shutdown (TSUCS).

Sharing serial interface

LTC1292/LTC1297 can share the same dual -line and other peripheral components or other LTC1292/LTC1297s (Figure 6). In this case, CS sends a signal to determine which LTC1292 is processing MPU. Simulation considerations

ground

LTC1292/LTC1297 should use ground plane and single -point grounding technology with the simulation device. Do not use metal wire entanglement technology for test boards and assessment equipment. Reached the best performance