Features: Three fourth-order 8MHz (SD) filters External delay control Transparent input clamping Dual video load drive (2vpp, 75Ω) AC or DC coupled input AC or DC coupled output DC coupled output eliminates AC coupling capacitors only 5V lead-free packaging : TSSOP-14

Application: Cable STB Satellite STB DVD Player HDTV Personal Video Recorder (PVR) Video on Demand (VOD)

Description: Intended to use the FMS6243 Low Cost Video Filter (LCVF) to replace passive lc filter and driver integration devices at low cost. Three fourth-order filters are provided with typical second or third-order passive solutions. The FMS6243 can drive DAC outputs directly by DC coupling or AC-coupled signals. Inner diodes can be used if AC coupled, and a bias circuit can be used if the input is required (see details). The delay of each channel can be controlled independently with external capacitors. The outputs can drive AC or DC coupled single ( 150 Ω) or dual (75 Ω) loads. The DC coupling removed at the output requires an output coupling capacitor. The input DC output level is offset by approximately +280MV. (See the Applications section for details).

Application Information: The FMS6243 Low Cost Video Filter (LCVF) provides 6dB of gain from input to output. Also, the input is slightly offset to optimize output driver performance. The offset is kept to the minimum required to reduce the continuous DC current of the input load. Typical voltage levels are shown in the figure below:

The FMS6243 provides an internal diode clamp to support AC-coupled input signals. If the input signal is not below ground, the input clamp does not work. This allows the DAC output to directly drive the FMS6243 AC coupling capacitor. When the input is AC coupled, the diode clamp sets the sync tip (or lowest voltage) to ground. Worst-case sync tip compression to the clamp cannot exceed 7MV. The set input level clamp combined with the internal DC offset keeps the output within acceptable limits. For symmetrical signals such as chrominance, u, v, pb, and pr, the average DC bias is fairly constant, and the input can be AC plus a pull-up resistor DC input voltage. The DAC output can also drive these signals without AC coupling capacitors. conceptual

The diagram of the input clamp circuit is as follows: I/O Configuration For DC-coupled DAC drivers with DC-coupled outputs, use

This configuration:

The same method applies to biased signals adding a pull-up resistor to ensure the clamp never moves. The internal pull-down resistance is 800kΩ±20%, so the external resistance should be 7.5MΩ, setting the DC level to 500MV.

NOTE: Video skew or line time distortion is dominated by the AC coupling capacitor. The value may need to be increased above 220µF for satisfactory operation in some applications. Power consumption When calculating the total power consumption. Care must be taken not to exceed the maximum die junction temperature. The following example can be used to calculate power

Heat dissipation and internal temperature rise: Board layout also affects thermal characteristics. See the Layout Considerations section for more information. The FMS6243 specifies that the output current is typically less than 50mA, which is greater than a dual (75Ω) video load. The internal amplifier is current limited to 100mA maximum and should withstand short-duration, short-circuit conditions; however, this capability. Not guaranteed. Group Delay Adjustment The FMS6243 is capable of independently adjusting the in x/x group delay and each channel delay for chroma/luma. This is accomplished by placing a capacitor device on the delay adjustment pin to ground. Group delay is adjustable from nominal +10ns to -80ns. This means that, under normal conditions, a video system may have an overall group delay measurement of +50 ns. If the system specification is +40ns, the FMS6243 can be used to reduce the set of delays to a guardband system variation within specification. Adding a 50pf capacitor to the desired channel dcap pin (see picture) through the FmS6243, with the system, gives an overall group delay of +30ns for a new system. It now complies with the system specification + 10ns guard band for system group delay variation. The figure shows the FMS6243 by adding a capacitor to the DCAP pin. The correct capacitor can be determined by determining the video system (NTSC 3.58 or PAL 4.43) and then choosing the desired group delay delay summed with the entire system. The required delay and format line intersection is the required delay capacitor for the DCAP pin.

Layout Considerations The delay capacitor pins (1, 7, and 9) are very important. Place the delay capacitor as close to the device as possible to the pins. The ground connection should be as short as possible, preferably directly to the adjacent ground pin. These layout considerations create the best possible noise reduction for equipment and the environment. General floorplan and power supply bypass in high frequency performance and thermal characteristics. Fairchild provides a demo board to guide the layout as well as aid device evaluation. The demo board is a four-layer board with full power and ground plane. Following this layout configuration provides the best performance and thermal characteristics of the device. For best results, follow the steps and recommended routing rules listed below. Recommended routing/layout rules Do not run analog and digital signals in parallel. Powered using separate analog and digital power strips. All traces should be on top of the ground plane. There should be no traces on the ground/power shunt. Avoid wiring at 90-degree angles. Minimize clock and video data trace length differences. Includes 10µf and 0.1µf ceramic power supply bypass capacitors.

Place a 0.1µF capacitor at the device power pins. Place a 10µF capacitor at the device power pins. For multi-layer boards, use a large ground plane to help dissipate heat. For two-layer boards, use an extended ground plane that extends at least 0.5 inches beyond the main body of the device. A layer of metal paddles is included under the unit on the top. Minimize all trace lengths to reduce series inductance. Thermal considerations Since the interior of most systems, such as set-top boxes, TVs and DVD players are +70°C; consideration must be given to providing adequate heat sinks to provide maximum heat dissipation for the device package. When designing your system board, make sure that power is dissipated from each device. Make sure that the device high power is not in the same location, such as directly above (top plane) or below (bottom plane), each other on the PCB. PCB Thermal Layout Considerations Learn about system power requirements and environmental conditions. Maximize printed circuit board thermal performance. Consider using 70µm copper for high power designs. Make the pcb as thin as possible by reducing the fr4 thickness. Use the vias on the power board to connect adjacent layers together. Remember, the base temperature is the board area, not the copper thickness. Analog modeling techniques provide a first-order approximation.