Internal Avalanche Rugged Sensing FET Consumes only 0.65W at 240V AC and 0.3W Load Advanced Burst Mode Operation 8226 ; Low EMI Frequency Modulation Accurate Fixed Operating Frequency Internal Thermal Shutdown Function Auto-Restart Die Under-Voltage Lockout Low Operating Current (3MA) Adjustable Peak Current Limit Built-in Soft-Start

Applications: Switching power camera adapters for VCRs, SVRs, set-top boxes, DVDs and DVCDs for printers, fax machines and scanners

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The fsdl0165rn is an integrated pulse width modulator (PWM) specially designed for high performance off-line switching power supplies (SMP) and sensing FETs with minimal external components. This device is an integrated high voltage power switching regulator current mode pwm avalanche rough sense FET control block. Features of the integrated pwm controller include: fixed oscillator with frequency modulation to reduce EMI, undervoltage lockout (UVLO) protection, leading edge blanking (LEB), optimized gate on/off driver, thermal shutdown (TSD) protection, abnormal Over Current Protection (AOCP) and temperature compensated precision current sources for loop compensation and fault protection circuits. When combined with discrete mosfet and controller or rcc switching converter solutions, the fsdl0165rn reduces overall component count, design size, and weight while increasing efficiency, productivity and system reliability. This device is a basic platform converter well suited for cost-effective flyback designs.

Table 1. Notes: 1. Typical continuous power in a non-vented enclosed adapter with adequate drain pattern or heat sink measured at an ambient temperature of 50°C. 2. Maximum practical continuous power in open frame design with sufficient gutter heat sink in 50°C environment. 3. 230 VAC or 100/115 VAC doubles.

Function description: 1. In previous generations of Fairchild Power Switch (FPSTM) VSTR pin has an external resistor DC input voltage line. In this generation, the start-up resistor is powered by an internal high voltage current source and the switch voltage VCC is turned off after 15 minutes of power supply is higher than 12V. If VCC drops below 8V.

2. Feedback control: FSDL0165RN adopts current mode control, as shown in the figure. Optocouplers (such as h11a817a) and shunt regulators (such as ka431) are commonly used to implement feedback networks. Comparing the feedback voltage to the voltage across the sensor resistor plus the offset voltage controls the switching duty cycle. When the KA431 exceeds the internal reference voltage of 2.5V, the H11A817 A LED current increases, thereby reducing the feedback voltage and reducing the duty cycle. This activity occurs when the input voltage increases or the output load decreases. 3. Leading edge blanking (Leb): At the moment when the internal sensing FET is turned on, there is usually a large current spike of the induced current transformer caused by the primary side. Capacitor and secondary side rectifier diode reverse recovery. Excessive voltage on the RSENSE resistor can result in incorrect feedback operation control in current mode. To counteract this effect, fpstm uses an edge blanking (LEB) circuit. This circuit suppresses the short-time comparator (TLEB) turning on after the PWM sensing FET is activated.

4. Protection circuit: FPSTM has several protection circuits such as overload protection (OLP), over voltage protection (ovp), abnormal over current protection (AOCP), under voltage lockout (UVLO) and thermal shutdown (TSD). Since these protection circuits are fully integrated inside the integrated circuit with no external components, reliability is improved without increasing cost. Once a fault occurs, the switch is terminated and the detection FET remains off. This causes VCC to drop. When VCC reaches the uvlo stop voltage, 8v, the protection resets the internal high voltage current source to charge the VCC capacitor through the VSTR pin. When VCC reaches the UVLO startup voltage of 12V, the FPSTM resumes normal operation. In this way, auto-restart can alternately enable and disable the switching of the power-sensing FET until the fault is eliminated. 4.1 Overload Protection (OLP): Overload is defined as load current exceeding a preset level due to unexpected events. In this case, the protection circuit should be activated to protect the SMPS. However, even when the switching power supply is operating normally, overloading during the load transition can activate the protection circuit. To avoid this undesired operation, overload protection circuits are designed to determine whether this is a transient condition or an overload condition as specified. Combined with the IPK current limit pin (if used) the current mode feedback path will limit the meaning of the current, when maximum PWM operation is reached in the loop. If the output consumes more than this maximum power, the output voltage (VO) drops below the set value. Voltage. This reduces the current through the optocoupler LED, it also reduces the current through the optocoupler transistor, which increases the feedback voltage (vfb). If VFB exceeds 3V, the feedback input diode is blocked and the 5UA IDELAY current source begins to slowly charge the CFB until it reaches VCC. Under this condition, VFB continues to increase until it reaches 6V, at which point the switching operation is terminated as shown. The shutdown delay is the time it takes to charge

4.2.Thermal shutdown ("TSD"): The sense fet and the control IC are integrated, making it easy to control the IC to detect the temperature of the sensor. When the temperature exceeds about 140 ℃, activate the abnormal protection on 4.3 current protection when thermal fracture) The circuit is shown in the figure. When the gate is opened a signal is applied to the power sense FET, the AOCP block is enabled and monitors the current through the sense resistor. Then compare the voltage across the resistor with the preset AOCP level. If the sense resistor voltage is greater than the AOCP level, a pulse by pulse triggers the AOCP regardless of the uncontrollable LEB time. Here, one by one AOCP stops working within 350ns after the induction FET is activated. 4.4 Over Voltage Protection (ovp): When the secondary side feedback loop or feedback loop fails due to the open circuit caused by the solder defect, the current passing through the optocoupler transistor is almost zero. The vfb then ramps up to overload in a similar fashion, forcing a preset maximum current to the SMPS. until the overload protection is activated. Because excess energy is supplied to the output, the output voltage can exceed the rated voltage before overload protection activates, resulting in a second side. To prevent this from happening, a voltage protection (ovp) circuit is used. In general, VCC is proportional to the output voltage, which FPSTM uses instead of directly monitoring the output voltage. If VCC exceeds 19V, the ovp circuit is activated, resulting in termination of the switching operation. To avoid accidental activation of the ovp during normal operation, the vcc should be properly designed to be below 19V. 5. Soft-start: FPSTM has an internal soft-start circuit that increases the feedback voltage and sensitivity to slow FET current after startup. A typical soft-start time is 15 ms, as shown in Figure 8, where it is during the start-up phase. The pulse width of the power switch is gradually increased to establish the correct operating conditions of the transformers, inductors and capacitors. The voltage on the output capacitor is incremented in order to successfully establish the desired output voltage. It also helps prevent transformer saturation and reduces stress on the secondary diode.

6. Burst operation: In order to minimize power consumption in standby mode, FPSTM enters burst mode operation.

As the load decreases, the feedback voltage decreases. As shown, the device automatically goes into burst when the feedback voltage falls below Vburh (600 mV). Switching continues, but the current limit is set to a fixed internal limit to minimize flux density in the transformer. The fixed current limit is greater than that defined by vfB=vBurh, so vfB is driven down further. Continue switching until the feedback voltage drops below vburl (350mv). The rate at which switching stops and the output voltage begins to drop depends on the backup current load. This causes the feedback voltage to go up. Once through vburh (600mv), the switch resumes. Then the feedback voltage drops and the process repeats. Burst Mode operation alternately enables and disables the switching of the power-sensing FET, reducing switching losses in standby mode. 7. Frequency modulation: EMI reduction can be achieved by modulating the switching frequency of the power supply. FM can be measured by spreading energy over a wider bandwidth than EMI test equipment. This EMI reduction is related to the reference frequency. As shown, the FSDL0165RN number within 4ms. Frequency modulation allows the use of cost-effective inductors instead of AC input mode chokes to meet global EMI limits.

Multi-Output, 13W, 85-265Vac Input Power Supply: The figure shows a typical multi-output power supply for terminal set-top box recording containing a high-capacity hard drive. This power supply provides 13 watts of output power with an input voltage of 85 to 265 VAC. Efficiency ≥75% at 9W, 85Vac. The 3.3 V and 5 V outputs are regulated to ±5%, eliminating the need for secondary linear regulators. DC Superposition (The secondary winding reference for other output voltages is to D15 anode. For better accuracy, the connection to D15 cathode would be better.) Used to minimize voltage errors for high voltage outputs. Due to typical high ambient operating temperature requirements for set-top boxes (60°C) FSDL0165RN is used to reduce conduction losses without heat sink. Resistor R5 sets the device's current limit to limit overload power. The leakage inductance clamp is provided by R1 and C8 to keep the drain voltage below 650V under all conditions. Resistor r1 and capacitor c8 are chosen so that r1 dissipates power to prevent the drain voltage from rising through the leakage inductance. The FM characteristics of the fsdl0165rn allow the circuit shown to satisfy CISPr2ab with simple EMI filtering (C1, LF1 and C2) and output grounding. The second part goes through D12, D13, D14, and D15. Diode D15 for the 3.4V output is a Schottky diode to maximize efficiency. The diode D14v output of 5 is pn type, which concentrates the 5v output at 5v. The 3.3V and 5 V output voltages require two parallel capacitors to meet the ripple current requirements. Switching noise filtering is provided by l3, l2 and l1. Resistor r15 prevents peak charging of the 23V output at light loads. The output is regulated by the secondary reference (TL431) voltage. Both the 3.3 V and 5 V outputs are sensed through R13 and R14. Resistor r22 provides bias for the tl431 and r21 sets the overall dc gain. Resistors r21, c209, r14 and r13 provide loop compensation.