feature

Guaranteed Operating Temperature Range -20°C to +85°C Minimum Peak Output Current 0.5A High Speed Response: Maximum Propagation Delay 500ns Over Temperature Range Wide VCC Operating Range: 10V to 20V

5000VRMS, 1 minute isolation Minimum creepage distance 7.0 mm Minimum clearance distance 7.0 mm C-UL, UL and VDE* approved 10KV/µs Minimum Common Mode Rejection (CMR) VCM=1500V rds (on) of 1.5Ω (typ) available lower power consumption

application

Plasma display high performance DC/DC converter high performance switching power supply high performance uninterruptible power supply isolated power mosfet gate drive *requires "v" sorting option

illustrate

The FOD3181 is a 0.5A high speed output current mosfet gate drive optocoupler. It consists of gallium aluminum arsenide (algaas) light-emitting diode and CMOS integrated circuit optical coupling power stage. The power stage consists of pmos pull-up and nmos pull-down power transistors. Ideal for plasma display panels (PDP), motor control inverter applications and high performance DC/DC converters. The device is packaged in an 8-pin dual-in-line housing and is solder compliant with a lead-free 260°C reflow process.

notes:

1. Linearly reduce the free air temperature above +70 degrees Celsius at a rate of 0.3 mA/degree Celsius.

2. The output currents IOH and IOL are specified as capacitive current limit load = (3 x 0.01μf) + 0.5Ω, frequency = 8kHz, 50% DF.

3. The output currents IOH and IOL are specified as capacitive current limit load = (3 x 0.01μf) + 40Ω, frequency = 8kHz, 50% DF.

4. No derating is required over the entire operating temperature range.

5. In this test, VOH is measured at a DC load current of 100 mA. When driving capacitive loads, VOH will be close to VCC and IOH will be close to zero amps.

6. Maximum pulse width = 1ms, maximum duty cycle = 20%.

7. The TPHL propagation delay is measured from the 50% level on the falling edge of the input pulse to the falling edge of the VO signal. The TPLH propagation delay is the pulse measured from the 50% level of the rising edge of the input to 50% of the rising edge of the VO signal.

8. Pins 1 and 4 need to be connected to the LED common.

9. High immunity in common mode transients is the maximum tolerable DVCM/dt for common mode pulses. VCM to ensure that the output will remain high (ie VO>10.0V).

10. Common mode transient immunity in low mode is the maximum tolerable DVCM/dt for common mode pulses. VCM to ensure that the output will remain low (ie VO < 1.0V).

11. According to UL 1577, each optocoupler is proof tested by applying an insulation test voltage greater than 6000Vrms, 60Hz for 1 second (leakage detection current limit II-O<5µA).

12. A device that is considered a double-ended device: the pins of the input are shorted together and the pins of the output are shorted together.

The maximum package power consumption of output power derating is 95MW. This package is limited to this level to ensure that the range of normal operating conditions and OTJ junction temperatures does not exceed 125°C. The packaged power consists of three components; the LED, the quiescent operating power output IC, and the power mosfet transistors dissipated in the output power. The output IC is rated at 250 MW. This force is divided into integrated circuits and it is IDD times the supply voltage (VDD – VEE). The maximum integrated circuit static output power is 150mw, (vdd-vee)=25v, idd=6mA. This maximum condition is valid over an operating temperature range of -40°C to +100°C. Maximum operating conditions, the output power mosfet can dissipate 100mw of power. The absolute maximum output power dissipation versus ambient temperature is shown. The output driver is capable of delivering 100MW of output power at temperatures ranging from -40°C to 87°C, dropping to 90MW at absolute maximum operation. Temperature 100°C.

The output power is the product of the average output power Current squared times the rds(on) of the output transistor: po(average) = io(average) 2rds(on) IO(average) is the duty cycle times the peak value in the output current. The duty cycle is the output load current "on" time divided by the period at the operating frequency. An rds(on) of 2.0Ω results in an average output load current of 200mA. The load duty cycle is the ratio of the average output time of the power MOSFET's load circuit and the drive frequency period. The maximum allowable operating frequency is determined by the load on its output. Output pulse width. The figure shows a 0.03µf gate-to-source capacitance with a series resistance of 40Ω. This reactive load results in an average pulse width of 1.5 microseconds. It is not necessary to subtract the absolute maximum output under this load condition. Current output to 250kHz.

oh and iol test conditions The device is tested and specified when driving complex reactive loads. The load is included in series with a current limiting resistor. The capacitor represents the gate-to-source capacitance of the power supply mosfet transistor. The test load was a 0.03uF capacitor in series with a 40Ω resistor. The LED test frequency is 10.0kHz and the duty cycle is 50%. When the combination of the two is tested, the IOL output load current duty cycle is 0.6% frequency. The graph shows the relationship between the LED input drive current and the device's output voltage, source current and sink current. The 0.03µf capacitor load represents a very large power mosfet transistor. single supply their respective current pulses.