Features: Low-cost 10-bit DAC; low-cost AD720 replacement; linearity: 1/2 LSB, 1 LSB, or 2 LSB; low power consumption; full four-quadrant multiplying digital-to-analog converter; CMOS/TTL direct interface; Schottky protection is not required); endpoints are linear.

Applications: digital attenuators; programmable gain amplifiers; function generation; linear automatic gain control.

General Description The AD7533 is a low-cost, 10-bit, 4-quadrant multiplying DAC fabricated using an advanced thin-film monocrystalline silicon wafer fabrication process. Pin and functionally equivalent to the AD7520 industry standard, the AD7533 is recommended as a lower cost older alternative to the AD7520 socket or new 10-bit DAC designs. The flexibility of the AD7533's application lies in interfacing with TTL or CMOS, operating from a 5 V to 15 V supply, and providing the appropriate binary scale positive or negative for either reference input.

the term

Relative accuracy

Relative accuracy or endpoint nonlinearity is a measure of the maximum deviation of a straight line through the endpoints of a DAC transfer function. It is measured after adjusting for ideal zero and full scale, expressed as a percentage of full scale range or in (sub)multiples of 1 lsb.

Resolution

The value of the LSB. For example, a unipolar converter with n bits has a resolution of (2)(v). The resolution of an n-bit bipolar converter is [2](v). Resolution by no means means linearity.

Settling time

The time required for the output function of the DAC to settle to within 1/2 lsb for a given digital input stimulus, i.e. from 0 to full scale.

gain error

Gain error is a measure of the output error between the ideal dac and the actual device output. After offset error correction, measure with all 1s in DAC and denote lsb. Gain error can be zeroed by an external potentiometer.

Feedthrough error

Error due to capacitive coupling from V to the output when all switches are closed.

output capacitor

Capacitance from I1 and I2 terminals to ground.

output leakage current

The current that appears on the I1 terminal when all digital inputs are low, or the current that appears on the I2 terminal when all digital inputs are high.

Circuit Description

General circuit information

The AD7533 is a 10-bit multiplying DAC consisting of a highly stable thin-film R-2R ladder diagram and 10 CMOS current switches on a monolithic chip. Most applications only need to add an output op amp and a voltage or current reference.

A simplified D/A circuit is shown in Figure 7. An inverted R-2R trapezoidal structure is used, that is, a binary weighted current is switched between the I1 and I2 busbars, thereby maintaining a constant current in each trapezoidal branch independent of the switching state.

A CMOS current switch is shown in Figure 8. The geometry of Device 1, Device 2, and Device 3 has been optimized to make the digital control input dtl/ttl/cmos compatible over the full military temperature range. The input stage drives two inverters (Device 4, Device 5, Device 6, and Device 7), which in turn drive the two output n-channels. The on-resistance of the switches is double sealed, so the voltage drop across each switch is the same. For example, the on-resistance of switch 1 in Figure 8 is 20Ω, and the on-resistance of switch 2 is

40Ω, and so on. For a 10 V reference input, the current through switch 1 is 0.5 mA, the current through switch 2 is 0.25 mA, and so on, maintaining a constant 10 mV drop across each switch. Each switch voltage drop must be equal if the binary weighted current-splitting characteristics of the ladder diagram are to be maintained.

Equivalent Circuit Analysis

Equivalent circuits for all digital input high and digital input low are shown in Figure 9 and Figure 10. In Figure 9, with all digital inputs low, the reference current switches to I2. Current source i consists of surface and junction-to-substrate leakage, while i/1024 current source represents constant 1-bit current leakage through terminating resistors on the r-2r ladder. The power-on capacitance of the output N-channel switch is 100 pF, as shown at the I2 terminal. The disconnect switch capacitance is 35 pF, as shown at the I1 terminal. As shown in Figure 10, the analysis of all high digital input circuits is similar to Figure 9; however, the switch is now turned on and leaks out of terminal I1. Therefore, there is 100 pf at the terminal.

operate

Unipolar binary code

Table 4. Unipolar Binary Operations (2-Quadrant Multiplication)

The nominal LSB value for the circuit of Figure 11 is given by:

Bipolar (offset binary) code

table 5. Unipolar binary arithmetic (four-quadrant multiplication)

The nominal LSB value for the circuit of Figure 12 is given by:

application: