describe
The Viper100-E is manufactured using Vipower M0 technology, combining an advanced PWM circuit and an optimized high voltage vertical power mosfet (620V/3A) on the same silicon die.
Typical applications include off-line power supplies with secondary power capacities of 50W in wide-range conditions and 100W in single-range or double-range configurations. It is compatible with primary or secondary regulation loops, although using about 50% fewer components compared to discrete solutions. Burst Mode operation is an additional feature of the device that provides the ability to operate in standby mode without additional components.

Pin Description Drain Pin (Integrated Power MOSFET Drain):
Integrated power mosfet drain pin. It provides internal bias current during startup through an integrated high voltage current source that is turned off during normal operation. The device is capable of handling unintercepted currents during normal operation, ensuring self-protection against voltage surges, PCB stray inductance, and allowing unbuffered operation at low output power.
Source pin:
Power mosfet source pin. Primary side circuit common ground connection.
VDD pin (power supply):
This pin provides two functions:
Corresponds to the low voltage power supply of the control part of the circuit. If V is below DD
8V, the startup current source is activated and the output power mosfet is turned off until the V voltage reaches 11V. During this phase, the internal current consumption is reduced, the V pin draws about 2mA, and the comp pin is shorted to ground. After that, the current source is turned off and the device tries to start by switching it on again.
This pin also connects to the error amplifier for primary and secondary regulation configurations. In the case of primary adjustment, the internal 13V fine-tuning reference voltage is used to keep the voltage at 13V; in the case of secondary adjustment, a voltage of 8.5V to 12.5V is applied to the V pin through the transformer design to keep the output of the transconductance amplifier. in a higher state. The comp pin acts as a constant current source and can be easily connected to the output of the optocoupler. Note that any overvoltage due to regulation loop failure is still detected by the error amplifier via the V voltage, which cannot exceed 13V. The output voltage will be slightly higher than nominal, but still under control.
Compensation pin This pin provides two functions:
It is the output of the error transconductance amplifier and allows the connection of a compensation network to provide the transfer function required by the regulation loop. Its bandwidth can be easily adjusted to the required value and the usual component values. As mentioned above, the secondary regulation configuration is also achieved through the comp pin.
When the comp voltage is lower than 0.5v, the circuit is turned off and the duty cycle of the power mosfet is zero. This feature can be used to turn off the converter and is automatically activated by the regulation loop (regardless of configuration) to provide burst mode operation with negligible output power or with the load on.
Pin Description
OSC pin (oscillator frequency)
An RC network must be connected to define the switching frequency. Note that although r is connected to v, there is no significant frequency change for v from 8v to 15v. It also provides synchronization capability when connected to an external frequency source.

Typical Circuit 4 Typical Circuit Offline Power Supply with Auxiliary Power Feedback

Offline power supply with optocoupler feedback

Operating Instructions Current Mode Topology:
Like the current mode control method integrated in the Viper100-E, the current mode control method uses two control loops - an inner current control loop and an outer voltage control loop. When the power mosfet output transistor is turned on, the inductor current (primary side of the transformer) is monitored with sensefet technology and converted to a voltage v proportional to this current. When V reaches V (amplified output voltage error), the power switch is turned off. Therefore, the outer voltage control loop defines the inner loop to regulate the level of peak current through the power switch and the primary winding of the transformer.
Good open-loop DC and dynamic line regulation is ensured due to the inherent input voltage feedforward nature of current mode control. This will improve line regulation, provide instantaneous correction for line changes, and improve the stability of the voltage regulation loop.
The current mode topology also ensures good confinement in short circuit conditions. In the first stage, the output current increases slowly with the dynamics of the regulation loop. The internally set maximum current limit is then reached, and finally it stops because the power on V is no longer correct. For specific applications, the internally set maximum peak current can be overridden by externally limiting the voltage offset on the comp pin. The integrated blanking filter suppresses the output of the pwm comparator for a short time after the integrated power mosfet is powered up. This feature prevents abnormal or premature termination of switching pulses due to current spikes caused by primary-side capacitance or secondary-side rectifier reverse recovery time.

Instructions

Once the power falls below this limit, the auxiliary secondary voltage begins to increase beyond the regulated level of 13V, forcing the output voltage of the transconductance amplifier in a low state (V High Voltage Startup Current Source 5.3 High Voltage Startup Current Source The integrated high voltage current source provides the bias current from the DRAIN pin during the startup phase. Part of this current is absorbed by the internal control circuit, which enters standby mode, reducing power consumption, and is supplied to an external capacitor connected to the V pin. Once the voltage on this pin reaches the high voltage threshold v of the uvlo logic, the device goes into active mode and starts switching. The start-up current generator is off, the converter should normally provide the required current on the V pin through the auxiliary winding of the transformer If an abnormal condition occurs, where the auxiliary winding cannot supply low voltage supply current to the V pin (i.e. the converter output is shorted), an external capacitor Will discharge to the low threshold voltage VOF (UVLO logic), the device will return to inactive standby mode with internal circuits inactive and the start-up current source activated. The frequency converter enters an endless start cycle, and the start duty cycle is determined by the ratio of the charge current to the discharge current when the Viper100e attempts to start. This ratio is fixed from 2A to 15A by design, and at 230VRMS input voltage, this ratio provides a 12% start-up duty cycle while consuming about 0.6W at start-up. DDDDOFF
This low start-up duty cycle prevents stress on the output rectifier and transformer during short circuits.
When the device starts switching, the external capacitor C on the V pin must be adjusted according to the time it takes for the converter to start up. This time t depends on many parameters, among them the transformer design, output capacitance, soft-start characteristics, and the compensation network implemented on the comp pin. The following formula can be used to define the minimum capacitor required: VDDDDSS

Electrical Overstress Strength

Vipers may experience excessive electrical stress due to strong input voltage surges or lightning. In most cases, following layout considerations is sufficient to prevent catastrophic damage. However, under certain conditions, voltage surges coupled through the transformer auxiliary winding may exceed the V pin absolute maximum voltage rating. Such events can trigger the V internal protection circuit, which can be damaged by the strong discharge current of the V bulk capacitor. The simple rc filter shown in can be implemented to increase the immunity of the application to such surges.
The input voltage surge protection layout considers some simple rules to ensure the correct operation of the switching power supply. They can be divided into two categories:
– Minimize power loops: Switching power supply currents must be carefully analyzed and the corresponding paths must be as small as possible in the inner loop area. This avoids radiated EMC noise, conducts EMC noise through magnetic coupling, and provides better efficiency by eliminating parasitic inductances, especially on the secondary side.

– Use different rails for low-level and power signals: Interference caused by signal and power mixing can lead to unstable and/or abnormal behavior of the device in the presence of severe power surges (input overvoltage, output short circuit…).
For vipers, these rules apply as shown – loops C1-T1-U1, C5-D2-T1 and C7-D1-T1 must be minimized.
– C6 must be as close as possible to T1.
– Signal parts C2, ISO1, C3 and C4 use dedicated rails that connect directly to the device power supply.