Features: 2 channels with independent gain control linear in-db gain response; 2 gain ranges; AD600 : 0dB to 40dB; AD602: –10dB to +30dB; precise absolute gain: ? 0.3dB; low input noise: 1.4nV/√Hz; low distortion: –60 dBc THD, output ±1 V; high bandwidth: DC to 35 MHz (-3 dB); stable group delay: ±2ns; low power: 125 mW per amplifier (max); signal gating per amplifier; driving high-speed ADCs; MIL-STD-883 compliant and DESC versions available.

Applications: Ultrasonic and sonar time gain control; high performance audio and radio frequency agc systems; signal measurement.

General Instructions

The AD600/AD602 dual, low noise, variable gain amplifiers are optimized for use in ultrasound imaging systems, but are suitable for any application requiring precise gain, low noise and distortion, and wide bandwidth. Each independent channel provides 0dB to +40dB gain in the ad600 and -10dB to +30dB gain in the ad602. The lower gain of the AD602 results in an improved signal-to-noise ratio (SNR) at the output. However, both products have the same input noise spectral density of 1.4nv/√hz. The decibel gain is proportional to the control voltage, the calibration is accurate, and the power supply and temperature are stable.

To achieve the difficult performance goals, a dedicated circuit form, the X-AMP, was developed. Each channel of the x-amp includes a 0dB to -42.14dB variable attenuator and a high speed fixed gain amplifier. This way, the amplifier does not have to deal with large inputs, and negative feedback can be used to precisely define gain and dynamics. The attenuator is implemented as a 7-level r-2r ladder network with an input resistance of 100Ω and laser trimming of ±2%. The attenuation between tap points is 6.02db; the gain control circuit provides continuous interpolation between these taps. The resulting control function is linear in decibels.

The gain control interface is fully differential, providing an input resistance of ~15 MΩ and a scale factor of 32 dB/V (ie, 31.25 mV/dB), as defined by an internal voltage reference. The response time of this interface is less than 1μs. Each channel also features an independent gating facility that selectively blocks signal transmission and sets the DC output level to within a few millivolts of output ground. The strobe control input is TTL and CMOS compatible.

The AD600 has a maximum gain of 41.07dB and the AD602 has a maximum gain of 31.07dB; the -3dB bandwidth of both models is nominally 35MHz, essentially independent of gain. For 1 V rms output and 1 mhz noise bandwidth, the snr is typically 76 db for the ad600 and 86 db for the ad602. The amplitude response is flat over ±0.5 dB from 100 kHz to 10 MHz; the group delay variation is less than ±2 ns at all gain settings over this frequency range.

Each amplifier channel can drive 100Ω load impedance with low distortion. For example, the specified peak output is a minimum of ±2.5 V into a 500 Ω load and ±1 V into a 100 Ω load. The total harmonic distortion for a ±1 V sinusoidal output at 10 MHz is typically -60 dBc for a parallel 200 Ω load (5 pF).

The AD600J/AD602J are specified for operation from 0°C to 70°C and are available in 16-lead PDIP(N) and 16-lead SOIC UW packages. The AD600A/AD602A are specified for operation over the -40°C to +85°C temperature range and are available in 16-lead CeRDIP(Q) and 16-lead SOIC UW packages. Specified over the -55°C to +125°C temperature range, the AD600S/AD602S are available in a 16-wire CERDIP(Q) package and are MIL-STD-883 compliant. The AD600S/AD602S are also available under DESC SMD 5962-94572.

theory of operation

The AD600/AD602 share the same overall design and functionality. They consist of two fixed gain amplifiers each preceded by a 0dB to 42.14dB voltage controlled attenuator with independent control interface, each with a scale factor of 32dB/volt. The AD600 amplifier is laser trimmed with a gain of 41.07dB (×113), providing a control range of -1.07dB to +41.07dB (0dB to +40dB overlap). The AD602 amplifier has a gain of 31.07dB (×35.8) and provides an overall gain of -11.07dB to +31.07dB (-10dB to +30dB with overlap).

The advantage of this topology is that the amplifier can utilize negative feedback to improve the accuracy of the gain. Also, since the amplifier does not have to handle large signals at its input, distortion can be very low. Another feature of this approach is that the small-signal gain and phase response, as well as the impulse response, are inherently gain-independent.

Figure 21 is a simplified schematic diagram of one channel. The input attenuator is a 7-stage R-2R ladder network with a nominal R=62.5Ω untrimmed resistor with a characteristic resistance of 125Ω±20%. The input includes a shunt resistor and is laser trimmed to create a more precise 100Ω ±2% input resistance, which ensures precise operation (gain and HP corner frequency) when used with external resistors or capacitors.

When using the recommended ±5 V supply, the nominal maximum signal at input A1HI is 1 V rms (±1.4 V peak); although operation to ±2 V peak is permitted with some increase in high frequency distortion and feedthrough . Each attenuator has a separate signal lo connection for rejection of voltage common mode between input and output ground. Circuitry is included to provide rejection up to ±100 mV.

The signal applied to the input of the ladder network is attenuated by 6.02 dB per segment; therefore, the attenuation for each tap is 0 dB, 6.02 dB, 12.04 dB, 18.06 dB, 24.08 dB, 30.1 dB, 36.12 dB, and 42.14 dB. A unique circuit technique is used to interpolate between these tap points, as shown by the slider in Figure 21, providing a continuous attenuation from 0 dB to 42.14 dB.

To understand the AD600, it helps to think about the mechanical way of moving the slider from left to right; in fact, it is voltage controlled. Details of the control interface will be discussed later. Note that the gain is always precisely determined, and a linear decibel relationship is automatically guaranteed between the gain and the control parameter that determines the slider position. In practice, the peak of the gain deviating from the ideal law is about ±0.2db (see Figure 28).

Note that the signal inputs are not fully differential. a1lo, a1cm (for ch1), a2lo, and a2cm (for ch2) provide separate access to input and output grounds. This recognizes that even when ground planes are used, the voltages on these nodes will vary slightly. A1LO and A2LO must be connected directly to input ground. Significant impedance in these connections reduces gain accuracy. A1cm and A2cm should be connected to the load ground.

Noise performance

An important reason to use this method is to obtain superior noise performance. The nominal resistance at the tap inside the attenuator is 41.7Ω (one-third of 125Ω), and its Johnson Noise Spectral Density (NSD) is 0.84 nV/√Hz (ie, √4ktr) at 27°C, accounting for a significant portion of the total input noise. The first stage of the amplifier contributes another 1.12nv/√hz for a total input noise of 1.4nv/√hz.

The noise at the 0dB tap depends on whether the input is shorted or open. When shorted, the minimum NSD is 1.12 nV/√Hz. When turned on, the first tap's 100Ω resistor produces 1.29 nV/√Hz, so the noise increases to 1.71 nV/√Hz. The last calculation would be important if the AD600 had a 900 Ω resistor before it to allow operation at the input with a maximum of ±10 V rms. However, in most cases, the low impedance of the source limits the maximum noise resistance.

It is obvious from the preceding that it is necessary to use low resistance in the design of the ladder network to achieve low noise. In some applications this may be inconvenient, requiring the use of an external buffer or preamp. However, few amplifiers combine the required low noise and low distortion at maximum input levels, and the power consumption required to achieve this performance is quite high (due to the need to maintain very low resistor values while handling large inputs ). On the other hand, buffers that provide high input impedance are of little value, as the usual reason is to minimize loading of high resistance sources - not compatible with low noise.

Aside from the minor changes just mentioned, the signal-to-noise ratio at the output is essentially independent of the attenuator setting because the maximum undistorted output is 1V rms and the NSD at the AD600 output is fixed at 113 × 114 nV/√Hz or 158 nV/√ Hz. Therefore, in a 1 MHz bandwidth, the output signal-to-noise ratio is 76 dB. The input NSD of the AD600/AD602 is the same, but since the gain of the AD602's fixed amplifier is reduced by 10 dB, its output signal-to-noise ratio is improved by 10 dB, or 86 dB in a 1 MHz bandwidth.

Gain Control Interface

Attenuation is controlled via a differential high impedance (15 MΩ) input with a scale factor of 32 dB per volt, or 31.25 mV/dB. Both amplifiers have their own control interface. An internal bandgap reference ensures scale stability over power and temperature variations, and is the only circuit shared by both channels.

When the differential input voltage v=0V, the attenuator slider is centered, providing +21.07 db of attenuation, resulting in an overall gain of +20 db (–21.07 db++41.07 db). When the control input is -625mV , the gain is reduced by +20dB (=0.625×+32) to 0dB; when set to +625mV, the gain is increased by +20dB to +40dB. When the interface is overdriven in either direction, the gain approaches -1.07db (--42.14db++41.07db) or +41.07db (=0++41.07db), respectively.

The gain of AD600 can be passed: Gain(dB) = 32 VG+ 20 (1)

where V is in volts: G; for AD602, the expression is: Gain(dB) = 32 VG+ 10 (2)

Specified operation for V over the range of -625 mV dc to +625 mV dc. High impedance gain control inputs ensure minimal loading when driving multiple amplifiers in multichannel applications. The differential input configuration provides flexibility in selecting the appropriate signal level and polarity for various control schemes.

For example, the gain control input can be fed differentially to the input, or single-ended by simply grounding the unused input. In another example, if the gain is controlled by a DAC that only provides a positive ground referenced output, then the gain control lo pin (c1lo or c2lo) should be biased to a fixed offset of 625 mv to be used when the gain control hi (c1hi or c2lo) c2hi) set the gain to 0 db at zero and 40 db at 1.25 v.

Including voltage dividers to achieve other scale factors is a simple matter. When using an 8-bit DAC with an fs output of 2.55V (10 mV/bit), a divide-by-1.6 ratio (producing 6.25 mV/bit) results in a gain setting resolution of 0.2 dB/bit. Later in this datasheet, cascade two parts of an AD600 or AD602 when there are various options for gain control (see Achieving an 80 dB Gain Range section).

Signal strobe input

Each amplifier section of the AD600/AD602 is equipped with signal gating, controlled by a TTL or CMOS logic input (GAT1 or GAT2). The ground references for these inputs are the signal input grounds A1lo and A2lo, respectively. When this input is low or open left, the operation of the channel is not affected. When this input is HI, signal transmission is blocked. The DC output level of the channel is set within a few millivolts of the output ground (A1cm or A2cm), while the noise level is significantly reduced. Reducing noise and spurious signal feeds is useful in ultrasonic beamforming applications where the outputs of many amplifiers are summed.

Common Mode Rejection

A special circuit technique provides suppression of the voltage that occurs between the input grounds (A1lo and A2lo) and the output grounds (A1cm and A2cm). This is necessary because of the op amp form of the amplifier, as shown in Figure 21. The feedback voltage is generated through the rf1 resistor (for low noise, the value of the rf1 resistor is only 20Ω). The voltage generated through this resistor is referenced to the input common, so the output voltage is also referenced to this node.

For a zero differential signal input between a1hi and a1lo, the output a1op simply follows the voltage at a1cm. Note that the range of possible voltage differences between a1lo and a1cm (or a2lo and a2cm) is limited to around ±100 mV. Figure 18 shows a typical CMRR versus frequency.

Up to 80dB gain range

The two amplifier sections of the x-amp can be connected in series for higher gain. In this mode, the output of a1 (a1op and a1cm) drives the input of a2 through a high-pass network (usually just a capacitor) that rejects DC offset. The AD600 now has a nominal gain range of -2dB to +82dB and the AD602 from -22dB to +62dB.

There are several options when connecting the gain control input. The choice depends on the desired signal-to-noise ratio and gain error (output ripple). The following example features an ad600; parameters are typically applied to an ad602 with appropriate changes to the gain value.

Sequential mode (maximum signal-to-noise ratio)

In sequential operation mode, the signal-to-noise ratio is maintained at its highest level over as much of the gain control range as possible, as shown in Figure 22. Note that the gain range here is 0dB to 80dB. Figure 23, Figure 24 and Figure 25 show the general connections to accomplish this. The two gain control inputs, c1hi and c2hi, are driven in parallel by a positive ground referenced source in the 0-2.5v range.

An auxiliary amplifier is provided to sense the voltage difference between the input and output common space to suppress the common voltage.

The gain is canceled so that the gain of A2 increases only after the gain of A1 reaches its maximum value (see Figure 26). Note that the gain of a single amplifier (A1 or A2) is -1.07 dB at its minimum for differential inputs up to -700 mV and +41.07 dB at its maximum for differential inputs up to +700 mV. Control inputs beyond these limits do not affect gain and can be tolerated without damage or folding in the response. See the Specifications section for details on the allowable voltage range. The gain now is: Gain(dB) = 32 VC(3)

where V is the applied control voltage.

When v is set to zero, v=-0.592v, the gain of a1 is CG1; 1.07 dB (recall, for V=625 mV); at the same time, V=-1.908 V, so the gain of A2 is GG2=-1.07 dB . Therefore, the total gain is 0 dB (see Figure 23). When V=1.25 V, V=1.25 V–0.592 V=0.658 V, which sets gain A1 to 40.56 dB, and V=1.25 V–1.908 V=-0.658 V, which sets gain A2 to -0.56 dB. The total gain is now 40dB (see Figure 24). When v=2.5v, the gain of a1 is 41.07db, the gain of a2 is 38.93db, and the total gain is 80db (see Figure 25). This mode of operation is further illustrated in Figure 27, which is a graph of the individual gains of a1 and a2 and the overall gain versus control voltage. Figure 28 is a graph of gain error versus control voltage for cascaded amplifiers.

Parallel mode (the simplest gain control interface)

In this mode, the gain control voltage is applied to the two inputs in parallel - c1hi and c2hi are connected to the control voltage, and c1lo and c2lo are selectively connected to a bias voltage of 0.625v. The gain scaling is then multiplied to 64db/v, requiring only 1.25v for a gain change of 80db. In this case, as shown in Figure 29, the magnitude of the gain ripple is also doubled, and the instantaneous snr at the output of a2 decreases linearly with increasing gain (see Figure 30).

Low Ripple Mode (Minimum Gain Error)

As shown in Figures 28 and 29, the output ripple is periodic. By cancelling the gains of a1 and a2 by half the ripple period or 3db, the residual gain error of the two amplifiers can be cancelled out. Figure 31 shows the lower gain ripple when configured in this way. Figure 32 plots the signal-to-noise ratio as a function of gain; it is very similar to the parallel mode.

application

The full potential of any high performance amplifier can only be realized through attention to detail in the application. The following pages describe well-tested circuits in which many of these details have been considered. However, as with high-precision, high-speed analog circuits, the schematic is only part of the story; for the AD600/AD602, it's not bad at all. Proper selection of the general layout of the board and the type and location of power decoupling components is very important. As mentioned earlier, the input grounds A1LO and A2LO must use the shortest possible connections.

The following circuits show examples of time gain control for ultrasound and sonar, ways to increase output drive, and an example of an AGC amplifier using peak and rms detectors for audio and RF/IF signal processing. These circuits also illustrate methods for cascading x-amps for maintaining optimal signal-to-noise ratios or maximizing the accuracy of gain control voltages used for signal measurements. These AGC circuits can be modified for use as voltage-controlled amplifiers in sonar and ultrasound applications by removing the detector and replacing the control voltage with a DAC or other voltage source.

Time Gain Control and Time Variation

Gain (TVG)

Ultrasonic and sonar systems have a similar requirement: both need to provide an exponential gain increase at a linear control voltage, that is, the gain control is linear in decibels. Figure 33 shows the AD600/AD602 configured to control a voltage ramp that starts at -625 mV and ends at +625 mV with a gain control range of 40 dB. The polarity of the gain control voltage can be reversed, and the control voltage inputs c1hi and c1lo can be reversed to achieve the same effect. The gaincontrol voltage can be provided by a voltage output DAC, such as the AD7244, which contains two complete DACs, operates from a ±5v supply, has an internal reference of +3v, and provides an output swing of ±3v. So it's perfect for use with the AD600/AD602, only a few resistors are needed to scale the output voltage of the DAC to the level required by the AD600/AD602.

add output driver

The output stage of the AD600/AD602 has a limited ability to drive negative loads. For driving loads less than 500Ω, the load drive can be increased by about 5 mA by connecting a 1 kΩ pull-down resistor from the output to the negative supply (see Figure 34).

Driving capacitive loads

For driving capacitive loads greater than 5pF, insert a 10Ω resistor between the output and the load. This reduces the possibility of oscillation.

Implement other gain ranges

Cascaded amplifiers can accommodate a wider gain range. Combinations built by cascading two amplifiers include −20 db to +60 db (using an AD602), –10 db to +70 db (using 1/2 of the AD602 and 1/2 of the AD600), and 0 db to 80 db db (using an AD600). In multi-channel applications, additional protection against oscillation can be provided by using amplifier sections from different packages.

Ultra Low Noise VCA

Two channels of the AD600 or AD602 can operate in parallel to achieve a 3dB improvement in noise level, delivering 1nV/√Hz without loss of gain accuracy or bandwidth.

In the simplest case, as shown in Figure 35, the signal inputs a1hi and a2hi are directly connected together. The outputs a1op and a2op are summed through r1 and r2 (each 100Ω), and the control inputs c1hi/c2hi and c1lo/c2lo work in parallel. Using these connections, the input and output resistances are both 50Ω. So when driven from a 50Ω source and terminated in a 50Ω load, the gain is reduced by 12 db, so the gain range of the ad600 becomes -12 db to +28 db and the gain range of the ad602 becomes -22 db to +18 db. Peak input capability is unaffected (1V rms at IC pins, or 2V rms at no-load 50Ω supply). With a 50Ω load, the load on each output is actually 200Ω because the load current is shared between the two channels, so at a 200Ω load the entire amplifier still meets its specified maximum output and distortion levels. The amplifier can deliver a maximum sine wave power of 10dbm to the load.

Low noise 6db preamp

In some ultrasonic applications, the high input impedance requires a preamplifier to avoid signal attenuation as a result of loading the transducer through the 100Ω input resistance of the X-AMP. High yields cannot be tolerated because peak sensor signals are typically ±0.5 V, while peak input AD600 or AD602 performance is only slightly better than ±1 V. A gain of 2 is a suitable choice. It can be shown that if the overall reference input (RTI) noise of the preamp is the same due to the x-amp itself (1.4nv/√hz), the input noise of the NX2 preamp must be √(3/4) times larger, i.e., 1.2 nV/√Hz.

Figure 36 shows an inexpensive circuit using the complementary transistor type chosen for its low R. Gain is determined by the ratio of net collector load resistance to net emitter resistance. It is an open loop amplifier. The gain is only a 100Ω load of ×2 (6db), assumed to be provided by the input resistors of x-amp; r2 and r7; they are in parallel with this load, and their values are important in defining the gain. For small signal inputs, the transconductances of the two transistors are equal, and the emitter resistors r4 and r5 are less sensitive to signal levels. They also play a leading role in setting returns.

This is a class AB amplifier. As v increases in the positive direction, q1 conducts more vigorously, r becomes lower, and q2 increases. Conversely, the more negative the v value, the smaller the r value of q2, and the larger the r value of q1. The design is chosen such that the net launch resistance is substantially independent of the instantaneous value of v, resulting in moderately low distortion. Low resistance values and moderately high bias currents are important to achieve low noise, wide bandwidth, and low distortion preamplifiers. Heavy decoupling prevents noise on the power line from being transmitted to the input of the x-amp.

Low noise agc amplifier with 80db gain range

Figure 37 provides a simple example of connecting the AD600 as an AGC amplifier. a1 and a2 are cascaded, the 100Ω resistor r1 introduces 6db attenuation, and the 50Ω net resistance input by c1 and a2 forms a time constant of 5ns. This has a double effect: it reduces the overall gain range from 0dB down to 80dB to -6dB to 74dB and introduces a single pole low pass filter whose -3dB frequency is about 32MHz. This ensures stability at maximum gain, reducing the overall bandwidth slightly. Capacitor c4 blocks small DC offset voltages at the output of a1 (which would otherwise saturate a2 at its maximum gain) and introduces a high pass angle at about 8khz, helping to eliminate low frequency noise and spurious noise that may be present at the input scattered signal.

A simple half-wave detector based on q1 and r2 was used. The average current into capacitor C2 is the difference between the current supplied by the AD590 (300 μA at 300 K, 27°C) and the collector current of Q1. In turn, the control voltage v is the time integral of this error current. When V (and therefore gain) is stable, the rectified current in Q1 must on average just balance the current in the AD590. If the output of a2 is too small to do this, v increases, causing the gain to increase until q1 is sufficiently conductive. The operation of this control system is as follows.

First, consider the specific case where r2 is zero and the output voltage v is a square wave, for example, 100 kHz, much higher than the corner frequency of the control loop. When v is negative, q1 conducts. When v is positive, it is cut off. Since the average collector current is forced to 300µA and the square wave has a 50% duty cycle, the current must be 600µA when conducting. If R2 is ignored, the peak value of V is only 600 μA (typically about 700 mV) or the V of Q1 at 2 V pp. Therefore, the amplitude at which the output is stable has a strong negative temperature operating coefficient (Tc), typically -1.7 mV/°C. While this may not be troublesome in some applications, the correct value of r2 makes the output stable with temperature.

To understand this, first note that the current in the AD590 is proportional to absolute temperature (PTAT). Actually, this integrated circuit is used as a thermometer. For now, assume the signal is a square wave. When q1 conducts, v is the sum of v. v is also the ptat voltage and tc can be chosen to be equal to but opposite to the base-emitter voltage tc. This is really nothing more than a bandgap voltage reference principle in veil disguise. When r2 is chosen so that the sum of the voltage across it and the v of q1 is close to the bandgap voltage of about 1.2V, v is stable over a wide temperature range as long as q1 and the AD590 share the same thermal environment.

Since the average current at the emitter is 600 μA during each half cycle of the square wave, a resistance of 833 Ω will increase the PTAT voltage by 500 mV at 300 K, an increase of 1.66 mV/°C. In practice, the optimum value of R2 depends on the transistor used and, to a lesser extent, the waveform for which temperature stability is to be optimized; for the device shown and a sine wave signal, a value of 806Ω is recommended. This resistor is also used to reduce peak current in Q1, and the 200 Hz LP filter it forms with C2 helps minimize distortion caused by V ripple. Note that the output amplitude for the sine wave condition is higher than for the square wave, because the current average value of an ideal rectifier would be 0.637 times larger, resulting in a t output amplitude of 1.88 volts (=1.2/0.637), or 1.33 volts rms. In practice, some less than ideal rectifiers cause the sine wave output to be regulated to about 1.275 volts rms.

Apply an offset of 375 mV to the inverse gain control inputs c1lo and c2lo. Therefore, the nominal -625 mV to +625 mV range of V is up-converted (at V' this prevents Q1 from going into severe saturation at low gains and leaves enough for the AD590 to operate correctly at high gains when using a 5 V supply 4 V headroom.

In practice, the 6db interstage attenuator means that the overall gain of the agc system actually runs from -6db to +74db. Therefore, an input of 2v rms is required to produce a 1v rms output at minimum gain, which exceeds the 1v rms maximum input specification of the ad600. So the available gain range is 0dB to 74dB (or x1 to x5000). With a gain scale of 15.625 mV/dB (due to the cascade stage), the minimum value of V' is actually increased by 6 × +15.625 mV, or about 94 mV, to -156 mV, thus reducing the risk of saturation in Q1.

The emitter circuit of Q1 is somewhat inductive (due to its finite F and base resistance). Therefore, the effective value of r2 increases with frequency. This resulted in an increase in stable output amplitude at high frequencies, but with the addition of C3, the maximum response flatness of 2N3904 was experimentally determined to be 15 pf. Alternatively, faster transistors can be used to reduce high frequency peaks. Figure 38 shows the AC response at a stable output level of approximately 1.3 rms. Figure 39 shows the output stability for a 1 mV to 1 V rms sine wave input at 100 kHz, 1 MHz, and 10 MHz.

While the bandgap principle used here sets the output amplitude to 1.2V (for the square wave case), the settling point can be set to any higher amplitude up to the maximum output ±(V−2)V that the AD600 can support. Simply divide r2 into two appropriately proportioned components whose parallel sum remains at a zero tc value close to 806Ω. Figure 40 shows this and how the output can be improved without changing the temperature stability.

Wide range, rms linear db measurement system (2mhz agc amplifier with rms detector)

Monolithic rms-dc converters provide an inexpensive way to measure the rms value of arbitrary waveform signals; they can also provide low-precision logarithmic (decibel-scale) outputs. But there are also certain shortcomings. The first is their limited dynamic range, usually only 50 dB. To make matters more troubling, the bandwidth is roughly proportional to the signal level; for example, the ad636 gives 900 kHz of 3 dB bandwidth for a 100 mv rms input, but only has 100 kHz of bandwidth for a 10 mv rms input. Its logarithmic output is unbuffered, uncalibrated, and unstable over temperature. Extensive support circuitry is required, including at least two trims and a special high tc resistor, to provide a useful output.

These problems can be eliminated by using the AD636 as the sense element in the AGC loop where the difference between the rms output of the amplifier and the fixed DC reference is zero in the loop integrator. The dynamic range and accuracy of the signal is now completely dependent on the amplifier used in the AGC system. Since the input of the rms dc converter is forced to a constant amplitude, close to its maximum input capability, the bandwidth is no longer signal dependent. If the amplifier has an exponential (linear db) gain control law, its control voltage v is forced by the agc loop to have the general form:

Figure 41 shows a practical wide dynamic range RMS response measurement system using the AD600. Note that the signal output of this system is available on the A2OP, which can be used as a wideband AGC amplifier with an RMS response detector. The circuit can handle inputs from 100µv to 1v rms with a constant measurement bandwidth of 20hz to 2mhz, limited mainly by the ad636rms converter. Its logarithmic output is a loadable voltage precisely calibrated to 100 mV/dB or 2 V per decade, which simplifies interpretation of readings when using a DVM, and is set to -4 V for a 100 µV rms input and -4 V for a 10 mV input setting Zero, set to +4 V for a 1 V rms input. According to Equation 4, V is 10 mV and V is 2 V.

Note that the ±4V peak log output requires a ±6V supply for the dual op amp U3 (AD712), although a lower supply is sufficient for the AD600 and AD636. If only a ±5v supply is available, it will be necessary to use a reduced value for v (eg 1v, in which case the peak output will only be ±2v), or limit the dynamic range of the signal to about 60db.

As in the previous case, the two amplifiers of the ad600 are used in cascade. However, the 6db attenuator and low-pass filter found in Figure 21 are replaced by a unity-gain buffer amplifier u3a, whose 4mhz bandwidth eliminates the risk of instability at the highest gain. The buffer also allows the use of a high impedance coupling network (C1/R3) which introduces a high pass corner at about 12Hz. A 10dB (x0.316) input attenuator is now provided by R1+R2, working with the AD600's 100Ω input resistance. In critical applications this trim provides an accurate calibration of the log intercept v, but if a very close calibration is not required, r1 and r2 can be replaced by fixed resistors of 215Ω, since the AD600 (and all other key parameters of it and the AD636) ) input resistance has been laser trimmed for precise operation. The attenuator accepts inputs up to ±4V, i.e. signals with an rms value of 1V and a crest factor of up to 4.

The output of A2 is AC coupled through another 12Hz high-pass filter formed by C2 and the AD636's 6.7KΩ input resistance. The average time constant of the rms DC converter is determined by c4. Compare the unbuffered output of the AD636 (pin 8) to a fixed voltage of 316 mV set by a positive supply voltage of 6 V and resistors R6 and R7. V is proportional to this voltage, and systems requiring higher calibration accuracy should use a more stable power supply instead of a power-dependent reference.

Any difference in these voltages is integrated by the op-amp u3b with a time constant of 3ms, formed by the parallel sum of r6/r7 and c3. Now, if the output of the AD600 is too high, V rms is greater than the set point of 316 mV, causing the output of U3b, V-, to rise (note that the integrator is non-rotating). Part of v is connected to the inverse gain control input of the ad600, thus causing the gain to decrease as needed until v rms is exactly 316 mv, at which point the ac voltage at the output of a2 is forced to be exactly 316 mv rms. This part is set by R4 and R5, so the 15.625 mV change in the control voltage of A1 and A2 - this will change the gain of the cascaded amplifier by 1 dB, requiring a 100 mV change in V. Note that since A2 is forced to operate at an output level well below its capacity, this can be done by cutting off the amplifier.

To check the operation, assume a 10 mV rms input is applied to the input, resulting in a voltage of 3.16 mV rms at the input of A1 due to the 10 dB loss in the attenuator. If the system is operating as required, v (and therefore v) should be 0. In this case, both a1 and a2 have a gain of 20db, so the output of the ad600 is 100 times larger (40db) than its input, which is estimated to be 316mv rms, the input required by the ad636 to balance the loop. Finally, note that unlike most AGC circuits that require strong temperature compensation of the internal kt/q scale, these voltages, and the output of this measurement system, are temperature stable, decaying directly by the fundamental and exact exponential of the ladder network in the AD600 cause.

Typical results are given for a 100khz sine wave input. Figure 42 shows that over an input range of more than 80 dB, the output remains close to the setpoint of 316 mV rms.

Of course, the system can be used as an agc amplifier where the rms value of the input is horizontal. Figure 43 shows the output voltage in decibels. More telling is Figure 44, which shows that the deviation from the ideal output predicted by Equation 1 is within ±0.5 dB over an input range of 80 µV to 500 mV rms, and within 80 dB over a range of 80 µV to 800 mV , the deviation is within ±1 dB. With proper selection of input attenuators r1+r2, it can be centered to cover any range from low voltages of 25 mV to 250 mV to high voltages of 1 mV to 10 V, with appropriate corrections for the value of V . Note that V is not affected by range changes. The gain ripple of ±0.2db seen in this curve is the result of the finite interpolation error of the x-amp. Note that it occurs with a period of 12 dB, which is twice the interval between tap points (since there are two cascaded stages).

This ripple can be eliminated by introducing a 3dB offset between the two pairs of control voltages when the x-amp stages are cascaded. A simple way to achieve this is shown in Figure 45: divide the voltages at c1hi and c2hi by ±46.875mV or ±1.5dB. Alternatively, any of these pins can be individually offset by 3dB and have a 1.5dB gain adjustment at the input attenuator (r1+r2).

The error curve shown in Figure 46 shows that the output voltage can remain close to ideal in the center portion of the range. The penalty for this modification is higher error at the end of the range. The next two applications show how to cascade three amplifier sections to extend the nominal conversion range to 120db, including a simple lp filter of the type shown in Figure 37. Very low error can be kept in the range of 100 dB.

100db to 120db rms response constant bandwidth agc system with high precision db output

The next two applications double as agc amplifiers and measurement systems. In both cases, precise gain offset is used to achieve high gain linearity of ±0.1dB over the entire 100dB range or to achieve the best signal-to-noise ratio at any gain.

Minimum gain 100db rms/agc system

Error (parallel gain with offset)

Figure 47 shows an rms response agc circuit that can be used as an accurate measurement system. It accepts inputs from 10µV to 1 V rms (–100 dBV to 0 dBV) with adequate overrange. Figure 48 shows the logarithmic output, V, accurately scaled to 1 V per decade, or 50 mV/dB, with an intercept (V=0) of 3.16 mV rms (–50 dBV). A gain offset of ±2db is introduced between amplifiers, provided by ±62.5mv introduced by r6 to r9. These offsets cancel out small gain fluctuations in the x-amp caused by its finite interpolation error, which has a period of 18db in each vca section. Figure 49 shows the gain ripple for all three amplifier sections without this offset (in this case, the gain errors simply add up); it is still very low in the 108db range from 6µv to 1.5v rms ±0.25db. However, with gain offset connected, gain linearity remains below ±0.1 dB over the specified 100 dB range (see Figure 50).

The maximum gain of this circuit is 120db. Without filtering, the noise spectral density of the AD600 (1.4nV/√Hz) would be equal to 8.28μV rms of input noise over the full bandwidth (35MHz). When the gain is one million, the output noise will dominate. Therefore, some degree of bandwidth reduction is mandatory, in the circuit of Figure 47, this is mainly due to the single-pole low-pass filter r5/c3, which provides a -3db frequency of 458khz, which will be worst case at a gain of 100db The output noise (at v) is reduced to about 100mv rms. Of course, in audio applications, for example, the bandwidth (and therefore output noise) can be further reduced by simply increasing c3. The value chosen for this application is optimal in minimizing vout error for small input signals.

The AD600 is DC-coupled, but even a small bias voltage at the input can overload the output at high gain; therefore, high-pass filtering is also required. To provide low frequency operation, R1/C1 and R4/C2 provide two simple 0s at about 12Hz; op amp sections U3A and U3B (AD713) are used to provide impedance buffering since the AD600's input resistance is only 100Ω. Another 0 at 12 Hz is provided by C4 and the 6.7 kΩ input resistance of the AD636 rms converter.

The rms value of V is generated at pin 8 of the AD636; the averaging time for this process is determined by C5, and the values shown result in less than 1% rms error at 20 Hz. The slowly varying v rms is compared to a fixed reference of 316mv derived from the positive supply of r10/r11. Any difference between these two voltages is integrated in C6 with the op-amp U3C whose output is V. A portion of this voltage, determined by R12 and R13, is returned to the gain control input of all AD600 sections. Increasing the voltage reduces the gain because this voltage is connected to the polarity inversion control input.

In this case, the gain of all three vca sections changes simultaneously, so the scaling is not 32 db/v, but 96 db/v or 10.42 mv/db. So the fraction of V required to scale it to 50 mV/dB is 10.42/50 or 0.208. The resulting full-scale range, V, is nominally ±2.5 V. This scale allows the circuit to operate from ±5 V supplies.

Optionally, the scale can be changed to 100 mV/dB, which will be easier to interpret when V is displayed on the DVM by increasing R12 to 25.5 kΩ. Then, a full-scale output of ±5 V requires a supply voltage of at least ±7.5 V.

The 100Ω input resistance of r2/r3 and ad600 constitutes a simple attenuator of 16.6±1.25db. This allows the reference level of the decibel output to be precisely set to 0 at an input of 3.16 mV rms, centering the 100-dB range between 10 μV and 1 V. In many applications, R2/R3 can be replaced by 590Ω fixed resistors. For example, in agc applications, neither the slope nor the intercept of the log output is important.

Some additional components (r14 to r16 and q1) improve the accuracy of v at the top end of the signal range (ie, for small gains). When the input of the first amplifier u1a reaches 0db, the gain starts to decay. To compensate for this non-linearity, Q1 turns on at v~1.5v and adds feedback to the control input of the ad600s, so a smaller voltage is required at v to keep the input of the ad636 at the setpoint of 316 mv rms .

120db rms/agc system with best signal to noise ratio (sequential gain)

In the last case, all gains are adjusted simultaneously, resulting in an output SNR that is always less than optimal. The use of sequential gain control results in a large improvement in the signal-to-noise ratio with only a small effect on the accuracy of v and no effect on the stable accuracy of v. The idea is to first increase the gain in the early stages (as the signal level decreases) and maintain the highest possible signal-to-noise ratio throughout the amplifier chain. This can be easily achieved with the AD600 because its gain is accurate even when the control input is overdrive. That is, each gain control window of 1.25 V is fully utilized before moving to the next amplifier on the right.

Figure 51 shows the circuit for the sequential control scheme. r6 to r9 and r16 provide a 42.14db offset between the individual amplifiers to ensure a smooth transition between the gains of each successive x-amp, in the order of u1a, u1b, and u2a. Adjustable attenuator provided by r3+r17 and 100Ω input resistance of u1a, and fixed 6db attenuation pr through the input resistance of r2 and u1b, set v to read 0 dB when V is 3.16 mV rms, and put 100 dB The range is centered between 10µV rms and 1 V rms input. R5 and C3 provide a 3 dB noise bandwidth of 30 kHz. r12 to r15 change the scale of the control input from 625 mV/decade to 1 V/decade of the output. Meanwhile, r12 to r15 center the dynamic range at 60db, which happens when u1b's v equals 0. These arrangements ensure that V remains within the ±6 V supply range.

Figure 52 shows that V is linear over the entire 120 dB range. Figure 53 shows the error fluctuation due to a single gain function limited by ±0.2dB (dashed line) from 6µV to 2V. The small perturbations of around 200µV and 20 mV due to the inability to perfectly match the gain function are the only signs that the gain is now continuous. Figure 54 is a graph of V that remains very close to its set point of 316 mV rms over the entire 120 dB range. Log AGC To more directly compare SNRs in simultaneous and sequential modes of operation, all interstage attenuations (r2 and r3 in Figure 47 and r2 in Figure 51) were eliminated, the input to u1a was shorted, and r5 was chosen to provide 20 kHz bandwidth (r5 = 7.87 kΩ), and using an external source only changes the gain control. The rms value of the noise is then measured at v and expressed as snr relative to 0 dbv, which is pretty much out of A600. The results for the synchronous mode are shown in Figure 55. As the gain increases, the signal-to-noise ratio decreases uniformly. Note that the gain in this curve and in Figure 56 decreases for more positive values of the gain control voltage due to the use of inverse gain control.

In contrast, the signal-to-noise ratio for sequential mode is shown in Figure 56. u1a always acts as a fixed noise source, and changes in its gain have no effect on the output noise. This is a feature of x-amp technology. So for the first 40dB of the control range (actually a little more, as explained later), the snr remains constant when only this VCA part of the gain varies. During this period, the gains of u1b and u2a are -1.07db at their minimum.

During the next 40db control range, the gain of u1a remains fixed at its maximum value of 41.07db, only the gain of u1b changes, and the gain of u2a remains at its minimum value of -1.07db. In this interval, the fixed output noise of u1a increases with the increase of u1b gain, and the signal-to-noise ratio decreases gradually.

Once u1b reaches its maximum gain of 41.07db, its output also becomes a gain-independent noise source; this noise is presented to u2a. With the further increase of the control voltage, the gains of both u1a and u1b remain unchanged at their maximum value of 41.07db, and the signal-to-noise ratio continues to decrease. Figure 56 clearly shows this, as the maximum SNR is 90db for the first 40db before the input signal starts to decay.

This staggered gain arrangement can be easily implemented because when the AD600's control input is overdriven, the gain is limited to its maximum or minimum value without side effects. This eliminates the need for clumsy nonlinear shaping circuits previously used to decompose the gain range of multistage AGC amplifiers. The exact values of the AD600's maximum and minimum gain (not 0dB and +40dB, but -1.07dB and +41.07dB) explain the rather odd value of the offset used.

The optimization of output signal-to-noise ratio has obvious application value in agc system. However, in applications where the wide-range logarithmic measurement capabilities of these circuits are considered, the signal-to-noise ratio inevitably degrades at high gains. It is not necessary to seriously impair their utility. In fact, the bandwidth of the circuit shown in Figure 47 is improved by changing the shape of the logarithmic error curve at low signal levels (see Figure 53).