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High Speed: 50mhz unity gain bandwidth; 350 V/s slew rate; 70 ns settling time to 0.01% 50 mA; specified for +5 V, 5 V, and 15 V operation; 2.0 V PP output swings into 150 load; (Vs = +5 V); good video performance; differential gain and phase errors of 0.07% and 0.11 Excellent DC performance:; 2.0 mV maximum input offset voltage.

Applications: unity-gain ADC/DAC buffers; cable drivers; 8-bit and 10-bit data acquisition systems; video line drivers; active filters.

Product Description

The AD826 is a dual high speed voltage feedback operational amplifier. It is ideal for applications requiring unity-gain stability and high output drive capability, such as buffering and cable drive. The 50 MHz bandwidth and 350 V/µs slew rate make the AD826 useful in many high-speed applications, including: video, cable television, copiers, LCD monitors, image scanners, and fax machines.

The AD826 has a high output current drive capability of 50 mA per amp, capable of driving infinite capacitive loads. With low supply current of 15 mA max for both amplifiers, the AD826 is a true general purpose op amp.

The AD826 is ideal for power-sensitive applications such as cameras and portable instruments. The AD826 can operate from a single +5V supply while still achieving a 25MHz bandwidth. Additionally, the AD826 is fully specified from a +5 V to ±15 V supply.

In data acquisition systems, the AD826 excels as an ADC/DAC buffer or active filter, with settling times of 70 ns to 0.01% and low input bias voltages up to 2 mV. The AD826 is available in small 8-lead plastic mini DIP and SO packages.

Electrostatic discharge susceptibility

Electrostatic discharge sensitive devices. Electrostatic charges of up to 4000 volts, which tend to build up on the human body and test equipment, can be discharged without detection. Although the AD826 has proprietary ESD protection circuitry, permanent damage to these devices can occur if they are exposed to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.

AD826 Theory of Operation

The AD826 is a low cost, wideband, high performance dual operational amplifier that can drive bulk capacitive and resistive loads. It also achieves constant slew rate, bandwidth, and settling time over the entire specified temperature range.

The AD826 (Figure 35) consists of degenerate NPN differential pairs driving matched PNPs in a folded cascode gain stage. The output buffer stage uses an emitter follower in a class-ab amplifier that supplies the necessary current to the load while maintaining low distortion.

Capacitor c in the output stage mitigates the effects of capacitive loads. At low capacitive loads, the gain from the compensation node to the output is very close to unity. In this case, c is bootstrapped and does not affect the total compensation capacitance of the device. As the capacitive load increases, the output impedance of the output stage forms a pole. This reduces the gain, so c is not fully bootstrapped. Effectively, some of the capacitance contributes to the total compensation capacitance, reducing the unity gain bandwidth. As the load capacitance is further increased, the bandwidth continues to decrease, maintaining the stability of the amplifier.

Enter Notes

In circuits where the input to the AD826 will be subject to transient or continuous overload voltages that exceed the ±6 V maximum differential limit, an input protection resistor (R in Figure 25) is required. This resistor protects the input transistor by limiting its maximum base current. For high performance circuits, "balanced" resistors are recommended to reduce offset errors caused by bias currents through the input and feedback resistors. The balancing resistance is equal to the parallel combination of r and r, thus providing matched impedances at each input. Then the bias voltage error will be reduced by more than an order of magnitude. in f

Apply AD826

The AD826 is a breakthrough dual amplifier that provides precision and speed at low cost and low power consumption. The AD826 has excellent static and dynamic matching characteristics and can drive heavy resistive and capacitive loads. As with all high frequency circuits, care should be taken to maintain the overall performance of the device and its matching.

The following items are presented as general design considerations.

board layout

Input and output runs should be arranged so that they are physically isolated from the remaining runs. Also, the feedback resistors of each amplifier should be kept away from the feedback resistors of the other amplifier, as this greatly reduces inter-amplifier coupling.

Select feedback and gain resistors

To prevent stray capacitance at each amplifier's summing junction from limiting its performance, the feedback resistors should be less than 1kΩ. Since the summing junction capacitance can cause peaks, a small capacitor (1pf–5pf) may be placed in parallel with r to counteract this effect. Finally, sockets should be avoided because sockets have a tendency to increase line-to-line capacitance.

Power Considerations

To ensure the normal operation of AD826, please connect the positive power supply first, and then connect the negative power supply. Additionally, proper power supply decoupling is critical to maintaining the integrity of high frequency signals. In a well-placed design, decoupling capacitors should be placed close to the power pins, while their lead lengths should be kept to a minimum. These measures greatly reduce undesired inductive effects on the amplifier response.

While two 0.1µf capacitors are usually effective at decoupling the power supply, multiple capacitors of different values can be paralleled to cover a wider frequency range.

Single supply operation

An exciting feature of the AD826 is its ability to perform well in a single supply configuration (see Figure 37). The AD826 is ideal for applications that require low power consumption and high output current, as well as applications that need to drive large capacitive loads, such as caches and instrumentation.

Referring to Figure 36, careful consideration should be given to the correct selection of component values. The choice for this particular circuit is: (r1+r3) r2 combines with c1 to form a low frequency corner of about 30hz.

R3 and C2 reduce power supply variation to 1 low pass filtered output to 2π. The values of rl and cl were chosen by R3C2 to demonstrate the abnormal output drive capability of the ad826. In this configuration, the output is centered around 2.5 V. To remove the quiescent DC current associated with this level, C3 is inserted in series with RL.

The parallel amplifier takes advantage of the AD826's superior matching to deliver 100 mA to the load, and enhanced performance can easily be achieved by using the circuit in Figure 38. Here, two identical units are connected in parallel for higher load drive capability than a single amplifier (100 mA min guaranteed). r1 and r2 are included to limit current flow between amplifier outputs in the presence of any residual mismatch.

AD826 single-ended to differential line driver

Excellent common mode rejection ratio (>80db@5mhz), high bandwidth, wide supply voltage range and ability to drive heavy loads make the AD826 ideal for many line drive applications. The AD830 high-speed video differential amplifier is used as a differential line receiver at the end of a rear 50-foot twisted pair transmission line (see Figure 40). The gain of the whole system is +1 and the bandwidth is -3db at 14mhz. Figure 39 is the impulse response for a 2 volt pp, 1 MHz signal input.

The AD826 can quickly become a powerful low-distortion line driver (see Figure 41). In this configuration, the AD826 can comfortably drive a 75Ω back-end cable with a 5 MHz, 2 V PP input; all while achieving the harmonic distortion performance listed in the table below.

In this application, half of the AD826 operates at a gain of 2.1, providing current to the load, while the other half provides an overall system gain of 2. This is important for two reasons: one is to keep the bandwidth of the two amplifiers the same, and the other is to maintain the AD826's ability to operate at low supply voltages. RC varies with load and must be shown in Figure 41. Choose a low distortion amplifier to satisfy the following equation: RC = MRL

where m is defined by [(m+1)gs=gd] and gd=driver gain and gs=system gain.

High performance adc buffer

Figure 42 is a schematic diagram of a 12-bit high-speed analog-to-digital converter. The AD826 dual op amp uses single-ended inputs to differentially drive the AD872 A/D converter, thereby reducing second harmonic distortion. Figure 43 is an FFT of a 1 MHz input, sampled at 10 MHz, with a THD of -78 dB. The AD826 can be used to amplify low level signals in order to use the full range of the converter. The AD826's ability to operate at ±5V, or even a single 5V, plus its fast settling time and ability to deliver large currents to complex loads make it a very good flash A/D converter buffer buffers and a very useful general-purpose building block.