feature

Soft-switching converters optimized for complementary driving half-bridges can be applied to various topologies: asymmetrical asymmetrical pwm half-bridge converters flyback converters, asymmetrical forward pulse width modulation active clamp flyback converters via zero voltage switching (ZVS) to achieve high efficiency Internal Superfet 8482 with fast recovery type; S body diode (trr=120ns) Fixed dead time (200ns) for mosfet optimization Up to 300kHz operating frequency Internal soft-start pulse-by-pulse current limit for low standby power Burst Mode Operation Consumer Protection Functions: Over Voltage Protection (ovp), Overload Protection (olp), Abnormal Over Current Protection (AOCP), Internal Thermal Shutdown (TSD)

application

PDP and LCD TV station type computer and server multi-bus adapter telecom power supply

describe

Growing demands for high power density and low power contours in power converter designs are forcing designers to increase switching frequencies. High operating frequencies greatly reduce the size of passive components such as transformers and filters. However, switching losses have been a hindrance to high frequency operation. Reducing switching losses allows high frequency operation, and pulse width modulation is developed using soft switching techniques. These techniques allow switching devices to switch gently, greatly reducing switching losses and noise. The fsfa2100 is an integrated pwm controller and Superfet™ designed for zero-voltage switching (ZVS) half-bridge converters with minimal external components. The internal controller includes oscillator, undervoltage lockout, leading edge blanking (LEB), optimized high-side and low-side gate drivers, internal soft-start, temperature-compensated current source for accurate loop compensation and self-protection circuitry. Compared with discrete mosfet and pwm controller solutions, the fsfa2100 can reduce overall cost; component count, size and weight; while improving efficiency, productivity and system reliability.

Function description

Internal Oscillator: The FSFA2100 uses a current controlled oscillator as shown. Internally, the voltage at the RT pin is regulated to 2V, and the oscillation capacitor charge and discharge current CT is determined by the current flowing from the RT pin (ICTC). When the RT pin is pulled to ground with a resistor rset, the switching frequency is fixed at

Protection circuit: FSFA2100 overload protection (OLP), abnormal overcurrent protection (AOCP), overvoltage protection (ovp) and thermal shutdown (TSD) self-protection functions. OLP and ovp are auto-restart mode protection, while aocp and TSD are latch mode protection, auto-restart mode protection: once a fault condition is detected, the switch is terminated and the mosfet remains off. When LVCC drops to around 11 volts, the protection resets. The FPS resumes normal operation when LVCC reaches the startup voltage of approximately 14V. Latch Mode Protection: Once this protection is triggered, the switch is terminated and the mosfet remains off. The latch will reset below 5V only when LVCC is discharged.

Pulse-by-Pulse Current Limiting: During normal operation, the duty cycle of the low-side MOSFET is determined by comparing the internal triangle signal with the feedback voltage. However, the low-side mosfet is forced off when the current sense pin voltage reaches -0.58V. This action limits the drain current below a predetermined level to avoid MOSFETs. Abnormal overcurrent protection (AOCP): If there is a short circuit of the secondary rectifier diode, a large current with extremely high di/dt can flow through the mosfet before triggering the ocp or olp. AOCP is when the sensed voltage drops below -0.9V. This protection is latched in mode and reset only when LVCC is pulled below 5V. Overload Protection (OLP): Overload is defined as due to unexpected abnormal events. In this case, a protection circuit should be triggered to protect the power supply. However, even if the power supply is under normal conditions, the load transitions. To avoid this undesired operation, the OLP circuit is designed to determine whether this is a transient condition or a true overload condition only when specified. Because of the pulse-by-pulse current limiting capability, the maximum peak current through the mosfet is limited; therefore the maximum input power is limited by the given input voltage. If the output consumes more than this maximum power, the output voltage (vo) is reduced to the rated voltage. This reduces the current through the optocoupler diode and also reduces the optocoupler transistor current, increasing the feedback voltage (VFB). If VFB exceeds 3V, d1 is blocked, OLP current source starts to charge CB slowly, in this case, vfb continues to increase until it reaches 7V, then the switching operation is terminated, the delay time for shutdown is to charge CB from 3V with 5µA to 7V

Over voltage protection (ovp): When the lvcc reaches 23V, the ovp is triggered. This protection is when using a transformer that provides LVCC to the FPS. Thermal Shutdown (TSD): The mosfet and control chip are built into one package. This allows the control IC to detect that the MOSFET is thermally shut down if the temperature exceeds approximately 130°C. Soft Start: During startup, the duty cycle begins to increase and slowly establishes correct operating conditions for transformers, inductors and capacitors. The voltage on the output capacitor is gradually increased to smoothly establish the desired output voltage. The soft-start time is implemented internally at 15ms (when the operating frequency is set to 100kHz). To aid in soft-start operation, a capacitor and a resistor will be connected to the RT pin externally as shown. The capacitor CSS remains fully discharged until power is turned on. After power-on, the css is gradually charged by the current through the RT pin, which determines the operating frequency. The current through the RT pin is inversely proportional to the total impedance of the connected resistor. The total impedance at start-up is lower because rss is added to rset in parallel, i.e. the operating frequency continues to drop from high to low. The final css is fully charged to the rt pin voltage operating frequency is only determined by rset. During css charging, the operating frequency is higher than during normal operation. Asymmetric half-bridge converter, the switching cycle consists of power-on and commutation cycles. Energy cannot be transferred to the output side period during commutation. Because the leakage inductance of the main transformer is fixed for the DC link voltage applied on the VDL pin, the supply period during switching is shorter at high switching frequencies. When the CSS is charged, the switching frequency decreases and the period during power-on switching increases. It is the time when the internal soft start helps to soft start the switching power supply together.

Start-up: The voltage on the DC blocking capacitor cannot be predicted at startup due to the off-balance resistance between the high-side and low-side MOSFETs. In addition, the high-side MOSFET starts with a larger duty cycle because the low-side MOSFET gradually increases during the soft-start time. Therefore, at high voltage due to the high turn-off resistance of the high-side mosfet before it starts up, a large primary current can flow through the power-on time after the high-side mosfet starts up. For high-side MOSFETs, long duty cycles and high applied voltages generate excessive primary currents. When the high-side MOSFET is turned off, the primary MOSFET current flows through the body diode of the low-side MOSFET. It remains in the same state even after turning on and off the low side MOSFET. When the high side mosfet is turned on again, a huge current can flow from the DC link capacitor through the channel of the high side mosfet and the body of the diode on the low side due to reverse recovery. . It can cause unexpected noise on the CS pin. To avoid this problem, the voltage across the DC blocking capacitor must be low enough. Typically, two resistors with several megahertz can be added to the drain-source terminals of each mosfet to divide the DC link voltage. Burst operation: Putting the FSFA2100 into standby mode, it enters burst mode operation. When the load decreases, the feedback voltage decreases. device when the feedback voltage drops below vbl (1.3v). At this point, switching stops and the output voltage begins to drop at a rate depending on the backup current load. This causes the feedback voltage to rise. Once it passes vbh (1.5v), the switching continues. Then the feedback voltage drops and the process repeats. Burst mode alternately operates the switch that enables and disables the mosfet, reducing switching losses in standby mode.