General Instructions

The AD538 is a monolithic real-time computing circuit that provides accurate analog multiply, divide, and exponential operations. The combination of low input and output bias voltages and good linearity enables accurate calculations over an exceptionally wide input dynamic range. Laser wafer trimming enables multiplication and division errors as low as 0.25% of reading, while typical output offsets of 100 μv or less increase the overall realized performance level. The unit's 400khz bandwidth further enhances real-time analog signal processing.

The total transfer function of the AD538 is V=V (V/V). Programming a specific function is via pin bundling. One quadrant (positive input) multiply and divide requires no external components. Two-quadrant (bipolar molecule) splitting is possible, using external level shifting and scaling resistors. The desired scaling factor for both. Multiplication and division can be set using the on-chip +2v or +10v reference, or can be controlled externally to provide simultaneous multiplication and division. Exponential operations with m values between 0.2 and 5 can be achieved by adding one or two external resistors.

The log ratio can be directly calculated using only the log ratio and output portion of the chip. Access to multiple summing connections further increases the flexibility of the AD538. Finally, operation from standard ±5 V, ±12 V, and ±15 V supplies is allowed over a wide supply range of ±4.5 V to ±18 V.

The AD538 is available in two accuracy grades (A and B) over the industrial (-25°C to +85°C) temperature range and one accuracy grade (S) over the military (-55°C to +125°C) temperature range ). The device is packaged in a 18 lead to -118 sealed side brazing ceramic dip. A-grade chips are also available.

AD538 Theory of Operation

Recheck of Multiplier/Divider Accuracy

Traditionally, the accuracy (actually the error) of analog multipliers and dividers is expressed as a percentage of full scale. Therefore, a 1% multiplication error with a 10 V full-scale output means a worst-case error of +100 mV at any level within its specified output range. While this type of error specification is easy to test, evaluate, and interpret, it allows the user to guess what the multiplier is actually doing at low output levels, i.e., a multiplier close to the specified error limit (in this case) 100 mV.

The AD538's error sources do not follow the percentages of the full-scale approach, so it is better suited to the needs of very wide dynamic range applications that are best suited. As a multiplier or divider for a 100:1 (100 mV to 10 V) input range, the AD538's error is specified as the sum of two error components: a percentage of the reading (ideal output) term plus a fixed output offset. In this format, the AD538AD operates as a multiplier or divider with less than 100 mV input with a maximum error of ±1% of reading? 500 μV.

The total error calculations for the two levels over a 100:1 input range are shown in Table 4. This error specification format is familiar to designers and users of digital voltmeters, where error is specified as a percentage of reading ± a specific number on the meter reading.

For operation as a multiplier or divider over a wider dynamic range (>100:1), the ad538 has a more detailed error specification, which is the sum of three components: the percent read term, the output offset term, and Input offset term for the v/v log ratio section. For AD538AD with V = 1 V, V = 100 mV and V = 10 mV, the maximum error is ±500 μV of reading ± (1 V + 100 mV)/10 mV × 250 μV for the sample application of this specification extracted from Table 4 ±2.0% of reading or ±2.0% of reading ±500µV ±27.5 mV. This example shows that at very low level inputs, the AD538's incremental gain (v+v)/v increases so that the input offset contributes significantly to the error.

Function description

As shown in Figure 1 and Figure 11, the v and v inputs are connected directly to the AD538's input log ratio amplifier. The output voltage provided in this subsection is proportional to the natural logarithm of the input voltage v minus the natural logarithm of the input voltage v. The output of the log ratio subsection at b can be represented by the transfer function:

In the formula: k is 1.3806 × 10j/k, q is 1.60219 × 10c, and t is kelvins. The log ratio configuration can be used alone, if temperature compensated correctly, and scaled to the desired output level (see Application Information section).

Under normal operation, the log ratio output will be connected directly to the second function block antilog segment at input c. This section performs anti-logging based on the transfer function:

As with the logarithmic ratio circuit included in the AD538, the user can use the antilogarithmic segmentation themselves. When the two subsections are combined, the output at b is related to c, and the transfer function of the ad538 computational unit is:

Reduce to:

Finally, the amount of v/v can be increased to m power by increasing the gain, or attenuating the output of the log ratio segment by resistor programming. Without external programming, m is unity. Therefore, the overall ad538 transfer function is equal to:

of which 0.2

Stability Precautions

At higher frequencies, the multistage signal path of the AD538 can cause large phase shifts (as shown in Figure 11). If conditions of high incremental gain exist along this path (eg, v=v×v/v=10v×10mv/10mv=10v, such that Δv/Δv=1000), then from v to current input i or i Small amounts of capacitive feedback can cause instability. In this case, the board layout should be properly careful to prevent capacitive feedback mechanisms.

Use a voltage reference

A stable bandgap reference voltage scale is included in the AD538. It is laser trimmed to provide +10 V buffered voltage output (pin 4), +2 V unbuffered voltage output (pin 5), or any voltage between +2 V and +10.2 V buffered, as shown in Figure 12 shown. The output impedance at pin 5 is approximately 5 kΩ. Note that any load on this pin will generate an error in the +10 V reference. The external load on the +2V output should be greater than 500KΩ to keep the error less than 1%.

In cases where two reference levels are not required, the +2V output can be converted to a buffered output by connecting pins 4 and 5 together. If both references are required, the +10V output should be used directly and the +2V output should be buffered externally.

One-quadrant multiplication/division

Figure 13 shows how the AD538 can easily be configured as a one-quadrant precision multiplier/divider. The transfer function v=v(v/v) allows for three independent input variables, a calculation that cannot be performed by conventional multipliers. In addition, the AD538's 1000:1 (ie, 10mV to 10V) input dynamic range greatly exceeds the range of an analog multiplier for computing one-quadrant multiplication and division.

The AD538 can be configured to have a 10v scale by simply connecting the input v (pin 15) to the 10v reference (pin 4) and connecting the log ratio output at b to the antilog input at c single-quadrant analog multiplier. If 2V scaling is required, V can be tied to the 2V reference.

When the input V is connected to the +10 V reference terminal, the multiplying transfer function becomes:

As a multiplier, the circuit provides a typical bandwidth of 400 kHz with V, V, or V values varying in a 100:1 range (ie, 100 mV to 10 V). The maximum error for both input variables over the 100 mV to 10 V range is typically +0.5% of reading. Using the optional Z-offset trimming scheme, as shown in Figure 14, this error can be reduced to +0.25% of reading.

Using the 10V reference as the V input, the circuit of Figure 13 is configured as a one-quadrant divider with a fixed scale factor. As with the single-quadrant multiplier, the input accepts only single (positive) polarity signals. The output of a one-quadrant divider with a +10 V scale factor is:

The typical bandwidth of this circuit is 370khz with a denominator input level of 1v to 10v. At lower amplitudes, the bandwidth tapers off to about 200 kHz at a 2 mV input level.

Two-quadrant division

The two-quadrant linear divider circuit shown in Figure 14 uses the same basic connections as the one-quadrant circuit. However, in this circuit, the numerator is shifted in the positive direction by increasing the denominator input voltage. The offset scheme changes the transfer function of the divider:

The circuit accepts bipolar numerator voltages as long as the magnitude of the denominator input is equal to or greater than the magnitude of the numerator input. However, with a 0 V numerator input, the output will incorrectly equal +14 V. Connecting the 10 V reference voltage to the summing node I of the output section at pin 9 through resistors R1 and R2 provides a gain of 1.4 at the center of the trimmer pot, which cancels the offset. Potentiometer R2 adjusts or corrects this offset to maintain the desired transfer function at 10 V (V/V).

Logarithmic operation

Figure 15 shows the AD538 configured to calculate the logarithm of the ratio of two input voltages (or currents). The output signal from B is connected to the summing junction of the output amplifier through two series resistors. The 90.9Ω metal film resistor effectively reduces the temperature coefficient of the ±3500 ppm/°C resistor, yielding an equivalent value of 1.09 kΩ+3300 ppm/°C. In this configuration, the V input must be connected to some voltage less than zero (-1.2 V in this case) to remove this input from the transfer function.

Scale factor adjustment of the 5 kΩ potentiometer control circuit, providing an adjustment of +1 V per decade. The output offset potentiometer should be set to provide a zero output of V=V=1V. The input V trim should be set to a 3V output of V=L mV and V=1V.

The logarithmic ratio circuit shown achieves ±0.5% accuracy in the logarithmic domain for the input voltage over a 30-year input range (10 mV to 10 V). This error is not defined as a percentage of full-scale output, but rather as a percentage of input. For example, using a 1v/decade scale factor, a 1% error in the positive direction of the log-ratio amplifier input translates to a 4.3mv deviation from the ideal output (ie, 1v × log(1.01) = 4.3214mv). The input error in the negative direction is slightly different by 1%, and the output deviation is 4.3648mV.

Simulated Calculation of Powers and Roots

It is often necessary to raise the quotient of two input signals to a power or root. This could be square, cube, square root or exponent to some non-integer power. For example, generator sets. For the AD538, only one or two external resistors are required to set any desired power in the range of 0.2 to 5. Raising the base quantity v/v to power greater than 1 requires increasing the gain of the AD538 log-ratio subtractor through an external resistor between the A and D pins. Similarly, a voltage divider that attenuates the output of the log ratio between points b and c programs the power to a value less than 1.

square root operation

The explicit square root circuit of Figure 17 illustrates an accurate method for performing real-time square root calculations. For added flexibility and accuracy, the circuit has a scale factor adjustment.

In this circuit, the actual square root operation is done by raising the quantity v/v to half the power through a resistor divider network consisting of resistors r and r. For maximum linearity, these two resistors should be 1% (or better) than matched metal film types.

The 1V scaling is achieved by dividing the 2V reference voltage and applying about 1V to the V and V inputs. In this circuit, the v input is deliberately set low, about 0.95 v, so that the v input can be adjusted high, allowing a ±5% scale factor fine-tuning. Using this trimming scheme, the output voltage will be within ±3 mV ±0.2% of ideal over an input range of 10 V to 1 mV (80 dB). The error is even smaller when the input dynamic range is reduced from 10 mV to 10 V (60 dB); the output will then be within ±2 mV ±0.2% of ideal. The AD538 square root circuit has a bandwidth of approximately 280 kHz with a 1 V PP sine wave and a +2 V dc offset.

This basic circuit can also be used to calculate the cube root, fourth root, or fifth root of the input waveform. For a given root, it is only necessary to choose the correct resistance ratios r and r such that the sum is between 150Ω and 200Ω.

The optional absolute value circuit shown earlier on the AD538 allows the use of bipolar input voltages. The absolute value function requires only one op amp because the I input of the AD538 is used as a summing junction. If you need to preserve the sign of the input voltage, you can sense the polarity of the op amp output after the operation and use it to switch the sign bit of the dvm chip.

Application Information: Sensor Linearization

Many electronic sensors used in scientific, commercial or industrial equipment monitor the physical properties of the equipment and/or its environment. Sensing (and perhaps compensating for) changes in pressure, temperature, humidity, or other physical phenomena can be an expensive endeavor, especially where high accuracy and very low nonlinearity are important. In traditional analog systems, the accuracy can be easily improved by fine-tuning the offset and scale factor; however, nonlinearity is often the absolute limitation of the sensing device. The AD538's ability to easily program complex analog functions can effectively compensate for the nonlinearity of inexpensive sensors. The AD538 can be connected between the sensor preamp output and the next stage monitoring or transmit circuitry. The recommended procedure for linearizing a particular sensor is to first find the function that most closely approximates the nonlinearity of the device, and then choose an appropriate exponential resistor value.

arctangent approximation

The circuit of Figure 18 is typical for those AD538 applications where the number V/V is increased to a power greater than 1. In the approximate arc tangent function, the AD538 will calculate exactly the angle defined by the X and Y displacements represented by the input voltages V and V. With an accuracy of no more than one degree (for input voltages between 100 μV and 10 V), the AD538 arc-cut circuit is more accurate than traditional analog circuits and faster than MOS digital techniques. The circuit shown is set up for the transfer function:

In this circuit, the (vv) function is achieved by adding the output voltage v and the externally applied reference voltage v through an external ad547 operational amplifier. Connect the 1µF capacitor compensation loop (formed by the amplifier between V and V) around the frequency of the AD547 100 kΩ feedback resistor.

The v/v quantity is calculated in the same way as in the one-quadrant divider circuit, except that the resulting quotient is raised to the power of 1.21. Resistor R ( 931 Ω nominally) sets the power or M-factor. For highest arc-cut accuracy, the R1 and R2 external resistors should be ratio matched; however, since nonlinear effects are the dominant source of error, the offset trimming scheme shown in other circuits is not required. It should also be noted that as the output approaches 90°, instability occurs because the arctangent function is infinite by definition, so the gain of the AD538 will be very high.